BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: DS31415

-- ===================================================================
-- $Id: DS31415.bsdl.rca 1.3 Tue Oct 12 13:40:11 2010 mwilling Experimental $
-- ===================================================================
-- Copyright (c) 2010 Microsemi Corporation
-- All Rights Reserved.             
--                                  
-- THIS MATERIAL IS CONSIDERED PROPRIETARY BY
-- Microsemi Corporation.  UNAUTHORIZED ACCESS OR USE IS PROHIBITED.
-- ===================================================================
-- $RCSfile: DS31415.bsdl.rca $                     
--                                    
-- $Author: mwilling $                      
-- ===================================================================
--                                  
-- Abstract :                       
--                                  
-- Detail   :                       
--                                  
-- Usage    :                       
--                                  
-- File usage :                     
--    Script name: "/design/telecom/DS31IP38/users/release/design/scripts/create_jtag_and_pads", Version 1.91 
--        (This script is maintained in /design/telecom/DS31IP38/users/release)
--    BSDL Script name: "/design/telecom/DS31IP38/users/release/design/scripts/bsdl.pm", Version 1.35,  Wed Nov 28 14:21:36 2007
--        (This script is maintained in /design/telecom/DS31IP38/users/release)
--    Library name:"library.tsmc_18.pm", Version 1.6 
--    Pindef file: "ds31415_bsdl.pindef", Version unknown
--                                  
--                                  
--                                  
-- This file was script-generated.
--                                  
-- ===================================================================
-- ===================================================================

--   BSDL file for design DS31415

--   Created by DS31IP38 JTAG generator


--   Date: 

-- ***********************************************************************


 entity DS31415 is
   
-- This section identifies the default device package selected.
   
   generic (PHYSICAL_PIN_MAP: string:= "CSBGA_256");
   
-- This section declares all the ports in the design.
   
   port ( 
          CPHA       : inout     bit;
          CPOL       : inout     bit;
          CS_N       : inout     bit;
          FSYNC      : linkage   bit;
          GPIO1      : inout     bit;
          GPIO2      : inout     bit;
          GPIO3      : inout     bit;
          GPIO4      : inout     bit;
          IC1NEG     : linkage   bit;
          IC1POS     : linkage   bit;
          IC2NEG     : linkage   bit;
          IC2POS     : linkage   bit;
          IC3NEG     : linkage   bit;
          IC3POS     : linkage   bit;
          INTREQ     : inout     bit;
          JTCLK      : in        bit;
          JTDI       : in        bit;
          JTDO       : out       bit;
          JTMS       : in        bit;
          JTRST_N    : in        bit;
          LOCK       : inout     bit;
          MCLKOSCN   : linkage   bit;
          MCLKOSCP   : linkage   bit;
          MFSYNC     : linkage   bit;
          OC1        : linkage   bit;
          OC1NEG     : linkage   bit;
          OC1POS     : linkage   bit;
          OC4        : linkage   bit;
          OC4NEG     : linkage   bit;
          OC4POS     : linkage   bit;
          OSCFREQ0   : inout     bit;
          OSCFREQ1   : inout     bit;
          OSCFREQ2   : inout     bit;
          RST_N      : inout     bit;
          SCLK       : inout     bit;
          SDI        : inout     bit;
          SDO        : inout     bit;
          SRCSW      : inout     bit;
          SRFAIL     : inout     bit;
          SYNC1      : inout     bit;
          SYNC2      : inout     bit;
          SYNC3      : inout     bit;
          TEST0      : linkage   bit;
          TEST1      : linkage   bit;
          TEST2      : linkage   bit;
          VDD_APLL_18 : linkage   bit_vector (0 to 2);
          VDD_APLL_33 : linkage   bit_vector (0 to 3);
          VDD_DIG_18 : linkage   bit_vector (0 to 24);
          VDD_IO_18  : linkage   bit_vector (0 to 13);
          VDD_IO_33  : linkage   bit_vector (0 to 17);
          VDD_MCPLL_18 : linkage   bit_vector (0 to 2);
          VDD_MCPLL_33 : linkage   bit_vector (0 to 1);
          VDD_OC_18  : linkage   bit_vector (0 to 10);
          VSS_APLL   : linkage   bit_vector (0 to 6);
          VSS_DIG    : linkage   bit_vector (0 to 44);
          VSS_IO     : linkage   bit_vector (0 to 17);
          VSS_MCPLL  : linkage   bit_vector (0 to 4);
          VSS_OC     : linkage   bit_vector (0 to 10);
          VSUB       : linkage   bit_vector (0 to 9)
   );
   
   use STD_1149_1_1994.all;
   
   attribute COMPONENT_CONFORMANCE of DS31415: entity is "STD_1149_1_1993";
   
   attribute PIN_MAP of DS31415: entity is PHYSICAL_PIN_MAP;
   
-- This section specifies the pin map for each port. This information
-- is extracted from the port-to-pin map file that was read in using
-- the "read_pin_map" command.
   
     constant CSBGA_256: PIN_MAP_STRING := 
        "CPHA       :   C2," &
        "CPOL       :   C1," &
        "CS_N       :   C4," &
        "FSYNC      :   P2," &
        "GPIO1      :   H3," &
        "GPIO2      :   J3," &
        "GPIO3      :   K3," &
        "GPIO4      :   K1," &
        "IC1NEG     :   B9," &
        "IC1POS     :   A9," &
        "IC2NEG     :   B8," &
        "IC2POS     :   A8," &
        "IC3NEG     :   B7," &
        "IC3POS     :   A7," &
        "INTREQ     :   L1," &
        "JTCLK      :   N1," &
        "JTDI       :   N2," &
        "JTDO       :   N3," &
        "JTMS       :   P1," &
        "JTRST_N    :   M3," &
        "LOCK       :   K2," &
        "MCLKOSCN   :   D2," &
        "MCLKOSCP   :   D1," &
        "MFSYNC     :   P3," &
        "OC1        :  P12," &
        "OC1NEG     :  B16," &
        "OC1POS     :  C16," &
        "OC4        :   P9," &
        "OC4NEG     :   T8," &
        "OC4POS     :   R8," &
        "OSCFREQ0   :   D3," &
        "OSCFREQ1   :   E3," &
        "OSCFREQ2   :   F3," &
        "RST_N      :   G3," &
        "SCLK       :   A1," &
        "SDI        :   B1," &
        "SDO        :   C3," &
        "SRCSW      :   L2," &
        "SRFAIL     :   C8," &
        "SYNC1      :   C5," &
        "SYNC2      :   C6," &
        "SYNC3      :   C7," &
        "TEST0      :   L3," &
        "TEST1      :   M1," &
        "TEST2      :   M2," &
        "VDD_APLL_18 : (A13,A15,B15)," &
        "VDD_APLL_33 : (C13,C15,D15,D16)," &
        "VDD_DIG_18 : (A11,A12,E10,E11,E12,E5,E6,E7,E8,E9,F5,G5,H5,J5,K5,L5,M10,M11,M12,M5,M6,M7,M8,M9,T16)," &
        "VDD_IO_18  : (D12,D13,D4,D5,E15,F15,G15,K15,L15,M15,N12,N13,N4,N5)," &
        "VDD_IO_33  : (D6,D7,D8,E13,E4,F4,H15,J15,J16,L4,M13,M4,N15,N6,N7,N8,P15,P16)," &
        "VDD_MCPLL_18 : (E1,F1,G1)," &
        "VDD_MCPLL_33 : (H1,J1)," &
        "VDD_OC_18  : (T1,T10,T11,T12,T13,T14,T15,T3,T5,T7,T9)," &
        "VSS_APLL   : (A14,A16,B13,B14,C12,C14,D14)," &
        "VSS_DIG    : (B11,B12,F10,F11,F12,F6,F7,F8,F9,G10,G11,G12,G6,G7,G8,G9,H10,H11,H12,H6,H7,H8,H9,J10,J11,J12,J6,J7,J8,J9,K10,K11,K12,K6,K7,K8,K9,L10,L11,L12,L6,L7,L8,L9,R16)," &
        "VSS_IO     : (D10,D11,D9,E14,F14,F16,G14,H14,J14,K14,L14,L16,M14,N10,N11,N14,N9,P14)," &
        "VSS_MCPLL  : (E2,F2,G2,H2,J2)," &
        "VSS_OC     : (R1,R10,R11,R12,R13,R14,R15,R3,R5,R7,R9)," &
        "VSUB       : (F13,G13,G4,H13,H4,J13,J4,K13,K4,L13) " ;
  
-- This section specifies the TAP ports.
-- For the TAP TCK port, the parameters in the brackets are:
--        First Field : Maximum  TCK frequency.
--        Second Field: Allowable states TCK may be stopped in.
   
   attribute TAP_SCAN_CLOCK of JTCLK    : signal is (10.0e6, BOTH);
   attribute TAP_SCAN_IN    of JTDI     : signal is true;
   attribute TAP_SCAN_MODE  of JTMS     : signal is true;
   attribute TAP_SCAN_OUT   of JTDO     : signal is true;
   attribute TAP_SCAN_RESET of JTRST_N  : signal is true;
   
-- Specifies the number of bits in the instruction register.
   
   attribute INSTRUCTION_LENGTH of DS31415: entity is 3;
   
-- Specifies the boundary-scan instructions implemented in the
-- design and their opcodes.
   
   attribute INSTRUCTION_OPCODE of DS31415: entity is 
     "BYPASS (111)," &
     "EXTEST (000)," &
     "SAMPLE (010)," &
     "CLAMP  (011)," &
     "HIGHZ  (100)," &
     "USER1  (101)," &
     "USER2  (110)," &
     "IDCODE (001)";
   
-- Specifies the bit pattern that is loaded into the instruction
-- register when the TAP controller passes through the Capture-IR
-- state. The standard mandates that the two LSBs must be "01".
-- The remaining bits are design specific.
   
   attribute INSTRUCTION_CAPTURE of DS31415: entity is "001";
   
-- Specifies the bit pattern that is loaded into the DEVICE_ID
-- register during the IDCODE instruction when the TAP controller
-- passes through the Capture-DR state.
   
   attribute IDCODE_REGISTER of DS31415: entity is 
     "0001" &                  -- 4-bit version number
     "0000000010110111" &      -- 16-bit part number
     "00010100001" &           -- 11-bit identity of the manufacturer
     "1";                      -- Required by IEEE Std 1149.1
   
-- This section specifies the test data register placed between TDI
-- and TDO for each implemented instruction.
   
   attribute REGISTER_ACCESS of DS31415: entity is 
        "BYPASS    (BYPASS, CLAMP, HIGHZ, USER1, USER2)," &
        "BOUNDARY  (EXTEST, SAMPLE)," &
        "DEVICE_ID (IDCODE)";
   
-- Specifies the length of the boundary scan register.
   
   attribute BOUNDARY_LENGTH of DS31415: entity is 48;
   
-- The following list specifies the characteristics of each cell
-- in the boundary scan register from TDI to TDO.
-- The following is a description of the label fields:
--      num     : Is the cell number.
--      cell    : Is the cell type as defined by the standard.
--      port    : Is the design port name. Control cells do not
--                have a port name.
--      function: Is the function of the cell as defined by the
--                standard. Is one of input, output2, output3,
--                bidir, control or controlr.
--      safe    : Specifies the value that the BSR cell should be
--                loaded with for safe operation when the software
--                might otherwise choose a random value.
--      ccell   : The control cell number. Specifies the control
--                cell that drives the output enable for this port.
--      disval  : Specifies the value that is loaded into the
--                control cell to disable the output enable for
--                the corresponding port.
--      rslt    : Resulting state. Shows the state of the driver
--                when it is disabled.
   
   attribute BOUNDARY_REGISTER of DS31415: entity is 
--    
--    num   cell   port     function      safe  [ccell  disval  rslt]
--    
  "47    (BC_1,  *,           controlr,     0),                        " &
  "46    (BC_0,  OSCFREQ0,    bidir,        X,   47  ,     0,     Z),  " &
  "45    (BC_1,  *,           controlr,     0),                        " &
  "44    (BC_0,  OSCFREQ1,    bidir,        X,   45  ,     0,     Z),  " &
  "43    (BC_1,  *,           controlr,     0),                        " &
  "42    (BC_0,  OSCFREQ2,    bidir,        X,   43  ,     0,     Z),  " &
  "41    (BC_1,  *,           controlr,     0),                        " &
  "40    (BC_0,  RST_N,       bidir,        X,   41  ,     0,     Z),  " &
  "39    (BC_1,  *,           controlr,     0),                        " &
  "38    (BC_0,  GPIO1,       bidir,        X,   39  ,     0,     Z),  " &
  "37    (BC_1,  *,           controlr,     0),                        " &
  "36    (BC_0,  GPIO2,       bidir,        X,   37  ,     0,     Z),  " &
  "35    (BC_1,  *,           controlr,     0),                        " &
  "34    (BC_0,  GPIO3,       bidir,        X,   35  ,     0,     Z),  " &
  "33    (BC_1,  *,           controlr,     0),                        " &
  "32    (BC_0,  GPIO4,       bidir,        X,   33  ,     0,     Z),  " &
  "31    (BC_1,  *,           controlr,     0),                        " &
  "30    (BC_0,  LOCK,        bidir,        X,   31  ,     0,     Z),  " &
  "29    (BC_1,  *,           controlr,     0),                        " &
  "28    (BC_0,  INTREQ,      bidir,        X,   29  ,     0,     Z),  " &
  "27    (BC_1,  *,           controlr,     0),                        " &
  "26    (BC_0,  SRCSW,       bidir,        X,   27  ,     0,     Z),  " &
  "25    (BC_1,  *,           internal,     0),                        " &
  "24    (BC_0,  *,           internal,     X),                        " &
  "23    (BC_1,  *,           internal,     0),                        " &
  "22    (BC_0,  *,           internal,     X),                        " &
  "21    (BC_1,  *,           internal,     0),                        " &
  "20    (BC_0,  *,           internal,     0),                        " &
  "19    (BC_1,  *,           controlr,     0),                        " &
  "18    (BC_0,  SRFAIL,      bidir,        X,   19  ,     0,     Z),  " &
  "17    (BC_1,  *,           controlr,     0),                        " &
  "16    (BC_0,  SYNC1,       bidir,        X,   17  ,     0,     Z),  " &
  "15    (BC_1,  *,           controlr,     0),                        " &
  "14    (BC_0,  SYNC2,       bidir,        X,   15  ,     0,     Z),  " &
  "13    (BC_1,  *,           controlr,     0),                        " &
  "12    (BC_0,  SYNC3,       bidir,        X,   13  ,     0,     Z),  " &
  "11    (BC_1,  *,           controlr,     0),                        " &
  "10    (BC_0,  CS_N,        bidir,        X,   11  ,     0,     Z),  " &
  "9     (BC_1,  *,           controlr,     0),                        " &
  "8     (BC_0,  SCLK,        bidir,        X,   9   ,     0,     Z),  " &
  "7     (BC_1,  *,           controlr,     0),                        " &
  "6     (BC_0,  SDI,         bidir,        X,   7   ,     0,     Z),  " &
  "5     (BC_1,  *,           controlr,     0),                        " &
  "4     (BC_0,  SDO,         bidir,        X,   5   ,     0,     Z),  " &
  "3     (BC_1,  *,           controlr,     0),                        " &
  "2     (BC_0,  CPHA,        bidir,        X,   3   ,     0,     Z),  " &
  "1     (BC_1,  *,           controlr,     0),                        " &
  "0     (BC_0,  CPOL,        bidir,        X,   1   ,     0,     Z)   " ;

end DS31415;


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