BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: MCF5225X

-- --------------------------------------------------------------------- 
--                  Copyright (c) 2002, Freescale. 
--               Freescale Confidential Proprietary 
-- --------------------------------------------------------------------- 
-- FILE NAME      : mcf5225x_LQFP_100.bsdl
-- TYPE           : BSDL   
-- DEPARTMENT     : TSPG, Noida, India  
-- AUTHOR         : b12158 
-- AUTHOR's EMAIL : @freescale.com
-- --------------------------------------------------------------------- 
-- RELEASE HISTORY 
-- Version   Date      						     Author 
--   1.0     Mon Jan  7 17:20:32 IST 2008        b12158
-- --------------------------------------------------------------------- 
-- KEYWORDS :  
-- --------------------------------------------------------------------- 
-- PURPOSE : BSDL for customer.
-- --------------------------------------------------------------------- 
-- GENERATED by BSDLgen
-- File: mcf5225x_LQFP_100.bsdl
--------------------------------------------------------------------------------
-- * This BSDL file has been syntax checked with: 
-- * - Intellitech iBSDL Compiler (http://www.intellitech.com) 
--------------------------------------------------------------------------------

entity mcf5225x is
	generic (PHYSICAL_PIN_MAP : string := "LQFP_100");
-- KEY: 
--      in      = input only 
--      out     = three-state output or open-drain 
--      buffer  = two-state output 
--      inout   = bidirectional 
--      linkage = pins not included in jtag chain 
--                i.e. power, ground, clocks etc.
	port ( 		VSS6:linkage		 bit;
		VDD6:linkage		 bit;
		SDA:inout		 bit;
		SCL:inout		 bit;
		PCS0:inout		 bit;
		SCK:inout		 bit;
		QSDO:inout		 bit;
		QSDI:inout		 bit;
		PCS2:inout		 bit;
		PCS3:inout		 bit;
		VSSPMM2:linkage		 bit;
		VDDPMM2:linkage		 bit;
		TIN3:inout		 bit;
		RTS_B0:inout		 bit;
		RXD0:inout		 bit;
		TXD0:inout		 bit;
		CTS_B0:inout		 bit;
		RTC_XTAL:linkage		 bit;
		RTC_EXTAL:linkage		 bit;
		TIN1:inout		 bit;
		TIN0:inout		 bit;
		RCON_B:in			 bit;
		TEST:in			 bit;
		VSSF1:linkage		 bit;
		VDDF1:linkage		 bit;
		CLKMOD1:in			 bit;
		CLKMOD0:in			 bit;
		RSTOUT_B:inout		 bit;
		RSTIN_B:in			 bit;
		IRQ_B3:inout		 bit;
		IRQ_B5:inout		 bit;
		FEC_RXD3:inout		 bit;
		FEC_RXD2:inout		 bit;
		VDD2:linkage		 bit;
		VSS2:linkage		 bit;
		FEC_RXD1:inout		 bit;
		FEC_RXD0:inout		 bit;
		FEC_RXDV:inout		 bit;
		FEC_RXCLK:inout		 bit;
		FEC_RXER:inout		 bit;
		FEC_TXER:inout		 bit;
		FEC_TXCLK:inout		 bit;
		FEC_TXEN:inout		 bit;
		VDDF2:linkage		 bit;
		VSSF2:linkage		 bit;
		FEC_TXD0:inout		 bit;
		FEC_TXD1:inout		 bit;
		FEC_TXD2:inout		 bit;
		FEC_TXD3:inout		 bit;
		FEC_COL:inout		 bit;
		FEC_CRS:inout		 bit;
		VDDPLL:linkage		 bit;
		EXTAL:linkage		 bit;
		XTAL:linkage		 bit;
		VSSPLL:linkage		 bit;
		IRQ_B1:inout		 bit;
		RXD2:inout		 bit;
		TXD2:inout		 bit;
		VDDPMM1:linkage		 bit;
		VSSPMM1:linkage		 bit;
		RTS_B2:inout		 bit;
		CTS_B2:inout		 bit;
		IRQ_B7:inout		 bit;
		ICOC2:inout		 bit;
		ICOC1:inout		 bit;
		ICOC0:inout		 bit;
		VDDUSB:linkage		 bit;
		USB_DP:linkage		 bit;
		USB_DM:linkage		 bit;
		VSSUSB:linkage		 bit;
		VSTBY:linkage		 bit;
		AN4:inout		 bit;
		AN5:inout		 bit;
		AN6:inout		 bit;
		AN7:inout		 bit;
		VDDA:linkage		 bit;
		VRH:linkage		 bit;
		VRL:linkage		 bit;
		VSSA:linkage		 bit;
		AN3:inout		 bit;
		AN2:inout		 bit;
		AN1:inout		 bit;
		AN0:inout		 bit;
		TIN2:inout		 bit;
		RTS_B1:inout		 bit;
		RXD1:inout		 bit;
		TXD1:inout		 bit;
		CTS_B1:inout		 bit;
		VSS4:linkage		 bit;
		VDD4:linkage		 bit;
		ICOC3:inout		 bit;
		VSS5:linkage		 bit;
		VDD5:linkage		 bit;
		JTAG_EN:in			 bit;
		TCLK:in			 bit;
		ALLPST:out			 bit;
		TDO:out			 bit;
		TDI:in			 bit;
		TRST_B:in			 bit;
		TMS:in			 bit);
	use STD_1149_1_2001.all;
	attribute COMPONENT_CONFORMANCE of mcf5225x : entity is "STD_1149_1_2001";
	attribute PIN_MAP of mcf5225x : entity is PHYSICAL_PIN_MAP;
	constant LQFP_100 : PIN_MAP_STRING :=
	"VSS6:		25, " &
	"VDD6:		24, " &
	"SDA:		23, " &
	"SCL:		22, " &
	"PCS0:		21, " &
	"SCK:		20, " &
	"QSDO:		19, " &
	"QSDI:		18, " &
	"PCS2:		17, " &
	"PCS3:		16, " &
	"VSSPMM2:		15, " &
	"VDDPMM2:		14, " &
	"TIN3:		13, " &
	"RTS_B0:		12, " &
	"RXD0:		11, " &
	"TXD0:		10, " &
	"CTS_B0:		9, " &
	"RTC_XTAL:		8, " &
	"RTC_EXTAL:		7, " &
	"TIN1:		6, " &
	"TIN0:		5, " &
	"RCON_B:		4, " &
	"TEST:		3, " &
	"VSSF1:		2, " &
	"VDDF1:		1, " &
	"CLKMOD1:		100, " &
	"CLKMOD0:		99, " &
	"RSTOUT_B:		98, " &
	"RSTIN_B:		97, " &
	"IRQ_B3:		96, " &
	"IRQ_B5:		95, " &
	"FEC_RXD3:		94, " &
	"FEC_RXD2:		93, " &
	"VDD2:		92, " &
	"VSS2:		91, " &
	"FEC_RXD1:		90, " &
	"FEC_RXD0:		89, " &
	"FEC_RXDV:		88, " &
	"FEC_RXCLK:		87, " &
	"FEC_RXER:		86, " &
	"FEC_TXER:		85, " &
	"FEC_TXCLK:		84, " &
	"FEC_TXEN:		83, " &
	"VDDF2:		82, " &
	"VSSF2:		81, " &
	"FEC_TXD0:		80, " &
	"FEC_TXD1:		79, " &
	"FEC_TXD2:		78, " &
	"FEC_TXD3:		77, " &
	"FEC_COL:		76, " &
	"FEC_CRS:		75, " &
	"VDDPLL:		74, " &
	"EXTAL:		73, " &
	"XTAL:		72, " &
	"VSSPLL:		71, " &
	"IRQ_B1:		70, " &
	"RXD2:		69, " &
	"TXD2:		68, " &
	"VDDPMM1:		67, " &
	"VSSPMM1:		66, " &
	"RTS_B2:		65, " &
	"CTS_B2:		64, " &
	"IRQ_B7:		63, " &
	"ICOC2:		62, " &
	"ICOC1:		61, " &
	"ICOC0:		60, " &
	"VDDUSB:		59, " &
	"USB_DP:		58, " &
	"USB_DM:		57, " &
	"VSSUSB:		56, " &
	"VSTBY:		55, " &
	"AN4:		54, " &
	"AN5:		53, " &
	"AN6:		52, " &
	"AN7:		51, " &
	"VDDA:		50, " &
	"VRH:		49, " &
	"VRL:		48, " &
	"VSSA:		47, " &
	"AN3:		46, " &
	"AN2:		45, " &
	"AN1:		44, " &
	"AN0:		43, " &
	"TIN2:		42, " &
	"RTS_B1:		41, " &
	"RXD1:		40, " &
	"TXD1:		39, " &
	"CTS_B1:		38, " &
	"VSS4:		37, " &
	"VDD4:		36, " &
	"ICOC3:		35, " &
	"VSS5:		34, " &
	"VDD5:		33, " &
	"JTAG_EN:		32, " &
	"TCLK:		31, " &
	"ALLPST:		30, " &
	"TDO:		29, " &
	"TDI:		28, " &
	"TRST_B:		27, " &
	"TMS:		26";
	attribute TAP_SCAN_RESET of  TRST_B: signal is true; 
        attribute TAP_SCAN_IN    of  TDI   : signal is true; 
        attribute TAP_SCAN_OUT   of  TDO   : signal is true; 
        attribute TAP_SCAN_MODE  of  TMS   : signal is true; 
        attribute TAP_SCAN_CLOCK of  TCLK  : signal is (16.0e6, BOTH); 
        attribute COMPLIANCE_PATTERNS of mcf5225x : entity is 
	   "(TEST, JTAG_EN) (01)"; 
        attribute INSTRUCTION_LENGTH of mcf5225x : entity is 4; 
        attribute INSTRUCTION_OPCODE of mcf5225x : entity is  
           "EXTEST              (0000)," & 
           "IDCODE              (0001)," & 
           "SAMPLE              (0010)," & 
           "PRELOAD             (0010)," & 
           "TEST_LEAKAGE        (0101)," & 
           "ENABLE_TEST_CTRL    (0110)," & 
           "HIGHZ               (1001)," & 
           "LOCKOUT_RECOVERY    (1011)," & 
           "CLAMP               (1100)," & 
           "BYPASS              (1111) " ; 
        attribute INSTRUCTION_CAPTURE of mcf5225x : entity is "0001"; 
        attribute INSTRUCTION_PRIVATE of mcf5225x : entity is "TEST_LEAKAGE,     " & 
                                                               "ENABLE_TEST_CTRL"; 
        attribute IDCODE_REGISTER of mcf5225x : entity is 
           "0001"          & -- version 
           "011010"        & -- design centre 
           "0010010001"    & -- part number 
           "00000001110"   & -- manufacturer identity 
           "1" ;              -- 1149.1 requirement 
        attribute REGISTER_ACCESS of mcf5225x : entity is 
           "BYPASS             (TEST_LEAKAGE),"     & 
           "TEST_CTRL[3]       (ENABLE_TEST_CTRL)," & 
           "JTAG_CFM_CLKDIV[7] (LOCKOUT_RECOVERY)"; 
        attribute BOUNDARY_LENGTH of mcf5225x : entity is 200 ;
-- KEY: 
-- cell: 
--      BC_1 = output cells and control cells 
--      BC_4 = input cells 
--      BC_6 = bidirectional cells 
-- func: 
--      output2 = two-state output 
--      bidir   = bidirectional 
--      input   = input only 
--      control = control cell with no reset or .pu, .pd or .de cell 
--      internal = unused cells or rtc_osc_ENB, rtc_osc_CLK, main_osc_ENB 
--                 or main_osc_DI cells 
-- safe: 
--      value which makes a control cell into an input. 
--      0/1 for control, X for all else 
-- ccell: 
--      number of controlling cell 
-- dis: 
--      value of controlling cell to make it an input (disable cell, 
--      same as safe value of control cell controlling it. 
-- rslt: 
--      result when disabled - Weak1 for open drains, DTACKB and RXD1, 
--      Z for all else. (All other pull-ups or pull-downs are 
--      programmable, controlled by .pu or .pd cells.) 
        attribute BOUNDARY_REGISTER of mcf5225x : entity is 
        -- num    cell   port              func     safe [ccell dis rslt]
		"0	(BC_2, *,		internal, 0)," &
		"1	(BC_2, *,		internal, 0)," &
		"2	(BC_2, *,		internal, 0)," &
		"3	(BC_2, *,		internal, 0)," &
		"4	(BC_2, *,		internal, 0)," &
		"5	(BC_2, *,		internal, 0)," &
		"6	(BC_2, *,		internal, 0)," &
		"7	(BC_2, *,		internal, 0)," &
		"8	(BC_2, *,		internal, 0)," &
		"9	(BC_2, *,		internal, 0)," &
		"10	(BC_2, *,		internal, 0)," &
		"11	(BC_2, *,		internal, 0)," &
		"12	(BC_2, *,		control, 0)," & -- SDA.ctl
		"13	(BC_7, SDA,		bidir,   X,   12,   0,   Z)," &
		"14	(BC_2, *,		control, 0)," & -- SCL.ctl
		"15	(BC_7, SCL,		bidir,   X,   14,   0,   Z)," &
		"16	(BC_2, *,		control, 0)," & -- PCS0.ctl
		"17	(BC_7, PCS0,		bidir,   X,   16,   0,   Z)," &
		"18	(BC_2, *,		control, 0)," & -- SCK.ctl
		"19	(BC_7, SCK,		bidir,   X,   18,   0,   Z)," &
		"20	(BC_2, *,		control, 0)," & -- QSDO.ctl
		"21	(BC_7, QSDO,		bidir,   X,   20,   0,   Z)," &
		"22	(BC_2, *,		control, 0)," & -- QSDI.ctl
		"23	(BC_7, QSDI,		bidir,   X,   22,   0,   Z)," &
		"24	(BC_2, *,		control, 0)," & -- PCS2.ctl
		"25	(BC_7, PCS2,		bidir,   X,   24,   0,   Z)," &
		"26	(BC_2, *,		control, 0)," & -- PCS3.ctl
		"27	(BC_7, PCS3,		bidir,   X,   26,   0,   Z)," &
		"28	(BC_2, *,		control, 0)," & -- TIN3.ctl
		"29	(BC_7, TIN3,		bidir,   X,   28,   0,   Z)," &
		"30	(BC_2, *,		control, 0)," & -- RTS_B0.ctl
		"31	(BC_7, RTS_B0,		bidir,   X,   30,   0,   Z)," &
		"32	(BC_2, *,		control, 0)," & -- RXD0.ctl
		"33	(BC_7, RXD0,		bidir,   X,   32,   0,   Z)," &
		"34	(BC_2, *,		control, 0)," & -- TXD0.ctl
		"35	(BC_7, TXD0,		bidir,   X,   34,   0,   Z)," &
		"36	(BC_2, *,		control, 0)," & -- CTS_B0.ctl
		"37	(BC_7, CTS_B0,		bidir,   X,   36,   0,   Z)," &
		"38	(BC_2, *,		control, 0)," & -- TIN1.ctl
		"39	(BC_7, TIN1,		bidir,   X,   38,   0,   Z)," &
		"40	(BC_2, *,		control, 0)," & -- TIN0.ctl
		"41	(BC_7, TIN0,		bidir,   X,   40,   0,   Z)," &
		"42	(BC_4, RCON_B,		input,   X)," &
		"43	(BC_2, *,		internal, 0)," &
		"44	(BC_2, *,		internal, 0)," &
		"45	(BC_2, *,		internal, 0)," &
		"46	(BC_2, *,		internal, 0)," &
		"47	(BC_2, *,		internal, 0)," &
		"48	(BC_2, *,		internal, 0)," &
		"49	(BC_2, *,		internal, 0)," &
		"50	(BC_2, *,		internal, 0)," &
		"51	(BC_2, *,		internal, 0)," &
		"52	(BC_2, *,		internal, 0)," &
		"53	(BC_2, *,		internal, 0)," &
		"54	(BC_2, *,		internal, 0)," &
		"55	(BC_4, CLKMOD1,		input,   X)," &
		"56	(BC_4, CLKMOD0,		input,   X)," &
		"57	(BC_2, *,		control, 0)," & -- RSTOUT_B.ctl
		"58	(BC_7, RSTOUT_B,		bidir,   X,   57,   0,   Z)," &
		"59	(BC_4, RSTIN_B,		input,   X)," &
		"60	(BC_2, *,		internal, 0)," &
		"61	(BC_2, *,		internal, 0)," &
		"62	(BC_2, *,		internal, 0)," &
		"63	(BC_2, *,		internal, 0)," &
		"64	(BC_2, *,		internal, 0)," &
		"65	(BC_2, *,		internal, 0)," &
		"66	(BC_2, *,		internal, 0)," &
		"67	(BC_2, *,		internal, 0)," &
		"68	(BC_2, *,		internal, 0)," &
		"69	(BC_2, *,		internal, 0)," &
		"70	(BC_2, *,		internal, 0)," &
		"71	(BC_2, *,		internal, 0)," &
		"72	(BC_2, *,		internal, 0)," &
		"73	(BC_2, *,		internal, 0)," &
		"74	(BC_2, *,		internal, 0)," &
		"75	(BC_2, *,		internal, 0)," &
		"76	(BC_2, *,		internal, 0)," &
		"77	(BC_2, *,		internal, 0)," &
		"78	(BC_2, *,		control, 0)," & -- IRQ_B3.ctl
		"79	(BC_7, IRQ_B3,		bidir,   X,   78,   0,   Z)," &
		"80	(BC_2, *,		control, 0)," & -- IRQ_B5.ctl
		"81	(BC_7, IRQ_B5,		bidir,   X,   80,   0,   Z)," &
		"82	(BC_2, *,		control, 0)," & -- FEC_RXD3.ctl
		"83	(BC_7, FEC_RXD3,		bidir,   X,   82,   0,   Z)," &
		"84	(BC_2, *,		control, 0)," & -- FEC_RXD2.ctl
		"85	(BC_7, FEC_RXD2,		bidir,   X,   84,   0,   Z)," &
		"86	(BC_2, *,		control, 0)," & -- FEC_RXD1.ctl
		"87	(BC_7, FEC_RXD1,		bidir,   X,   86,   0,   Z)," &
		"88	(BC_2, *,		control, 0)," & -- FEC_RXD0.ctl
		"89	(BC_7, FEC_RXD0,		bidir,   X,   88,   0,   Z)," &
		"90	(BC_2, *,		control, 0)," & -- FEC_RXDV.ctl
		"91	(BC_7, FEC_RXDV,		bidir,   X,   90,   0,   Z)," &
		"92	(BC_2, *,		control, 0)," & -- FEC_RXCLK.ctl
		"93	(BC_7, FEC_RXCLK,		bidir,   X,   92,   0,   Z)," &
		"94	(BC_2, *,		control, 0)," & -- FEC_RXER.ctl
		"95	(BC_7, FEC_RXER,		bidir,   X,   94,   0,   Z)," &
		"96	(BC_2, *,		control, 0)," & -- FEC_TXER.ctl
		"97	(BC_7, FEC_TXER,		bidir,   X,   96,   0,   Z)," &
		"98	(BC_2, *,		control, 0)," & -- FEC_TXCLK.ctl
		"99	(BC_7, FEC_TXCLK,		bidir,   X,   98,   0,   Z)," &
		"100	(BC_2, *,		control, 0)," & -- FEC_TXEN.ctl
		"101	(BC_7, FEC_TXEN,		bidir,   X,   100,   0,   Z)," &
		"102	(BC_2, *,		control, 0)," & -- FEC_TXD0.ctl
		"103	(BC_7, FEC_TXD0,		bidir,   X,   102,   0,   Z)," &
		"104	(BC_2, *,		control, 0)," & -- FEC_TXD1.ctl
		"105	(BC_7, FEC_TXD1,		bidir,   X,   104,   0,   Z)," &
		"106	(BC_2, *,		control, 0)," & -- FEC_TXD2.ctl
		"107	(BC_7, FEC_TXD2,		bidir,   X,   106,   0,   Z)," &
		"108	(BC_2, *,		control, 0)," & -- FEC_TXD3.ctl
		"109	(BC_7, FEC_TXD3,		bidir,   X,   108,   0,   Z)," &
		"110	(BC_2, *,		control, 0)," & -- FEC_COL.ctl
		"111	(BC_7, FEC_COL,		bidir,   X,   110,   0,   Z)," &
		"112	(BC_2, *,		control, 0)," & -- FEC_CRS.ctl
		"113	(BC_7, FEC_CRS,		bidir,   X,   112,   0,   Z)," &
		"114	(BC_2, *,		control, 0)," & -- IRQ_B1.ctl
		"115	(BC_7, IRQ_B1,		bidir,   X,   114,   0,   Z)," &
		"116	(BC_2, *,		control, 0)," & -- RXD2.ctl
		"117	(BC_7, RXD2,		bidir,   X,   116,   0,   Z)," &
		"118	(BC_2, *,		control, 0)," & -- TXD2.ctl
		"119	(BC_7, TXD2,		bidir,   X,   118,   0,   Z)," &
		"120	(BC_2, *,		control, 0)," & -- RTS_B2.ctl
		"121	(BC_7, RTS_B2,		bidir,   X,   120,   0,   Z)," &
		"122	(BC_2, *,		control, 0)," & -- CTS_B2.ctl
		"123	(BC_7, CTS_B2,		bidir,   X,   122,   0,   Z)," &
		"124	(BC_2, *,		control, 0)," & -- IRQ_B7.ctl
		"125	(BC_7, IRQ_B7,		bidir,   X,   124,   0,   Z)," &
		"126	(BC_2, *,		control, 0)," & -- ICOC2.ctl
		"127	(BC_7, ICOC2,		bidir,   X,   126,   0,   Z)," &
		"128	(BC_2, *,		control, 0)," & -- ICOC1.ctl
		"129	(BC_7, ICOC1,		bidir,   X,   128,   0,   Z)," &
		"130	(BC_2, *,		control, 0)," & -- ICOC0.ctl
		"131	(BC_7, ICOC0,		bidir,   X,   130,   0,   Z)," &
		"132	(BC_2, *,		internal, 0)," &
		"133	(BC_2, *,		internal, 0)," &
		"134	(BC_2, *,		internal, 0)," &
		"135	(BC_2, *,		internal, 0)," &
		"136	(BC_2, *,		internal, 0)," &
		"137	(BC_2, *,		internal, 0)," &
		"138	(BC_2, *,		internal, 0)," &
		"139	(BC_2, *,		internal, 0)," &
		"140	(BC_2, *,		internal, 0)," &
		"141	(BC_2, *,		internal, 0)," &
		"142	(BC_2, *,		internal, 0)," &
		"143	(BC_2, *,		internal, 0)," &
		"144	(BC_2, *,		internal, 0)," &
		"145	(BC_2, *,		internal, 0)," &
		"146	(BC_2, *,		internal, 0)," &
		"147	(BC_2, *,		internal, 0)," &
		"148	(BC_2, *,		control, 0)," & -- AN4.ctl
		"149	(BC_7, AN4,		bidir,   X,   148,   0,   Z)," &
		"150	(BC_2, *,		control, 0)," & -- AN5.ctl
		"151	(BC_7, AN5,		bidir,   X,   150,   0,   Z)," &
		"152	(BC_2, *,		control, 0)," & -- AN6.ctl
		"153	(BC_7, AN6,		bidir,   X,   152,   0,   Z)," &
		"154	(BC_2, *,		control, 0)," & -- AN7.ctl
		"155	(BC_7, AN7,		bidir,   X,   154,   0,   Z)," &
		"156	(BC_2, *,		control, 0)," & -- AN3.ctl
		"157	(BC_7, AN3,		bidir,   X,   156,   0,   Z)," &
		"158	(BC_2, *,		control, 0)," & -- AN2.ctl
		"159	(BC_7, AN2,		bidir,   X,   158,   0,   Z)," &
		"160	(BC_2, *,		control, 0)," & -- AN1.ctl
		"161	(BC_7, AN1,		bidir,   X,   160,   0,   Z)," &
		"162	(BC_2, *,		control, 0)," & -- AN0.ctl
		"163	(BC_7, AN0,		bidir,   X,   162,   0,   Z)," &
		"164	(BC_2, *,		control, 0)," & -- TIN2.ctl
		"165	(BC_7, TIN2,		bidir,   X,   164,   0,   Z)," &
		"166	(BC_2, *,		control, 0)," & -- RTS_B1.ctl
		"167	(BC_7, RTS_B1,		bidir,   X,   166,   0,   Z)," &
		"168	(BC_2, *,		control, 0)," & -- RXD1.ctl
		"169	(BC_7, RXD1,		bidir,   X,   168,   0,   Z)," &
		"170	(BC_2, *,		control, 0)," & -- TXD1.ctl
		"171	(BC_7, TXD1,		bidir,   X,   170,   0,   Z)," &
		"172	(BC_2, *,		control, 0)," & -- CTS_B1.ctl
		"173	(BC_7, CTS_B1,		bidir,   X,   172,   0,   Z)," &
		"174	(BC_2, *,		control, 0)," & -- ICOC3.ctl
		"175	(BC_7, ICOC3,		bidir,   X,   174,   0,   Z)," &
		"176	(BC_2, *,		internal, 0)," &
		"177	(BC_2, *,		internal, 0)," &
		"178	(BC_2, *,		internal, 0)," &
		"179	(BC_2, *,		internal, 0)," &
		"180	(BC_2, *,		internal, 0)," &
		"181	(BC_2, *,		internal, 0)," &
		"182	(BC_2, *,		internal, 0)," &
		"183	(BC_2, *,		internal, 0)," &
		"184	(BC_2, *,		internal, 0)," &
		"185	(BC_2, *,		internal, 0)," &
		"186	(BC_2, *,		internal, 0)," &
		"187	(BC_2, *,		internal, 0)," &
		"188	(BC_2, *,		internal, 0)," &
		"189	(BC_2, *,		internal, 0)," &
		"190	(BC_2, *,		internal, 0)," &
		"191	(BC_2, *,		internal, 0)," &
		"192	(BC_2, *,		internal, 0)," &
		"193	(BC_2, *,		internal, 0)," &
		"194	(BC_2, *,		internal, 0)," &
		"195	(BC_2, *,		internal, 0)," &
		"196	(BC_2, *,		internal, 0)," &
		"197	(BC_2, *,		internal, 0)," &
		"198	(BC_2, *,		control, 0)," & -- ALLPST.ctl
		"199	(BC_2, ALLPST,		output3,   X,   198,   0,   Z)";
end mcf5225x;