--$ XILINX$RCSfile: xcr3064a_vq100.bsd,v $
--$ XILINX$Revision: 0.2 $
--
-- BSDL file for device XCR3064A, package VQ100
-- Xilinx, Inc. $State: PRELIMINARY $ $Date: 2/22/00 $
-- Generated by Phillip Young
--
-- IMPORTANT NOTE WARNING !!
-- ****************************************************************
-- Boundary registers as called out by this file do not exist!
-- They must be described for BSDL Compliance. Extest and
-- Preload commands do not exist nor function. If either of
-- those commands are selected, the bypass register will be
-- used.
--
-- For technical support, contact Xilinx at
--
-- http://support.xilinx.com
--
-- or as follow:
-- North America 1-800-255-7778 hotline@xilinx.com
-- United Kingdom (44) 1932 820821 ukhelp@xilinx.com
-- France (33) 1 3463 0100 frhelp@xilinx.com
-- Germany (49) 89 991 54930 dlhelp@xilinx.com
-- Japan (81) 3-3297-9163 jhotline@xilinx.com
--
entity XCR3064A_VQ100 is
generic (PHYSICAL_PIN_MAP : string := "xcr3064a");
port (din : linkage bit_vector (0 to 3); -- Tim pin type IN
TDI : in bit; -- Tim pin type TDI
TMS : in bit; -- Tim pin type TMS
TCK : in bit; -- Tim pin type TCK
TDO : out bit; -- Tim pin type TDO
ioA : linkage bit_vector (0 to 14); -- Tim pin type IOO
ioB : linkage bit_vector (0 to 14); -- Tim pin type IOO
ioC : linkage bit_vector (0 to 14); -- Tim pin type IOO
ioD : linkage bit_vector (0 to 14); -- Tim pin type IOO
Vcc : linkage bit_vector (1 to 8);
Gnd : linkage bit_vector (1 to 8);
nc : linkage bit_vector (1 to 16)
);
use STD_1149_1_1994.ALL;
attribute COMPONENT_CONFORMANCE of XCR3064A_VQ100 : entity is "std_1149_1_1993";
attribute PIN_MAP of XCR3064A_VQ100 : entity is PHYSICAL_PIN_MAP;
constant xcr3064a : PIN_MAP_STRING :=
"din : (87, 89, 88, 90)," &
"TDI : 4," &
"TMS : 15," &
"TCK : 62," &
"TDO : 73," &
"ioA : (92,93,94,96,97,98, 1, 2, 6, 8, 9,10,12,13,14)," &
"ioB : (37,36,35,33,32,31,30,29,25,23,21,20,19,17,16)," &
"ioC : (40,41,42,44,45,46,47,48,52,54,56,57,58,60,61)," &
"ioD : (85,84,83,81,80,79,76,75,71,69,68,67,65,64,63)," &
"Vcc : ( 3, 18, 34, 39, 51, 66, 82, 91)," &
"Gnd : ( 11, 26, 38, 43, 59, 74, 86, 95)," &
"nc : (5,7,22,24,27,28,49,50,53,55,70,72,77,78,99,100)";
attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, both);
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
-- Instruction Register Definitions
attribute INSTRUCTION_LENGTH of XCR3064A_VQ100 : entity is 4;
attribute INSTRUCTION_OPCODE of XCR3064A_VQ100 : entity is
"SAMPLE (0010)," &
"EXTEST (0000)," &
"IDCODE (0001)," &
"BYPASS (1111)," &
"ENABLEOTF (1000)," &
"ENABLE (1001)," &
"ERASE (1010)," &
"PROGRAM (1011)," &
"VERIFY (1100)," &
"INIT (1101)";
attribute INSTRUCTION_CAPTURE of XCR3064A_VQ100 : entity is "0001";
attribute IDCODE_REGISTER of XCR3064A_VQ100 : entity is
"XXXX" & -- Version
"000" & -- Architecture
"010" & -- Technology
"000101" & -- Part number
"1" & -- Voltage
"100" & -- Package
"00000010101" & -- Manufacturer
"1"; -- mandatory
attribute REGISTER_ACCESS of XCR3064A_VQ100 : entity is
-- "IDCODE (IDCODE)," &
"DEVICE_ID (IDCODE)," &
"BOUNDARY (SAMPLE)," &
"BYPASS (BYPASS)," &
"DATAREG[5] (ENABLEOTF)," &
"DATAREG[5] (ENABLE)," &
"DATAREG[5] (ERASE)," &
"DATAREG[5] (PROGRAM)," &
"DATAREG[5] (VERIFY)," &
"BYPASS (INIT)";
attribute BOUNDARY_LENGTH of XCR3064A_VQ100 : entity is 1;
attribute BOUNDARY_REGISTER of XCR3064A_VQ100 : entity is
--
-- num cell port function safe [ccell disval rslt]
--
"0 (BC_1, *, INTERNAL, X)";
end XCR3064A_VQ100;