BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: MPC8544

--------------------------------------------------------------------------------
--               Freescale Boundary Scan Description Language                 --
--------------------------------------------------------------------------------
-- Boundary Scan Description Language (IEEE 1149.1b)                          --
--                                                                            --
-- Device        : MPC8544 / MPC8533 Revision 1.1                             --
-- File Version  : C                                                          --
-- File Name     : MPC8544.R1C                                                --
-- File created  : April 14, 2008                                             --
-- Package type  : FC-PBGA 783 pins                                           --
--                                                                            --
--------------------------------------------------------------------------------
-- Revision History:                                                          --
-- A - Original version:                                                      --
--     This BSDL file covers the following products:                          --
--     MPC8544                                                                --
--     MPC8533                                                                --
-- B - Fixed PIN_MAP_STRING for pins:                                         --
--     SD2_RX0, SD2_RX2, SD2_RX3,                                             --
--     SD2_RX_B0, SD2_RX_B2, SD2_RX_B3,                                       --
-- C - Updated comments only                                                  --
--                                                                            --
-- NOTE: Active low ports are designated with a "_L" suffix.                  --
--                                                                            --
-- NOTE: The IEEE 1149.1 standard optional instructions HIGHZ and             --
--       IDCODE are supported.                                                --
--                                                                            --
-- NOTE: The IEEE 1149.1 standard optional instruction CLAMP is not           --
--       supported on Revision1. It will be supported in Revision2.           --
--                                                                            --
-- NOTE: Some busses are broken out bitwise because different pin elements    --
--       have different port directions                                       --
--                                                                            --
-- NOTE: For assistance with this file, contact your sales office.            --
--                                                                            --
--                                                                            --
--------------------------------------------------------------------------------
--                                                                            --
--------------------------------------------------------------------------------
--                                                                            --
--============================================================================--
--                             IMPORTANT NOTICE                               --
--  This information is provided on an AS IS basis and without warranty.      --
--  IN NO EVENT SHALL FREESCALE BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL     --
--  DAMAGES ARISING FROM USE OF THIS INFORMATION. THIS DISCLAIMER OF          --
--  WARRANTY EXTENDS TO THE USER OF THE INFORMATION, AND TO THEIR CUSTOMERS   --
--  OR USERS OF PRODUCTS  AND IS IN LIEU OF ALL WARRANTIES WHETHER EXPRESS,   --
--  IMPLIED, OR STATUTORY, INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY    --
--  OR FITNESS FOR PARTICULAR PURPOSE.                                        --
--                                                                            --
--  FREESCALE does not represent or warrant that the information furnished    --
--  hereunder is free of infringement of any third party patents,             --
--  copyrights, trade secrets, or other intellectual property rights.         --
--                                                                            --
--  FREESCALE does not represent or warrant that the information is free of   --
--  defect, or that it meets any particular standard, requirements or need    --
--  of the user of the infomation or their customers.                         --
--                                                                            --
--  FREESCALE reserves the right to change the information in this file       --
--  without notice. The BSDL files are also available at:                     --
--                                                                            --
--           http://www.freescale.com                                         --
--                                                                            --
--============================================================================--


entity MPC8544 is
  generic (PHYSICAL_PIN_MAP : string := "PBGA");

-- PORT DESCRIPTION TERMS
-- in         = input only
-- out        = three-state output (0, Z, 1)
-- buffer     = two-state output (0, 1)
-- inout      = bidirectional
-- linkage    = OTHER (vdd, vss, analog)
-- bit        = single pin
-- bit_vector = group of pins with suffix 0 to n

 port (
      ASLEEP:                      inout    bit;
      CKSTP_IN_L:                  in       bit;
      CKSTP_OUT_L:                 out      bit;
      CLK_OUT:                     out      bit;
      DMA_DACK_L:                  inout    bit_vector(0 to 1);
      DMA_DDONE_L:                 out      bit_vector(0 to 1);
      DMA_DREQ_L:                  in       bit_vector(0 to 1);
      EC_GTX_CLK125:               in       bit;
      EC_MDC:                      inout    bit;
      EC_MDIO:                     inout    bit;
      GPIN:                        in       bit_vector(0 to 7);
      GPOUT:                       out      bit_vector(0 to 7);
      HRESET_L:                    in       bit;
      HRESET_REQ_L:                inout    bit;
      IIC1_SCL:                    inout    bit;
      IIC1_SDA:                    inout    bit;
      IIC2_SCL:                    inout    bit;
      IIC2_SDA:                    inout    bit;
      IRQ:                         in       bit_vector(0 to 7);
      IRQ_8:                       inout    bit;
      IRQ_9:                       in       bit;
      IRQ_10:                      inout    bit;
      IRQ_11:                      inout    bit;
      IRQ_OUT_L:                   out      bit;
      L1_TSTCLK:                   in       bit;
      L2_TSTCLK:                   in       bit;
      LA:                          inout    bit_vector(27 to 31);
      LAD:                         inout    bit_vector(0 to 31);
      LALE:                        inout    bit;
      LBCTL:                       inout    bit;
      LCKE:                        out      bit;
      LCLK:                        out      bit_vector(0 to 2);
      LCS_L:                       out      bit_vector(0 to 4);
      LCS_L_5:                     inout    bit;
      LCS_L_6:                     out      bit;
      LCS_L_7:                     out      bit;
      LDP_0:                       inout    bit;
      LDP_1:                       inout    bit;
      LDP_2:                       inout    bit;
      LDP_3:                       inout    bit;
      LGPL0:                       inout    bit;
      LGPL1:                       inout    bit;
      LGPL2:                       inout    bit;
      LGPL3:                       inout    bit;
      LGPL4:                       inout    bit;
      LGPL5:                       inout    bit;
      LSYNC_IN:                    in       bit;
      LSYNC_OUT:                   out      bit;
      LWE_L:                       inout    bit_vector(0 to 3);
      LSSD_MODE_L:                 in       bit;
      MA:                          inout    bit_vector(0 to 14);
      MA_15:                       out      bit;
      MBA:                         inout    bit_vector(0 to 2);
      MCAS_L:                      inout    bit;
      MCK:                         out      bit_vector(0 to 5);
      MCKE_0:                      out    bit;
      MCKE:                        out      bit_vector(1 to 3);
      MCK_L:                       out      bit_vector(0 to 5);
      MCP_L:                       in       bit;
      MCS_L:                       inout    bit_vector(0 to 3);
      MDIC:                        inout    bit_vector(0 to 1);
      MDM:                         inout    bit_vector(0 to 8);
      MDQ:                         inout    bit_vector(0 to 63);
      MDQS:                        inout    bit_vector(0 to 8);
      MDQS_L:                      inout    bit_vector(0 to 8);
      MDVAL:                       out      bit;
      MECC:                        inout    bit_vector(0 to 7);
      MODT:                        out      bit_vector(0 to 3);
      MRAS_L:                      inout    bit;
      MSRCID:                      inout    bit_vector(0 to 4);
      MWE_L:                       inout    bit;
      PCI1_AD:                     inout    bit_vector(31 downto 0);
      PCI1_CLK:                    in       bit;
      PCI1_C_BE_L:                 inout    bit_vector(3 downto 0);
      PCI1_DEVSEL_L:               inout    bit;
      PCI1_FRAME_L:                inout    bit;
      PCI1_GNT_L:                  inout    bit_vector(4 downto 0);
      PCI1_IDSEL:                  in       bit;
      PCI1_IRDY_L:                 inout    bit;
      PCI1_PAR:                    inout    bit;
      PCI1_PERR_L:                 inout    bit;
      PCI1_REQ_L_0:                inout    bit;
      PCI1_REQ_L:                  in       bit_vector(4 downto 1);
      PCI1_SERR_L:                 inout    bit;
      PCI1_STOP_L:                 inout    bit;
      PCI1_TRDY_L:                 inout    bit;
      RTC:                         in       bit;
      				  	  
      SD1_PLL_TPD:                 out      bit;
      SD1_REF_CLK:                 in       bit;   
      SD1_REF_CLK_B:               in       bit;
      SD1_RX:                      in       bit_vector(7 downto 0);          
      SD1_RX_B:                    in       bit_vector(7 downto 0);        
      SD1_TX:                      out      bit_vector(7 downto 0);           
      SD1_TX_B:                    out      bit_vector(7 downto 0);         
      SD1_TST_CLK:                 out      bit;    
      SD1_TST_CLK_B:               out      bit;  
      				  	  
      SD2_PLL_TPD:                 out      bit;
      SD2_REF_CLK:                 in       bit;   
      SD2_REF_CLK_B:               in       bit; 
      SD2_RX0:                     in       bit;
      SD2_RX2:                     in       bit;
      SD2_RX3:                     in       bit;
      SD2_RX_B0:                   in       bit;
      SD2_RX_B2:                   in       bit;
      SD2_RX_B3:                   in       bit;
      SD2_TX0:                     out      bit;
      SD2_TX2:                     out      bit;
      SD2_TX3:                     out      bit;
      SD2_TX_B0:                   out      bit;
      SD2_TX_B2:                   out      bit;
      SD2_TX_B3:                   out      bit;
      SD2_TST_CLK:                 out      bit;    
      SD2_TST_CLK_B:               out      bit;  
      				  	  
      SRESET_L:                    in       bit;
      SYSCLK:                      in       bit;
      TCK:                         in       bit;
      TDI:                         in       bit;
      TDO:                         out      bit;
      TMS:                         in       bit;  
      TEST_IN:                     in       bit;           
      TEST_OUT:                    out      bit;
      TEST_SEL_L:                  in       bit;
      TRST_L:                      in       bit;
      TRIG_IN:                     in       bit;
      TRIG_OUT:                    inout    bit;
      TSEC1_COL:                   in       bit;
      TSEC1_CRS:                   inout    bit;
      TSEC1_GTX_CLK:               out      bit;
      TSEC1_RXD:                   in       bit_vector(7 downto 0);
      TSEC1_RX_CLK:                in       bit;
      TSEC1_RX_DV:                 in       bit;
      TSEC1_RX_ER:                 in       bit;
      TSEC1_TXD:                   inout    bit_vector(7 downto 0);
      TSEC1_TX_CLK:                in       bit;
      TSEC1_TX_EN:                 out      bit;
      TSEC1_TX_ER:                 inout    bit;
      TSEC3_COL:                   in       bit;
      TSEC3_CRS:                   inout    bit;
      TSEC3_GTX_CLK:               out      bit;
      TSEC3_RXD:                   in       bit_vector(7 downto 0);
      TSEC3_RX_CLK:                in       bit;
      TSEC3_RX_DV:                 in       bit;
      TSEC3_RX_ER:                 in       bit;
      TSEC3_TXD:                   inout    bit_vector(7 downto 0);
      TSEC3_TX_CLK:                in       bit;
      TSEC3_TX_EN:                 out      bit;
      TSEC3_TX_ER:                 inout    bit;
      UART_CTS_L:                  in       bit_vector(0 to 1);
      UART_RTS_L:                  out      bit_vector(0 to 1);
      UART_SIN:                    in       bit_vector(0 to 1);
      UART_SOUT:                   out      bit_vector(0 to 1);
      UDE_L:                       in       bit;
      				  	  
-- Linkage pins				  
      MVREF:                       linkage  bit;
      SD1_IMP_CAL_RX:              linkage  bit;  
      SD1_IMP_CAL_TX:              linkage  bit;
      SD1_PLL_TPA:                 linkage  bit;
      SD2_IMP_CAL_RX:              linkage  bit;
      SD2_IMP_CAL_TX:              linkage  bit;
      SD2_PLL_TPA:                 linkage  bit;
      TEMP_ANODE:                  linkage  bit;              
      TEMP_CATHOD:                 linkage  bit;

-- Power and Ground:
      GND:                         linkage  bit_vector(0 to 79);
      OVDD:                        linkage  bit_vector(1 to 17);
      LVDD:                        linkage  bit_vector(1 to 2);
      TVDD:                        linkage  bit_vector(1 to 2);
      GVDD:                        linkage  bit_vector(0 to 33);
      BVDD:                        linkage  bit_vector(0 to 7);
      VDD:                         linkage  bit_vector(0 to 22);
      SVDD_SRDS:                   linkage  bit_vector(0 to 14);
      SVDD_SRDS_TWO:               linkage  bit_vector(0 to 4);
      XVDD_SRDS:                   linkage  bit_vector(0 to 8);
      XVDD_SRDS_TWO:               linkage  bit_vector(0 to 4);
      XGND_SRDS:                   linkage  bit_vector(0 to 9);
      XGND_SRDS_TWO:               linkage  bit_vector(0 to 5);
      SGND_SRDS:                   linkage  bit_vector(0 to 16);
      AGND_SRDS:                   linkage  bit;
      SGND_SRDS_TWO:               linkage  bit_vector(0 to 12);
      AGND_SRDS_TWO:               linkage  bit;
      AVDD_LBIU:                   linkage  bit;
      AVDD_PCI1:                   linkage  bit;
      AVDD_CORE:                   linkage  bit;
      AVDD_PLAT:                   linkage  bit;
      AVDD_SRDS:                   linkage  bit;
      AVDD_SRDS_TWO:               linkage  bit;
      NC:                          linkage  bit_vector(0 to 63);
      SENSEVDD:                    linkage  bit;
      SENSEVSS:                    linkage  bit
);

  use STD_1149_1_2001.all;

  attribute COMPONENT_CONFORMANCE of MPC8544 : entity is  "STD_1149_1_2001";

  attribute PIN_MAP of MPC8544 : entity is PHYSICAL_PIN_MAP;

  constant PBGA:   PIN_MAP_STRING :=

"ASLEEP:             AH17,"&
"CKSTP_IN_L:         AH5,"&
"CKSTP_OUT_L:        AA12,"&
"CLK_OUT:            AE16,"&
"DMA_DACK_L:        (Y13, Y12),"&
"DMA_DDONE_L:       (AA7, Y11),"&
"DMA_DREQ_L:        (AA10, AA11),"&
"EC_GTX_CLK125:      T2,"&
"EC_MDC:             AC7,"&
"EC_MDIO:            Y9,"&
"GPIN:              (AH24, AG24, AD23, AE21, AD22, AF23, AG25, AE20),"&
"GPOUT:             (AF22, AH23, AG27, AH25, AF21, AF25, AG26, AF26),"&
"HRESET_L:           AG16,"&
"HRESET_REQ_L:       AG15,"&
"IIC1_SCL:           AG21,"&
"IIC1_SDA:           AH21,"&
"IIC2_SCL:           AG13,"&
"IIC2_SDA:           AG14,"&
"IRQ:               (AG22, AF17, AD21, AF19, AG17, AF16, AC23, AC22),"&
"IRQ_8:              AC19,"&
"IRQ_9:              AG20,"&
"IRQ_10:             AE27,"&
"IRQ_11:             AE24,"&
"IRQ_OUT_L:          AD14,"&
"L1_TSTCLK:          AC20,"&
"L2_TSTCLK:          AE17,"&
"LA:                (L19, K16, K17, H17, G17),"&
"LAD:               (K22, L21, L22, K23, K24, L24, L25, K25,"&
"                    L28, L27, K28, K27, J28, H28, H27, G27,"&
"                    G26, F28, F26, F25, E28, E27, E26, F24,"&
"                    E24, C26, G24, E23, G23, F22, G22, G21),"&
"LALE:               J26,"&
"LBCTL:              J25,"&
"LCKE:               L17,"&
"LCLK:              (H24, J24, H25),"&
"LCS_L:             (K18, G19, H19, H20, G16),"&
"LCS_L_5:            H16,"&
"LCS_L_6:            J16,"&
"LCS_L_7:            L18,"&
"LDP_0:              K26,"&
"LDP_1:              G28,"&
"LDP_2:              B27,"&
"LDP_3:              E25,"&
"LGPL0:              J20,"&
"LGPL1:              K20,"&
"LGPL2:              G20,"&
"LGPL3:              H18,"&
"LGPL4:              L20,"&
"LGPL5:              K19,"&
"LSSD_MODE_L:        AH19,"&
"LSYNC_IN:           D27,"&
"LSYNC_OUT:          D28,"&
"LWE_L:             (J22, H22, H23, H21),"&
"MA:                (B7, G8,  C8, A10, D9,  C10, A11, F9,"&
"                    E9, B12, A5, A12, D11, F7,  E10),"&
"MA_15:              F10,"&
"MBA:               (A4, B5, B13),"&
"MCAS_L:             E7,"&
"MCK:               (A9, J11, J6, A8, J13, H8),"&
"MCKE_0:             H10,"&
"MCKE:              (K10, G10, H9),"&
"MCK_L:             (B9, H11, K6, B8, H13, J8),"&
"MCP_L:              AG18,"&
"MCS_L:             (D3, H6, C4, G6),"&
"MDIC:              (H15, K15),"&
"MDM:               (C25, B23, D18, B17, G4,  C2,  L3,  L2, F13),"&
"MDQ:               (A26, B26, C22, D21, D25, B25, D22, E21,"&
"                    A24, A23, B20, A20, A25, B24, B21, A21,"&
"                    E19, D19, E16, C16, F19, F18, F17, D16,"&
"                    B18, A18, A15, B14, B19, A19, A16, B15,"&
"                    D1,  F3,  G1,  H2,  E4,  G5,  H3,  J4,"& 
"                    B2,  C3,  F2,  G2,  A2,  B3,  E1,  F1,"&
"                    L5,  L4,  N3,  P3,  J3,  K4,  N4,  P4,"&
"                    J1,  K1,  P1,  R1,  J2,  K2,  N1,  R2),"&
"MDQS:              (C23, A22, E17, B16, K5, D2, M3, P2, D13),"&
"MDQS_L:            (D24, B22, C18, A17, J5, C1, M4, M2, E13),"&
"MDVAL:              Y8,"&
"MECC:              (G12, D14, F11, C11, G14, F14, C13, D12),"&
"MODT:              (E5, H7, E6, F6),"&
"MRAS_L:             C5,"&
"MSRCID:            (Y7, W9, AA9, AB6, AD5),"&
"MVREF:              A28,"&
"MWE_L:              B4,"&
"PCI1_AD:           (AE8,  AD8,  AF8,  AH12, AG12, AB9,  AC9,  AE9,"&
"                    AD10, AE10, AC11, AB11, AB12, AC12, AF12, AE11,"& 
"                    Y14,  AE15, AC15, AB15, AA15, AD16, Y15,  AB16,"& 
"                    AF18, AE18, AC17, AE19, AD19, AB17, AB18, AA16),"&
"PCI1_CLK:           AH26,"&
"PCI1_C_BE_L:       (AC10, AE12, AA14, AD17),"&
"PCI1_DEVSEL_L:      AC13,"&
"PCI1_FRAME_L:       AD12,"&
"PCI1_GNT_L:        (AE7, AH11, AG11, AC8, AE6),"&
"PCI1_IDSEL:         AG6,"&
"PCI1_IRDY_L:        AF13,"&
"PCI1_PAR:           AB14,"&
"PCI1_PERR_L:        AE14,"&
"PCI1_REQ_L_0:       AB8,"&
"PCI1_REQ_L:        (AF9, AG10, AH10, AD6),"&
"PCI1_SERR_L:        AC14,"&
"PCI1_STOP_L:        AA13,"&
"PCI1_TRDY_L:        AD13,"&
"RTC:                AF15,"&
"SD1_PLL_TPD:        V28,"&
"SD1_REF_CLK:        U28,"&
"SD1_REF_CLK_B:      U27,"&
"SD1_RX:            (AC28, AB26, AA28, Y26, T26, R28, P26, N28),"&
"SD1_RX_B:          (AC27, AB25, AA27, Y25, T25, R27, P25, N27),"& 
"SD1_TX:            (Y23, W21, V23, U21, R21, P23, N21, M23),"&       
"SD1_TX_B:          (Y22, W20, V22, U20, R20, P22, N20, M22),"& 
"SD1_TST_CLK:        T22,"& 
"SD1_TST_CLK_B:      T23,"&
"SD2_PLL_TPD:        AG3,"&  
"SD2_REF_CLK:        AE2,"& 
"SD2_REF_CLK_B:      AF2,"&
"SD2_RX0:            AD25,"&
"SD2_RX2:            AD1,"&
"SD2_RX3:            AB2,"&
"SD2_RX_B0:          AD26,"& 
"SD2_RX_B2:          AC1,"&
"SD2_RX_B3:          AA2,"&
"SD2_TX0:            AA21,"&
"SD2_TX2:            AC4,"&
"SD2_TX3:            AA5,"&
"SD2_TX_B0:          AA20,"&
"SD2_TX_B2:          AB4,"&
"SD2_TX_B3:          Y5,"&
"SD2_TST_CLK:        AG4,"& 
"SD2_TST_CLK_B:      AF4,"&
"SD1_IMP_CAL_RX:     M26,"&    
"SD2_IMP_CAL_RX:     AH3,"&    
"SD1_IMP_CAL_TX:     AE28,"&   
"SD2_IMP_CAL_TX:     Y1,"&   
"SD1_PLL_TPA:        V26,"&   
"SD2_PLL_TPA:        AH1,"&   
"SRESET_L:           AG19,"&
"SYSCLK:             AH16,"&
"TCK:                AG28,"&
"TDI:                AH28,"&
"TDO:                AF28,"&
"TMS:                AH27,"&
"TEMP_ANODE:         Y3,"&
"TEMP_CATHOD:        AA3,"&
"TEST_IN:            A13,"&
"TEST_OUT:           A6,"&
"TEST_SEL_L:         AH13,"&
"TRIG_IN:            AC5,"&
"TRIG_OUT:           AB5,"&
"TRST_L:             AH22,"&
"TSEC1_COL:          R5,"&
"TSEC1_CRS:          T4,"&
"TSEC1_GTX_CLK:      T1,"&
"TSEC1_RXD:         (U10, U9, T10, T9, U8, T8, T7, T6),"&
"TSEC1_RX_CLK:       V7,"&
"TSEC1_RX_DV:        U7,"&
"TSEC1_RX_ER:        R9,"&
"TSEC1_TXD:         (T5, U5,  V5,  V3, V2, V1, U2, U1),"&
"TSEC1_TX_CLK:       V6,"&
"TSEC1_TX_EN:        U4,"&
"TSEC1_TX_ER:        T3,"&
"TSEC3_COL:          M9,"&
"TSEC3_CRS:          L9,"&
"TSEC3_GTX_CLK:      R7,"&
"TSEC3_RXD:         (P11, N11, M11, L11, R8, N10, N9, P10),"&
"TSEC3_RX_CLK:       P9,"&
"TSEC3_RX_DV:        P8,"&
"TSEC3_RX_ER:        R11,"&
"TSEC3_TXD:         (M7,  N7,  P7,  M8,  L7, R6,  P6, M6),"&
"TSEC3_TX_CLK:       L10,"&
"TSEC3_TX_EN:        N6,"&
"TSEC3_TX_ER:        L8,"&
"UART_CTS_L:        (AH8, AF6),"&
"UART_RTS_L:        (AG8, AG9),"&
"UART_SIN:          (AG7, AH6),"&
"UART_SOUT:         (AH7, AF7),"&
"UDE_L:              AH15,"&

"GND:               (D5,   M10,  F4,   D26,  D23,  C12,  C15,  E20,"&
"                    D8,   B10,  E3,   J14,  K21,  F8,   A3,   F16,"&
"                    E12,  E15,  D17,  L1,   F21,  H1,   G13,  G15,"&
"                    G18,  C6,   A14,  A7,   G25,  H4,   C20,  J12,"&
"                    J15,  J17,  F27,  M5,   J27,  K11,  L26,  K7,"&  
"                    K8,   L12,  L15,  M14,  M16,  M18,  N13,  N15,"&
"                    N17,  N2,   P5,   P14,  P16,  P18,  R13,  R15,"&
"                    R17,  T14,  T16,  T18,  U13,  U15,  U17,  AA8,"&
"                    U6,   Y10,  AC21, AA17, AC16, V4,   AD7,  AD18,"&
"                    AE23, AF11, AF14, AG23, AH9,  A27,  B28,  C27),"&
"OVDD:              (Y16,  AB7,  AB10, AB13, AC6,  AC18, AD9,  AD11,"&
"                    AE13, AD15, AD20, AE5,  AE22, AF10, AF20, AF24,"&
"                    AF27),"&
"LVDD:              (R4, U3),"&
"TVDD:              (N8, R10),"&
"GVDD:              (B1,  B11, C7, C9,  C14, C17, D4,  D6,"&
"                    R3,  D15, E2, E8,  C24, E18, F5,  E14,"&
"                    C21, G3,  G7, G9,  G11, H5,  H12, E22,"&
"                    F15, J10, K3, K12, K14, H14, D20, E11,"&
"                    M1,  N5),"&
"BVDD:              (L23, J18, J19, F20, F23, H26, J21, J23),"&
"VDD:               (L16, L14, M13, M15, M17, N12, N14, N16,"&
"                    N18, P13, P15, P17, R12, R14, R16, R18,"&
"                    T13, T15, T17, U12, U14, U16, U18),"& 
"SVDD_SRDS:         (M27, N25, P28, R24, R26,  T24,  T27, U25,"&
"                    W24, W26, Y24, Y27, AA25, AB28, AD27),"&
"SVDD_SRDS_TWO:     (AB1, AC26, AD2, AE26, AG2),"& 
"XVDD_SRDS:         (M21, N23, P20, R22, T20, U23, V21, W22,"&
"                    Y20),"&
"XVDD_SRDS_TWO:     (Y6, AA6, AA23, AF5, AG5),"&
"XGND_SRDS:         (M20, M24, N22, P21, R23, T21, U22, V20,"&
"                    W23, Y21),"&
"XGND_SRDS_TWO:     (Y4, AA4, AA22, AD4, AE4, AH4),"&
"SGND_SRDS:         (M28, N26, P24, P27,  R25,  T28,  U24,  U26,"&
"                    V24, W25, Y28, AA24, AA26, AB24, AB27, AC24,"&
"                    AD28),"&
"AGND_SRDS:          V27,"&
"SGND_SRDS_TWO:     (Y2,  AA1, AB3,  AC2, AC3, AC25, AD3, AD24,"&
"                    AE3, AE1, AE25, AF3, AH2),"&
"AGND_SRDS_TWO:      AF1,"& 
"AVDD_LBIU:          C28,"&
"AVDD_PCI1:          AH20,"&
"AVDD_CORE:          AH14,"&     
"AVDD_PLAT:          AH18,"&
"AVDD_SRDS:          W28,"&
"AVDD_SRDS_TWO:      AG1,"&
"SENSEVDD:           W11,"&
"SENSEVSS:           W10,"&
"NC:                (C19, D7,   D10,  K13,  L6,   K9,   B6,   F12,"&
"                    J7,  M19,  M25,  N19,  N24,  P19,  R19,  AB19,"&
"                    T12, W3,   M12,  W5,   P12,  T19,  W1,   W7,"&
"                    L13, U19,  W4,   V8,   V9,   V10,  V11,  V12,"&
"                    V13, V14,  V15,  V16,  V17,  V18,  V19,  W2,"&
"                    W6,  W8,   T11,  U11,  W12,  W13,  W14,  W15,"&
"                    W16, W17,  W18,  W19,  W27,  V25,  Y17,  Y18,"&
"                    Y19, AA18, AA19, AB20, AB21, AB22, AB23, J9)";     

   attribute PORT_GROUPING of MPC8544 : entity is
   "Differential_Voltage ("&
		          "(SD1_RX(0), SD1_RX_B(0)),"&
		          "(SD1_RX(1), SD1_RX_B(1)),"&	   
		          "(SD1_RX(2), SD1_RX_B(2)),"&	   
		          "(SD1_RX(3), SD1_RX_B(3)),"&	   
		          "(SD1_RX(4), SD1_RX_B(4)),"&	   
		          "(SD1_RX(5), SD1_RX_B(5)),"&	   
		          "(SD1_RX(6), SD1_RX_B(6)),"&	   
		          "(SD1_RX(7), SD1_RX_B(7)),"&         
                          "(SD1_TX(0), SD1_TX_B(0)),"&
                          "(SD1_TX(1), SD1_TX_B(1)),"&
                          "(SD1_TX(2), SD1_TX_B(2)),"&
                          "(SD1_TX(3), SD1_TX_B(3)),"&
                          "(SD1_TX(4), SD1_TX_B(4)),"&
                          "(SD1_TX(5), SD1_TX_B(5)),"&
                          "(SD1_TX(6), SD1_TX_B(6)),"&
                          "(SD1_TX(7), SD1_TX_B(7)),"&
                          "(SD1_REF_CLK, SD1_REF_CLK_B),"&
                          "(SD1_TST_CLK, SD1_TST_CLK_B),"&
                          "(SD2_REF_CLK, SD2_REF_CLK_B),"&
                          "(SD2_RX0, SD2_RX_B0),"&
                          "(SD2_RX2, SD2_RX_B2),"&
                          "(SD2_RX3, SD2_RX_B3),"&
                          "(SD2_TX0, SD2_TX_B0),"&
                          "(SD2_TX2, SD2_TX_B2),"&
                          "(SD2_TX3, SD2_TX_B3),"&
                          "(SD2_TST_CLK, SD2_TST_CLK_B))";                        

  attribute TAP_SCAN_IN    of TDI   : signal is true;
  attribute TAP_SCAN_MODE  of TMS   : signal is true;
  attribute TAP_SCAN_OUT   of TDO   : signal is true;
  attribute TAP_SCAN_CLOCK of TCK   : signal is (30.0e6, BOTH);
  attribute TAP_SCAN_RESET of TRST_L : signal is true;

  attribute COMPLIANCE_PATTERNS of MPC8544 : entity is
       "(LSSD_MODE_L, TEST_SEL_L) (11)";

  attribute INSTRUCTION_LENGTH of MPC8544 : entity is 8;

  attribute INSTRUCTION_OPCODE of MPC8544 : entity is 
-- Public instructions:
       "EXTEST          (00000000), "&     -- Hex 00
       "SAMPLE          (11110000), "&     -- Hex F0
       "PRELOAD         (11110000), "&     -- Hex F0
       "BYPASS          (11111111), "&     -- Hex FF
       "HIGHZ           (11110010), "&     -- Hex F2
       "IDCODE          (11110011), "&     -- Hex F3
       "CLAMP           (11110001), "&     -- Hex F1

-- Private instructions:
        "PRIVATE000(11111110), "&   -- Hex FE
        "PRIVATE001(00000101), "&   -- Hex 05
        "PRIVATE002(00000110), "&   -- Hex 06
        "PRIVATE003(00000111), "&   -- Hex 07
        "PRIVATE004(00000011), "&   -- Hex 03
        "PRIVATE005(00000100), "&   -- Hex 04
        "PRIVATE006(00110000), "&   -- Hex 30
        "PRIVATE007(00001010), "&   -- Hex 0A
        "PRIVATE008(00111000), "&   -- Hex 38        
        "PRIVATE009(00110100), "&   -- Hex 34        
        "PRIVATE010(00110101), "&   -- Hex 35
        "PRIVATE011(00110110), "&   -- Hex 36
        "PRIVATE012(00110111), "&   -- Hex 37
        "PRIVATE013(01000100), "&   -- Hex 44
        "PRIVATE014(00001001), "&   -- Hex 09
        "PRIVATE015(00001011), "&   -- Hex 0B
        "PRIVATE016(00001100), "&   -- Hex 0C
        "PRIVATE017(00001110), "&   -- Hex 0E
        "PRIVATE018(00010000), "&   -- Hex 10
        "PRIVATE019(00010001), "&   -- Hex 11
        "PRIVATE020(00010010), "&   -- Hex 12
        "PRIVATE021(00010011), "&   -- Hex 13
        "PRIVATE022(00010100)  ";   -- Hex 14

                                    
  attribute INSTRUCTION_CAPTURE of MPC8544 : entity is "xxxxxx01";
                                                
-- Use of some private opcodes can result in damage to the circuit,
-- board, or system.
  attribute INSTRUCTION_PRIVATE of MPC8544 : entity is
        "PRIVATE000, PRIVATE001, PRIVATE002, PRIVATE003, "& 
        "PRIVATE004, PRIVATE005, PRIVATE006, PRIVATE007, "& 
        "PRIVATE008, PRIVATE009, PRIVATE010, PRIVATE011, "& 
        "PRIVATE012, PRIVATE013, PRIVATE014, PRIVATE015, "& 
        "PRIVATE016, PRIVATE017, PRIVATE018, PRIVATE019, "& 
        "PRIVATE020, PRIVATE021, PRIVATE022"; 

  attribute IDCODE_REGISTER of MPC8544 : entity is
      "0000" &              -- Version
      "0000000000110100" &  -- Part number
      "00000001110" &       -- Manufacturer Identity
      "1";                  -- Mandatory LSB

  attribute REGISTER_ACCESS of MPC8544 : entity is
        "BYPASS(BYPASS),"&
        "BOUNDARY (SAMPLE)";
  attribute BOUNDARY_LENGTH of MPC8544 : entity is 674;

  attribute BOUNDARY_REGISTER of MPC8544 : entity is

-- PORT DESCRIPTION TERMS
-- cell type: BC_6 bidirectional else BC_2
-- port: port name with index if port description says bit_vector
-- function
--     input        = input only
--     bidir        = bidirectional
--     control      = control cell
--     buffer       = output only
--     output3      = three state ouput
--     observe_only = observe only
-- safe = value in control cell to make input = 0 for bidir and controlr
-- ccell = controlling cell number for I/O direction
-- dsval = disabling (input) value
-- rslt  = result if disabled (input = Z)

-- tdo = first cell shifted out during ShiftDR
-- num   cell            port          function    safe   ccell dsval rslt
  "0    (BC_2,     TSEC1_RX_CLK,          input,    X),                    "&
  "1    (BC_2,      TSEC1_RX_ER,          input,    X),                    "&
  "2    (BC_2,      TSEC1_RX_DV,          input,    X),                    "&
  "3    (BC_2,     TSEC1_RXD(0),          input,    X),                    "&
  "4    (BC_2,     TSEC1_RXD(1),          input,    X),                    "&
  "5    (BC_2,     TSEC1_RXD(2),          input,    X),                    "&
  "6    (BC_2,     TSEC1_RXD(3),          input,    X),                    "&
  "7    (BC_2,     TSEC1_RXD(4),          input,    X),                    "&
  "8    (BC_2,     TSEC1_RXD(5),          input,    X),                    "&
  "9    (BC_2,     TSEC1_RXD(6),          input,    X),                    "&
  "10   (BC_2,     TSEC1_RXD(7),          input,    X),                    "&
  "11   (BC_2,        TSEC1_COL,          input,    X),                    "&
  "12   (BC_6,        TSEC1_CRS,          bidir,    0,      13,   0,   Z), "&
  "13   (BC_2,                *,        control,    0),                    "&
  "14   (BC_2,    TSEC1_GTX_CLK,        output3,    0,      15,   0,   Z), "&
  "15   (BC_2,                *,        control,    0),                    "&
  "16   (BC_2,     TSEC1_TX_CLK,          input,    X),                    "&
  "17   (BC_6,      TSEC1_TX_ER,          bidir,    0,      18,   0,   Z), "&
  "18   (BC_2,                *,        control,    0),                    "&
  "19   (BC_2,      TSEC1_TX_EN,        output3,    0,      20,   0,   Z), "&
  "20   (BC_2,                *,        control,    0),                    "&
  "21   (BC_6,     TSEC1_TXD(0),          bidir,    0,      22,   0,   Z), "&
  "22   (BC_2,                *,        control,    0),                    "&
  "23   (BC_6,     TSEC1_TXD(1),          bidir,    0,      28,   0,   Z), "&
  "24   (BC_6,     TSEC1_TXD(2),          bidir,    0,      25,   0,   Z), "&
  "25   (BC_2,                *,        control,    0),                    "&
  "26   (BC_6,     TSEC1_TXD(3),          bidir,    0,      22,   0,   Z), "&
  "27   (BC_6,     TSEC1_TXD(4),          bidir,    0,      28,   0,   Z), "&
  "28   (BC_2,                *,        control,    0),                    "&
  "29   (BC_6,     TSEC1_TXD(5),          bidir,    0,      22,   0,   Z), "&
  "30   (BC_6,     TSEC1_TXD(6),          bidir,    0,      25,   0,   Z), "&
  "31   (BC_6,     TSEC1_TXD(7),          bidir,    0,      25,   0,   Z), "&
  "32   (BC_2,    EC_GTX_CLK125,          input,    X),                    "&
  "33   (BC_2,     TSEC3_RX_CLK,          input,    X),                    "&
  "34   (BC_2,      TSEC3_RX_ER,          input,    X),                    "&
  "35   (BC_2,      TSEC3_RX_DV,          input,    X),                    "&
  "36   (BC_2,     TSEC3_RXD(0),          input,    X),                    "&
  "37   (BC_2,     TSEC3_RXD(1),          input,    X),                    "&
  "38   (BC_2,     TSEC3_RXD(2),          input,    X),                    "&
  "39   (BC_2,     TSEC3_RXD(3),          input,    X),                    "&
  "40   (BC_2,     TSEC3_RXD(4),          input,    X),                    "&
  "41   (BC_2,     TSEC3_RXD(5),          input,    X),                    "&
  "42   (BC_2,     TSEC3_RXD(6),          input,    X),                    "&
  "43   (BC_2,     TSEC3_RXD(7),          input,    X),                    "&
  "44   (BC_2,        TSEC3_COL,          input,    X),                    "&
  "45   (BC_6,        TSEC3_CRS,          bidir,    0,      46,   0,   Z), "&
  "46   (BC_2,                *,        control,    0),                    "&
  "47   (BC_2,    TSEC3_GTX_CLK,        output3,    0,      48,   0,   Z), "&
  "48   (BC_2,                *,        control,    0),                    "&
  "49   (BC_2,     TSEC3_TX_CLK,          input,    X),                    "&
  "50   (BC_6,      TSEC3_TX_ER,          bidir,    0,      51,   0,   Z), "&
  "51   (BC_2,                *,        control,    0),                    "&
  "52   (BC_2,      TSEC3_TX_EN,        output3,    0,      53,   0,   Z), "&
  "53   (BC_2,                *,        control,    0),                    "&
  "54   (BC_6,     TSEC3_TXD(0),          bidir,    0,      55,   0,   Z), "&
  "55   (BC_2,                *,        control,    0),                    "&
  "56   (BC_6,     TSEC3_TXD(1),          bidir,    0,      55,   0,   Z), "&
  "57   (BC_6,     TSEC3_TXD(2),          bidir,    0,      58,   0,   Z), "&
  "58   (BC_2,                *,        control,    0),                    "&
  "59   (BC_6,     TSEC3_TXD(3),          bidir,    0,      58,   0,   Z), "&
  "60   (BC_6,     TSEC3_TXD(4),          bidir,    0,      61,   0,   Z), "&
  "61   (BC_2,                *,        control,    0),                    "&
  "62   (BC_6,     TSEC3_TXD(5),          bidir,    0,      55,   0,   Z), "&
  "63   (BC_6,     TSEC3_TXD(6),          bidir,    0,      58,   0,   Z), "&
  "64   (BC_6,     TSEC3_TXD(7),          bidir,    0,      58,   0,   Z), "&
  "65   (BC_6,           MDQ(0),          bidir,    0,      66,   0,   Z), "&
  "66   (BC_2,                *,        control,    0),                    "&
  "67   (BC_6,           MDQ(4),          bidir,    0,      68,   0,   Z), "&
  "68   (BC_2,                *,        control,    0),                    "&
  "69   (BC_6,           MDQ(1),          bidir,    0,      70,   0,   Z), "&
  "70   (BC_2,                *,        control,    0),                    "&
  "71   (BC_6,          MDIC(1),          bidir,    0,      72,   0,   Z), "&
  "72   (BC_2,                *,        control,    0),                    "&
  "73   (BC_6,          MDIC(0),          bidir,    0,      74,   0,   Z), "&
  "74   (BC_2,                *,        control,    0),                    "&
  "75   (BC_6,          MDQS(0),          bidir,    0,      76,   0,   Z), "&
  "76   (BC_2,                *,        control,    0),                    "&
  "77   (BC_6,        MDQS_L(0),          bidir,    0,      78,   0,   Z), "&
  "78   (BC_2,                *,        control,    0),                    "&
  "79   (BC_6,           MDM(0),          bidir,    0,      80,   0,   Z), "&
  "80   (BC_2,                *,        control,    0),                    "&
  "81   (BC_6,           MDQ(5),          bidir,    0,      82,   0,   Z), "&
  "82   (BC_2,                *,        control,    0),                    "&
  "83   (BC_6,           MDQ(2),          bidir,    0,      84,   0,   Z), "&
  "84   (BC_2,                *,        control,    0),                    "&
  "85   (BC_6,           MDQ(6),          bidir,    0,      86,   0,   Z), "&
  "86   (BC_2,                *,        control,    0),                    "&
  "87   (BC_6,           MDQ(3),          bidir,    0,      88,   0,   Z), "&
  "88   (BC_2,                *,        control,    0),                    "&
  "89   (BC_6,           MDQ(7),          bidir,    0,      90,   0,   Z), "&
  "90   (BC_2,                *,        control,    0),                    "&
  "91   (BC_6,           MDQ(8),          bidir,    0,      92,   0,   Z), "&
  "92   (BC_2,                *,        control,    0),                    "&
  "93   (BC_6,           MDM(1),          bidir,    0,      94,   0,   Z), "&
  "94   (BC_2,                *,        control,    0),                    "&
  "95   (BC_6,          MDQ(12),          bidir,    0,      96,   0,   Z), "&
  "96   (BC_2,                *,        control,    0),                    "&
  "97   (BC_6,           MDQ(9),          bidir,    0,      98,   0,   Z), "&
  "98   (BC_2,                *,        control,    0),                    "&
  "99   (BC_6,          MDQS(1),          bidir,    0,     100,   0,   Z), "&
  "100  (BC_2,                *,        control,    0),                    "&
  "101  (BC_6,        MDQS_L(1),          bidir,    0,     102,   0,   Z), "&
  "102  (BC_2,                *,        control,    0),                    "&
  "103  (BC_6,          MDQ(11),          bidir,    0,     104,   0,   Z), "&
  "104  (BC_2,                *,        control,    0),                    "&
  "105  (BC_6,          MDQ(10),          bidir,    0,     106,   0,   Z), "&
  "106  (BC_2,                *,        control,    0),                    "&
  "107  (BC_2,           MCK(1),        output3,    0,     108,   0,   Z), "&
  "108  (BC_2,                *,        control,    0),                    "&
  "109  (BC_2,         MCK_L(1),        output3,    0,     108,   0,   Z), "&
  "110  (BC_6,          MDQ(13),          bidir,    0,     111,   0,   Z), "&
  "111  (BC_2,                *,        control,    0),                    "&
  "112  (BC_6,          MDQ(14),          bidir,    0,     113,   0,   Z), "&
  "113  (BC_2,                *,        control,    0),                    "&
  "114  (BC_2,           MCK(4),        output3,    0,     115,   0,   Z), "&
  "115  (BC_2,                *,        control,    0),                    "&
  "116  (BC_2,         MCK_L(4),        output3,    0,     115,   0,   Z), "&
  "117  (BC_6,          MDQ(15),          bidir,    0,     118,   0,   Z), "&
  "118  (BC_2,                *,        control,    0),                    "&
  "119  (BC_6,          MDQ(17),          bidir,    0,     120,   0,   Z), "&
  "120  (BC_2,                *,        control,    0),                    "&
  "121  (BC_6,          MDQ(16),          bidir,    0,     122,   0,   Z), "&
  "122  (BC_2,                *,        control,    0),                    "&
  "123  (BC_6,          MDQ(20),          bidir,    0,     124,   0,   Z), "&
  "124  (BC_2,                *,        control,    0),                    "&
  "125  (BC_6,          MDQ(21),          bidir,    0,     126,   0,   Z), "&
  "126  (BC_2,                *,        control,    0),                    "&
  "127  (BC_6,           MDM(2),          bidir,    0,     128,   0,   Z), "&
  "128  (BC_2,                *,        control,    0),                    "&
  "129  (BC_6,          MDQS(2),          bidir,    0,     130,   0,   Z), "&
  "130  (BC_2,                *,        control,    0),                    "&
  "131  (BC_6,        MDQS_L(2),          bidir,    0,     132,   0,   Z), "&
  "132  (BC_2,                *,        control,    0),                    "&
  "133  (BC_6,          MDQ(19),          bidir,    0,     134,   0,   Z), "&
  "134  (BC_2,                *,        control,    0),                    "&
  "135  (BC_6,          MDQ(18),          bidir,    0,     136,   0,   Z), "&
  "136  (BC_2,                *,        control,    0),                    "&
  "137  (BC_6,          MDQ(22),          bidir,    0,     138,   0,   Z), "&
  "138  (BC_2,                *,        control,    0),                    "&
  "139  (BC_6,          MDQ(23),          bidir,    0,     140,   0,   Z), "&
  "140  (BC_2,                *,        control,    0),                    "&
  "141  (BC_6,          MDQ(24),          bidir,    0,     142,   0,   Z), "&
  "142  (BC_2,                *,        control,    0),                    "&
  "143  (BC_6,          MDQ(25),          bidir,    0,     144,   0,   Z), "&
  "144  (BC_2,                *,        control,    0),                    "&
  "145  (BC_6,           MDM(3),          bidir,    0,     146,   0,   Z), "&
  "146  (BC_2,                *,        control,    0),                    "&
  "147  (BC_6,          MDQ(29),          bidir,    0,     148,   0,   Z), "&
  "148  (BC_2,                *,        control,    0),                    "&
  "149  (BC_6,          MDQ(28),          bidir,    0,     150,   0,   Z), "&
  "150  (BC_2,                *,        control,    0),                    "&
  "151  (BC_6,          MDQ(30),          bidir,    0,     152,   0,   Z), "&
  "152  (BC_2,                *,        control,    0),                    "&
  "153  (BC_6,          MDQS(3),          bidir,    0,     154,   0,   Z), "&
  "154  (BC_2,                *,        control,    0),                    "&
  "155  (BC_6,        MDQS_L(3),          bidir,    0,     156,   0,   Z), "&
  "156  (BC_2,                *,        control,    0),                    "&
  "157  (BC_6,          MDQ(26),          bidir,    0,     158,   0,   Z), "&
  "158  (BC_2,                *,        control,    0),                    "&
  "159  (BC_6,          MDQ(27),          bidir,    0,     160,   0,   Z), "&
  "160  (BC_2,                *,        control,    0),                    "&
  "161  (BC_6,          MDQ(31),          bidir,    0,     162,   0,   Z), "&
  "162  (BC_2,                *,        control,    0),                    "&
  "163  (BC_6,          MECC(4),          bidir,    0,     164,   0,   Z), "&
  "164  (BC_2,                *,        control,    0),                    "&
  "165  (BC_6,          MECC(0),          bidir,    0,     166,   0,   Z), "&
  "166  (BC_2,                *,        control,    0),                    "&
  "167  (BC_6,          MECC(1),          bidir,    0,     168,   0,   Z), "&
  "168  (BC_2,                *,        control,    0),                    "&
  "169  (BC_6,          MECC(5),          bidir,    0,     170,   0,   Z), "&
  "170  (BC_2,                *,        control,    0),                    "&
  "171  (BC_6,           MDM(8),          bidir,    0,     172,   0,   Z), "&
  "172  (BC_2,                *,        control,    0),                    "&
  "173  (BC_6,          MECC(2),          bidir,    0,     174,   0,   Z), "&
  "174  (BC_2,                *,        control,    0),                    "&
  "175  (BC_6,          MDQS(8),          bidir,    0,     176,   0,   Z), "&
  "176  (BC_2,                *,        control,    0),                    "&
  "177  (BC_6,        MDQS_L(8),          bidir,    0,     178,   0,   Z), "&
  "178  (BC_2,                *,        control,    0),                    "&
  "179  (BC_6,          MECC(7),          bidir,    0,     180,   0,   Z), "&
  "180  (BC_2,                *,        control,    0),                    "&
  "181  (BC_6,          MECC(3),          bidir,    0,     182,   0,   Z), "&
  "182  (BC_2,                *,        control,    0),                    "&
  "183  (BC_6,          MECC(6),          bidir,    0,     184,   0,   Z), "&
  "184  (BC_2,                *,        control,    0),                    "&
  "185  (BC_2,                *,        control,    0),                    "&
  "186  (BC_2,         TEST_OUT,        output3,    0,     185,   0,   Z), "&
  "187  (BC_2,          MCKE(1),        output3,    0,     188,   0,   Z), "&
  "188  (BC_2,                *,        control,    0),                    "&
  "189  (BC_2,           MCKE_0,        output3,    0,     190,   0,   Z), "&
  "190  (BC_2,                *,        control,    0),                    "&
  "191  (BC_2,          MCKE(3),        output3,    0,     193,   0,   Z), "&
  "192  (BC_2,          MCKE(2),        output3,    0,     193,   0,   Z), "&
  "193  (BC_2,                *,        control,    0),                    "&
  "194  (BC_2,            MA_15,        output3,    0,     195,   0,   Z), "&
  "195  (BC_2,                *,        control,    0),                    "&
  "196  (BC_6,           MBA(2),          bidir,    0,     197,   0,   Z), "&
  "197  (BC_2,                *,        control,    0),                    "&
  "198  (BC_6,           MA(11),          bidir,    0,     199,   0,   Z), "&
  "199  (BC_2,                *,        control,    0),                    "&
  "200  (BC_6,           MA(12),          bidir,    0,     201,   0,   Z), "&
  "201  (BC_2,                *,        control,    0),                    "&
  "202  (BC_6,           MA(14),          bidir,    0,     199,   0,   Z), "&
  "203  (BC_6,            MA(9),          bidir,    0,     201,   0,   Z), "&
  "204  (BC_6,            MA(7),          bidir,    0,     199,   0,   Z), "&
  "205  (BC_6,            MA(5),          bidir,    0,     208,   0,   Z), "&
  "206  (BC_6,            MA(8),          bidir,    0,     201,   0,   Z), "&
  "207  (BC_6,            MA(6),          bidir,    0,     208,   0,   Z), "&
  "208  (BC_2,                *,        control,    0),                    "&
  "209  (BC_6,            MA(4),          bidir,    0,     218,   0,   Z), "&
  "210  (BC_6,            MA(1),          bidir,    0,     208,   0,   Z), "&
  "211  (BC_6,            MA(2),          bidir,    0,     199,   0,   Z), "&
  "212  (BC_6,            MA(3),          bidir,    0,     201,   0,   Z), "&
  "213  (BC_2,           MCK(0),        output3,    0,     214,   0,   Z), "&
  "214  (BC_2,                *,        control,    0),                    "&
  "215  (BC_2,         MCK_L(0),        output3,    0,     216,   0,   Z), "&
  "216  (BC_2,                *,        control,    0),                    "&
  "217  (BC_6,            MA(0),          bidir,    0,     218,   0,   Z), "&
  "218  (BC_2,                *,        control,    0),                    "&
  "219  (BC_6,           MA(10),          bidir,    0,     218,   0,   Z), "&
  "220  (BC_2,           MCK(3),        output3,    0,     221,   0,   Z), "&
  "221  (BC_2,                *,        control,    0),                    "&
  "222  (BC_2,         MCK_L(3),        output3,    0,     221,   0,   Z), "&
  "223  (BC_6,           MRAS_L,          bidir,    0,     224,   0,   Z), "&
  "224  (BC_2,                *,        control,    0),                    "&
  "225  (BC_6,           MBA(0),          bidir,    0,     226,   0,   Z), "&
  "226  (BC_2,                *,        control,    0),                    "&
  "227  (BC_6,           MBA(1),          bidir,    0,     226,   0,   Z), "&
  "228  (BC_6,           MCAS_L,          bidir,    0,     229,   0,   Z), "&
  "229  (BC_2,                *,        control,    0),                    "&
  "230  (BC_6,            MWE_L,          bidir,    0,     231,   0,   Z), "&
  "231  (BC_2,                *,        control,    0),                    "&
  "232  (BC_6,         MCS_L(1),          bidir,    0,     234,   0,   Z), "&
  "233  (BC_6,         MCS_L(0),          bidir,    0,     234,   0,   Z), "&
  "234  (BC_2,                *,        control,    0),                    "&
  "235  (BC_6,         MCS_L(2),          bidir,    0,     234,   0,   Z), "&
  "236  (BC_6,         MCS_L(3),          bidir,    0,     234,   0,   Z), "&
  "237  (BC_2,          MODT(2),        output3,    0,     238,   0,   Z), "&
  "238  (BC_2,                *,        control,    0),                    "&
  "239  (BC_2,          MODT(1),        output3,    0,     240,   0,   Z), "&
  "240  (BC_2,                *,        control,    0),                    "&
  "241  (BC_2,          MODT(0),        output3,    0,     242,   0,   Z), "&
  "242  (BC_2,                *,        control,    0),                    "&
  "243  (BC_2,          MODT(3),        output3,    0,     244,   0,   Z), "&
  "244  (BC_2,                *,        control,    0),                    "&
  "245  (BC_6,           MA(13),          bidir,    0,     246,   0,   Z), "&
  "246  (BC_2,                *,        control,    0),                    "&
  "247  (BC_2,          TEST_IN,          input,    X),                    "&
  "248  (BC_6,          MDQ(36),          bidir,    0,     249,   0,   Z), "&
  "249  (BC_2,                *,        control,    0),                    "&
  "250  (BC_6,          MDQ(32),          bidir,    0,     251,   0,   Z), "&
  "251  (BC_2,                *,        control,    0),                    "&
  "252  (BC_6,          MDQ(37),          bidir,    0,     253,   0,   Z), "&
  "253  (BC_2,                *,        control,    0),                    "&
  "254  (BC_6,           MDM(4),          bidir,    0,     255,   0,   Z), "&
  "255  (BC_2,                *,        control,    0),                    "&
  "256  (BC_6,          MDQ(33),          bidir,    0,     257,   0,   Z), "&
  "257  (BC_2,                *,        control,    0),                    "&
  "258  (BC_6,          MDQS(4),          bidir,    0,     259,   0,   Z), "&
  "259  (BC_2,                *,        control,    0),                    "&
  "260  (BC_6,        MDQS_L(4),          bidir,    0,     261,   0,   Z), "&
  "261  (BC_2,                *,        control,    0),                    "&
  "262  (BC_6,          MDQ(38),          bidir,    0,     263,   0,   Z), "&
  "263  (BC_2,                *,        control,    0),                    "&
  "264  (BC_6,          MDQ(39),          bidir,    0,     265,   0,   Z), "&
  "265  (BC_2,                *,        control,    0),                    "&
  "266  (BC_6,          MDQ(34),          bidir,    0,     267,   0,   Z), "&
  "267  (BC_2,                *,        control,    0),                    "&
  "268  (BC_6,          MDQ(35),          bidir,    0,     269,   0,   Z), "&
  "269  (BC_2,                *,        control,    0),                    "&
  "270  (BC_6,          MDQ(44),          bidir,    0,     271,   0,   Z), "&
  "271  (BC_2,                *,        control,    0),                    "&
  "272  (BC_6,          MDQ(41),          bidir,    0,     273,   0,   Z), "&
  "273  (BC_2,                *,        control,    0),                    "&
  "274  (BC_6,          MDQ(45),          bidir,    0,     275,   0,   Z), "&
  "275  (BC_2,                *,        control,    0),                    "&
  "276  (BC_6,          MDQ(40),          bidir,    0,     277,   0,   Z), "&
  "277  (BC_2,                *,        control,    0),                    "&
  "278  (BC_6,          MDQ(46),          bidir,    0,     279,   0,   Z), "&
  "279  (BC_2,                *,        control,    0),                    "&
  "280  (BC_6,           MDM(5),          bidir,    0,     281,   0,   Z), "&
  "281  (BC_2,                *,        control,    0),                    "&
  "282  (BC_6,          MDQS(5),          bidir,    0,     283,   0,   Z), "&
  "283  (BC_2,                *,        control,    0),                    "&
  "284  (BC_6,        MDQS_L(5),          bidir,    0,     285,   0,   Z), "&
  "285  (BC_2,                *,        control,    0),                    "&
  "286  (BC_6,          MDQ(42),          bidir,    0,     287,   0,   Z), "&
  "287  (BC_2,                *,        control,    0),                    "&
  "288  (BC_6,          MDQ(47),          bidir,    0,     289,   0,   Z), "&
  "289  (BC_2,                *,        control,    0),                    "&
  "290  (BC_6,          MDQ(48),          bidir,    0,     291,   0,   Z), "&
  "291  (BC_2,                *,        control,    0),                    "&
  "292  (BC_6,          MDQ(52),          bidir,    0,     293,   0,   Z), "&
  "293  (BC_2,                *,        control,    0),                    "&
  "294  (BC_6,          MDQ(43),          bidir,    0,     295,   0,   Z), "&
  "295  (BC_2,                *,        control,    0),                    "&
  "296  (BC_6,          MDQ(53),          bidir,    0,     297,   0,   Z), "&
  "297  (BC_2,                *,        control,    0),                    "&
  "298  (BC_2,           MCK(2),        output3,    0,     299,   0,   Z), "&
  "299  (BC_2,                *,        control,    0),                    "&
  "300  (BC_2,         MCK_L(2),        output3,    0,     299,   0,   Z), "&
  "301  (BC_6,          MDQ(49),          bidir,    0,     302,   0,   Z), "&
  "302  (BC_2,                *,        control,    0),                    "&
  "303  (BC_6,           MDM(6),          bidir,    0,     304,   0,   Z), "&
  "304  (BC_2,                *,        control,    0),                    "&
  "305  (BC_2,           MCK(5),        output3,    0,     306,   0,   Z), "&
  "306  (BC_2,                *,        control,    0),                    "&
  "307  (BC_2,         MCK_L(5),        output3,    0,     306,   0,   Z), "&
  "308  (BC_6,          MDQ(54),          bidir,    0,     309,   0,   Z), "&
  "309  (BC_2,                *,        control,    0),                    "&
  "310  (BC_6,          MDQ(50),          bidir,    0,     311,   0,   Z), "&
  "311  (BC_2,                *,        control,    0),                    "&
  "312  (BC_6,          MDQS(6),          bidir,    0,     313,   0,   Z), "&
  "313  (BC_2,                *,        control,    0),                    "&
  "314  (BC_6,        MDQS_L(6),          bidir,    0,     315,   0,   Z), "&
  "315  (BC_2,                *,        control,    0),                    "&
  "316  (BC_6,          MDQ(51),          bidir,    0,     317,   0,   Z), "&
  "317  (BC_2,                *,        control,    0),                    "&
  "318  (BC_6,          MDQ(55),          bidir,    0,     319,   0,   Z), "&
  "319  (BC_2,                *,        control,    0),                    "&
  "320  (BC_6,          MDQ(60),          bidir,    0,     321,   0,   Z), "&
  "321  (BC_2,                *,        control,    0),                    "&
  "322  (BC_6,          MDQ(56),          bidir,    0,     323,   0,   Z), "&
  "323  (BC_2,                *,        control,    0),                    "&
  "324  (BC_6,           MDM(7),          bidir,    0,     325,   0,   Z), "&
  "325  (BC_2,                *,        control,    0),                    "&
  "326  (BC_6,          MDQ(57),          bidir,    0,     327,   0,   Z), "&
  "327  (BC_2,                *,        control,    0),                    "&
  "328  (BC_6,          MDQS(7),          bidir,    0,     329,   0,   Z), "&
  "329  (BC_2,                *,        control,    0),                    "&
  "330  (BC_6,        MDQS_L(7),          bidir,    0,     331,   0,   Z), "&
  "331  (BC_2,                *,        control,    0),                    "&
  "332  (BC_6,          MDQ(61),          bidir,    0,     333,   0,   Z), "&
  "333  (BC_2,                *,        control,    0),                    "&
  "334  (BC_6,          MDQ(58),          bidir,    0,     335,   0,   Z), "&
  "335  (BC_2,                *,        control,    0),                    "&
  "336  (BC_6,          MDQ(62),          bidir,    0,     337,   0,   Z), "&
  "337  (BC_2,                *,        control,    0),                    "&
  "338  (BC_6,          MDQ(63),          bidir,    0,     339,   0,   Z), "&
  "339  (BC_2,                *,        control,    0),                    "&
  "340  (BC_6,          MDQ(59),          bidir,    0,     341,   0,   Z), "&
  "341  (BC_2,                *,        control,    0),                    "&
  "342  (BC_6,            LGPL5,          bidir,    0,     343,   0,   Z), "&
  "343  (BC_2,                *,        control,    0),                    "&
  "344  (BC_6,            LGPL4,          bidir,    0,     345,   0,   Z), "&
  "345  (BC_2,                *,        control,    0),                    "&
  "346  (BC_6,            LGPL3,          bidir,    0,     347,   0,   Z), "&
  "347  (BC_2,                *,        control,    0),                    "&
  "348  (BC_6,            LGPL2,          bidir,    0,     349,   0,   Z), "&
  "349  (BC_2,                *,        control,    0),                    "&
  "350  (BC_6,            LGPL1,          bidir,    0,     351,   0,   Z), "&
  "351  (BC_2,                *,        control,    0),                    "&
  "352  (BC_6,            LGPL0,          bidir,    0,     353,   0,   Z), "&
  "353  (BC_2,                *,        control,    0),                    "&
  "354  (BC_6,             LALE,          bidir,    0,     355,   0,   Z), "&
  "355  (BC_2,                *,        control,    0),                    "&
  "356  (BC_6,            LBCTL,          bidir,    0,     357,   0,   Z), "&
  "357  (BC_2,                *,        control,    0),                    "&
  "358  (BC_6,         LWE_L(3),          bidir,    0,     362,   0,   Z), "&
  "359  (BC_6,         LWE_L(2),          bidir,    0,     360,   0,   Z), "&
  "360  (BC_2,                *,        control,    0),                    "&
  "361  (BC_6,         LWE_L(1),          bidir,    0,     362,   0,   Z), "&
  "362  (BC_2,                *,        control,    0),                    "&
  "363  (BC_6,         LWE_L(0),          bidir,    0,     364,   0,   Z), "&
  "364  (BC_2,                *,        control,    0),                    "&
  "365  (BC_2,          LCS_L_7,        output3,    0,     366,   0,   Z), "&
  "366  (BC_2,                *,        control,    0),                    "&
  "367  (BC_2,          LCS_L_6,        output3,    0,     368,   0,   Z), "&
  "368  (BC_2,                *,        control,    0),                    "&
  "369  (BC_6,          LCS_L_5,          bidir,    0,     370,   0,   Z), "&
  "370  (BC_2,                *,        control,    0),                    "&
  "371  (BC_2,         LCS_L(4),        output3,    0,     372,   0,   Z), "&
  "372  (BC_2,                *,        control,    0),                    "&
  "373  (BC_2,         LCS_L(3),        output3,    0,     375,   0,   Z), "&
  "374  (BC_2,         LCS_L(2),        output3,    0,     375,   0,   Z), "&
  "375  (BC_2,                *,        control,    0),                    "&
  "376  (BC_2,         LCS_L(1),        output3,    0,     377,   0,   Z), "&
  "377  (BC_2,                *,        control,    0),                    "&
  "378  (BC_2,         LCS_L(0),        output3,    0,     379,   0,   Z), "&
  "379  (BC_2,                *,        control,    0),                    "&
  "380  (BC_6,           LA(31),          bidir,    0,     382,   0,   Z), "&
  "381  (BC_6,           LA(30),          bidir,    0,     382,   0,   Z), "&
  "382  (BC_2,                *,        control,    0),                    "&
  "383  (BC_6,           LA(29),          bidir,    0,     385,   0,   Z), "&
  "384  (BC_6,           LA(28),          bidir,    0,     385,   0,   Z), "&
  "385  (BC_2,                *,        control,    0),                    "&
  "386  (BC_6,           LA(27),          bidir,    0,     385,   0,   Z), "&
  "387  (BC_6,            LDP_3,          bidir,    0,     388,   0,   Z), "&
  "388  (BC_2,                *,        control,    0),                    "&
  "389  (BC_6,            LDP_2,          bidir,    0,     390,   0,   Z), "&
  "390  (BC_2,                *,        control,    0),                    "&
  "391  (BC_6,            LDP_1,          bidir,    0,     393,   0,   Z), "&
  "392  (BC_6,            LDP_0,          bidir,    0,     393,   0,   Z), "&
  "393  (BC_2,                *,        control,    0),                    "&
  "394  (BC_6,          LAD(31),          bidir,    0,     406,   0,   Z), "&
  "395  (BC_6,          LAD(30),          bidir,    0,     403,   0,   Z), "&
  "396  (BC_6,          LAD(29),          bidir,    0,     406,   0,   Z), "&
  "397  (BC_6,          LAD(28),          bidir,    0,     398,   0,   Z), "&
  "398  (BC_2,                *,        control,    0),                    "&
  "399  (BC_6,          LAD(27),          bidir,    0,     398,   0,   Z), "&
  "400  (BC_6,          LAD(26),          bidir,    0,     398,   0,   Z), "&
  "401  (BC_6,          LAD(25),          bidir,    0,     403,   0,   Z), "&
  "402  (BC_6,          LAD(24),          bidir,    0,     403,   0,   Z), "&
  "403  (BC_2,                *,        control,    0),                    "&
  "404  (BC_6,          LAD(23),          bidir,    0,     406,   0,   Z), "&
  "405  (BC_6,          LAD(22),          bidir,    0,     406,   0,   Z), "&
  "406  (BC_2,                *,        control,    0),                    "&
  "407  (BC_6,          LAD(21),          bidir,    0,     408,   0,   Z), "&
  "408  (BC_2,                *,        control,    0),                    "&
  "409  (BC_6,          LAD(20),          bidir,    0,     410,   0,   Z), "&
  "410  (BC_2,                *,        control,    0),                    "&
  "411  (BC_6,          LAD(19),          bidir,    0,     415,   0,   Z), "&
  "412  (BC_6,          LAD(18),          bidir,    0,     427,   0,   Z), "&
  "413  (BC_6,          LAD(17),          bidir,    0,     427,   0,   Z), "&
  "414  (BC_6,          LAD(16),          bidir,    0,     415,   0,   Z), "&
  "415  (BC_2,                *,        control,    0),                    "&
  "416  (BC_6,          LAD(15),          bidir,    0,     423,   0,   Z), "&
  "417  (BC_6,          LAD(14),          bidir,    0,     418,   0,   Z), "&
  "418  (BC_2,                *,        control,    0),                    "&
  "419  (BC_6,          LAD(13),          bidir,    0,     418,   0,   Z), "&
  "420  (BC_6,          LAD(12),          bidir,    0,     421,   0,   Z), "&
  "421  (BC_2,                *,        control,    0),                    "&
  "422  (BC_6,          LAD(11),          bidir,    0,     423,   0,   Z), "&
  "423  (BC_2,                *,        control,    0),                    "&
  "424  (BC_6,          LAD(10),          bidir,    0,     418,   0,   Z), "&
  "425  (BC_6,           LAD(9),          bidir,    0,     437,   0,   Z), "&
  "426  (BC_6,           LAD(8),          bidir,    0,     427,   0,   Z), "&
  "427  (BC_2,                *,        control,    0),                    "&
  "428  (BC_6,           LAD(7),          bidir,    0,     437,   0,   Z), "&
  "429  (BC_6,           LAD(6),          bidir,    0,     437,   0,   Z), "&
  "430  (BC_6,           LAD(5),          bidir,    0,     432,   0,   Z), "&
  "431  (BC_6,           LAD(4),          bidir,    0,     432,   0,   Z), "&
  "432  (BC_2,                *,        control,    0),                    "&
  "433  (BC_6,           LAD(3),          bidir,    0,     423,   0,   Z), "&
  "434  (BC_6,           LAD(2),          bidir,    0,     418,   0,   Z), "&
  "435  (BC_6,           LAD(1),          bidir,    0,     421,   0,   Z), "&
  "436  (BC_6,           LAD(0),          bidir,    0,     437,   0,   Z), "&
  "437  (BC_2,                *,        control,    0),                    "&
  "438  (BC_2,          LCLK(2),        output3,    0,     439,   0,   Z), "&
  "439  (BC_2,                *,        control,    0),                    "&
  "440  (BC_2,          LCLK(1),        output3,    0,     439,   0,   Z), "&
  "441  (BC_2,          LCLK(0),        output3,    0,     442,   0,   Z), "&
  "442  (BC_2,                *,        control,    0),                    "&
  "443  (BC_2,             LCKE,        output3,    0,     444,   0,   Z), "&
  "444  (BC_2,                *,        control,    0),                    "&
  "445  (BC_2,        LSYNC_OUT,        output3,    0,     446,   0,   Z), "&
  "446  (BC_2,                *,        control,    0),                    "&
  "447  (BC_2,         LSYNC_IN,          input,    X),                    "&
  "448  (BC_2,          GPIN(7),          input,    X),                    "&
  "449  (BC_2,          GPIN(6),          input,    X),                    "&
  "450  (BC_2,          GPIN(5),          input,    X),                    "&
  "451  (BC_2,          GPIN(4),          input,    X),                    "&
  "452  (BC_2,          GPIN(3),          input,    X),                    "&
  "453  (BC_2,          GPIN(2),          input,    X),                    "&
  "454  (BC_2,          GPIN(1),          input,    X),                    "&
  "455  (BC_2,          GPIN(0),          input,    X),                    "&
  "456  (BC_2,         GPOUT(7),        output3,    0,     460,   0,   Z), "&
  "457  (BC_2,         GPOUT(6),        output3,    0,     460,   0,   Z), "&
  "458  (BC_2,         GPOUT(5),        output3,    0,     460,   0,   Z), "&
  "459  (BC_2,         GPOUT(4),        output3,    0,     460,   0,   Z), "&
  "460  (BC_2,                *,        control,    0),                    "&
  "461  (BC_2,         GPOUT(3),        output3,    0,     465,   0,   Z), "&
  "462  (BC_2,         GPOUT(2),        output3,    0,     465,   0,   Z), "&
  "463  (BC_2,         GPOUT(1),        output3,    0,     465,   0,   Z), "&
  "464  (BC_2,         GPOUT(0),        output3,    0,     465,   0,   Z), "&
  "465  (BC_2,                *,        control,    0),                    "&
  "466  (BC_6,         IIC2_SDA,          bidir,    0,     467,   0,   Z), "&
  "467  (BC_2,                *,        control,    0),                    "&
  "468  (BC_6,         IIC2_SCL,          bidir,    0,     469,   0,   Z), "&
  "469  (BC_2,                *,        control,    0),                    "&
  "470  (BC_6,         IIC1_SCL,          bidir,    0,     471,   0,   Z), "&
  "471  (BC_2,                *,        control,    0),                    "&
  "472  (BC_6,         IIC1_SDA,          bidir,    0,     473,   0,   Z), "&
  "473  (BC_2,                *,        control,    0),                    "&
  "474  (BC_2,         SRESET_L,          input,    X),                    "&
  "475  (BC_6,     HRESET_REQ_L,          bidir,    0,     476,   0,   Z), "&
  "476  (BC_2,                *,        control,    0),                    "&
  "477  (BC_2,         HRESET_L,          input,    X),                    "&
  "478  (BC_2,            UDE_L,          input,    X),                    "&
  "479  (BC_2,            MCP_L,          input,    X),                    "&
  "480  (BC_2,        IRQ_OUT_L,        output3,    0,     481,   0,   Z), "&
  "481  (BC_2,                *,        control,    0),                    "&
  "482  (BC_6,           IRQ_11,          bidir,    0,     483,   0,   Z), "&
  "483  (BC_2,                *,        control,    0),                    "&
  "484  (BC_6,           IRQ_10,          bidir,    0,     485,   0,   Z), "&
  "485  (BC_2,                *,        control,    0),                    "&
  "486  (BC_2,            IRQ_9,          input,    X),                    "&
  "487  (BC_6,            IRQ_8,          bidir,    0,     488,   0,   Z), "&
  "488  (BC_2,                *,        control,    0),                    "&
  "489  (BC_2,           IRQ(7),          input,    X),                    "&
  "490  (BC_2,           IRQ(6),          input,    X),                    "&
  "491  (BC_2,           IRQ(5),          input,    X),                    "&
  "492  (BC_2,           IRQ(4),          input,    X),                    "&
  "493  (BC_2,           IRQ(3),          input,    X),                    "&
  "494  (BC_2,           IRQ(2),          input,    X),                    "&
  "495  (BC_2,           IRQ(1),          input,    X),                    "&
  "496  (BC_2,           IRQ(0),          input,    X),                    "&
  "497  (BC_2,        L2_TSTCLK,          input,    X),                    "&
  "498  (BC_2,        L1_TSTCLK,          input,    X),                    "&
  "499  (BC_2,              RTC,          input,    X),                    "&
  "500  (BC_6,           ASLEEP,          bidir,    0,     501,   0,   Z), "&
  "501  (BC_2,                *,        control,    0),                    "&
  "502  (BC_2,          CLK_OUT,        output3,    0,     503,   0,   Z), "&
  "503  (BC_2,                *,        control,    0),                    "&
  "504  (BC_2,            MDVAL,        output3,    0,     505,   0,   Z), "&
  "505  (BC_2,                *,        control,    0),                    "&
  "506  (BC_2,           SYSCLK,          input,    X),                    "&
  "507  (BC_6,    PCI1_GNT_L(4),          bidir,    0,     508,   0,   Z), "&
  "508  (BC_2,                *,        control,    0),                    "&
  "509  (BC_6,    PCI1_GNT_L(3),          bidir,    0,     510,   0,   Z), "&
  "510  (BC_2,                *,        control,    0),                    "&
  "511  (BC_6,    PCI1_GNT_L(2),          bidir,    0,     512,   0,   Z), "&
  "512  (BC_2,                *,        control,    0),                    "&
  "513  (BC_6,    PCI1_GNT_L(1),          bidir,    0,     514,   0,   Z), "&
  "514  (BC_2,                *,        control,    0),                    "&
  "515  (BC_6,    PCI1_GNT_L(0),          bidir,    0,     516,   0,   Z), "&
  "516  (BC_2,                *,        control,    0),                    "&
  "517  (BC_2,    PCI1_REQ_L(4),          input,    X),                    "&
  "518  (BC_2,    PCI1_REQ_L(3),          input,    X),                    "&
  "519  (BC_2,    PCI1_REQ_L(2),          input,    X),                    "&
  "520  (BC_2,    PCI1_REQ_L(1),          input,    X),                    "&
  "521  (BC_6,     PCI1_REQ_L_0,          bidir,    0,     522,   0,   Z), "&
  "522  (BC_2,                *,        control,    0),                    "&
  "523  (BC_6,      PCI1_PERR_L,          bidir,    0,     524,   0,   Z), "&
  "524  (BC_2,                *,        control,    0),                    "&
  "525  (BC_6,      PCI1_SERR_L,          bidir,    0,     526,   0,   Z), "&
  "526  (BC_2,                *,        control,    0),                    "&
  "527  (BC_2,         PCI1_CLK,          input,    X),                    "&
  "528  (BC_6,    PCI1_DEVSEL_L,          bidir,    0,     529,   0,   Z), "&
  "529  (BC_2,                *,        control,    0),                    "&
  "530  (BC_6,      PCI1_IRDY_L,          bidir,    0,     531,   0,   Z), "&
  "531  (BC_2,                *,        control,    0),                    "&
  "532  (BC_6,      PCI1_TRDY_L,          bidir,    0,     533,   0,   Z), "&
  "533  (BC_2,                *,        control,    0),                    "&
  "534  (BC_2,       PCI1_IDSEL,          input,    X),                    "&
  "535  (BC_6,     PCI1_FRAME_L,          bidir,    0,     536,   0,   Z), "&
  "536  (BC_2,                *,        control,    0),                    "&
  "537  (BC_6,   PCI1_C_BE_L(3),          bidir,    0,     543,   0,   Z), "&
  "538  (BC_6,      PCI1_STOP_L,          bidir,    0,     539,   0,   Z), "&
  "539  (BC_2,                *,        control,    0),                    "&
  "540  (BC_6,         PCI1_PAR,          bidir,    0,     541,   0,   Z), "&
  "541  (BC_2,                *,        control,    0),                    "&
  "542  (BC_6,   PCI1_C_BE_L(2),          bidir,    0,     543,   0,   Z), "&
  "543  (BC_2,                *,        control,    0),                    "&
  "544  (BC_6,   PCI1_C_BE_L(1),          bidir,    0,     546,   0,   Z), "&
  "545  (BC_6,   PCI1_C_BE_L(0),          bidir,    0,     546,   0,   Z), "&
  "546  (BC_2,                *,        control,    0),                    "&
  "547  (BC_6,       PCI1_AD(0),          bidir,    0,     548,   0,   Z), "&
  "548  (BC_2,                *,        control,    0),                    "&
  "549  (BC_6,       PCI1_AD(1),          bidir,    0,     548,   0,   Z), "&
  "550  (BC_6,       PCI1_AD(2),          bidir,    0,     558,   0,   Z), "&
  "551  (BC_6,       PCI1_AD(3),          bidir,    0,     558,   0,   Z), "&
  "552  (BC_6,       PCI1_AD(4),          bidir,    0,     553,   0,   Z), "&
  "553  (BC_2,                *,        control,    0),                    "&
  "554  (BC_6,       PCI1_AD(5),          bidir,    0,     558,   0,   Z), "&
  "555  (BC_6,       PCI1_AD(6),          bidir,    0,     553,   0,   Z), "&
  "556  (BC_6,       PCI1_AD(7),          bidir,    0,     553,   0,   Z), "&
  "557  (BC_6,       PCI1_AD(8),          bidir,    0,     558,   0,   Z), "&
  "558  (BC_2,                *,        control,    0),                    "&
  "559  (BC_6,       PCI1_AD(9),          bidir,    0,     566,   0,   Z), "&
  "560  (BC_6,      PCI1_AD(10),          bidir,    0,     566,   0,   Z), "&
  "561  (BC_6,      PCI1_AD(11),          bidir,    0,     566,   0,   Z), "&
  "562  (BC_6,      PCI1_AD(12),          bidir,    0,     553,   0,   Z), "&
  "563  (BC_6,      PCI1_AD(13),          bidir,    0,     548,   0,   Z), "&
  "564  (BC_6,      PCI1_AD(14),          bidir,    0,     548,   0,   Z), "&
  "565  (BC_6,      PCI1_AD(15),          bidir,    0,     566,   0,   Z), "&
  "566  (BC_2,                *,        control,    0),                    "&
  "567  (BC_6,      PCI1_AD(16),          bidir,    0,     568,   0,   Z), "&
  "568  (BC_2,                *,        control,    0),                    "&
  "569  (BC_6,      PCI1_AD(17),          bidir,    0,     568,   0,   Z), "&
  "570  (BC_6,      PCI1_AD(18),          bidir,    0,     568,   0,   Z), "&
  "571  (BC_6,      PCI1_AD(19),          bidir,    0,     568,   0,   Z), "&
  "572  (BC_6,      PCI1_AD(20),          bidir,    0,     576,   0,   Z), "&
  "573  (BC_6,      PCI1_AD(21),          bidir,    0,     582,   0,   Z), "&
  "574  (BC_6,      PCI1_AD(22),          bidir,    0,     576,   0,   Z), "&
  "575  (BC_6,      PCI1_AD(23),          bidir,    0,     576,   0,   Z), "&
  "576  (BC_2,                *,        control,    0),                    "&
  "577  (BC_6,      PCI1_AD(24),          bidir,    0,     582,   0,   Z), "&
  "578  (BC_6,      PCI1_AD(25),          bidir,    0,     584,   0,   Z), "&
  "579  (BC_6,      PCI1_AD(26),          bidir,    0,     584,   0,   Z), "&
  "580  (BC_6,      PCI1_AD(27),          bidir,    0,     586,   0,   Z), "&
  "581  (BC_6,      PCI1_AD(28),          bidir,    0,     582,   0,   Z), "&
  "582  (BC_2,                *,        control,    0),                    "&
  "583  (BC_6,      PCI1_AD(29),          bidir,    0,     584,   0,   Z), "&
  "584  (BC_2,                *,        control,    0),                    "&
  "585  (BC_6,      PCI1_AD(30),          bidir,    0,     586,   0,   Z), "&
  "586  (BC_2,                *,        control,    0),                    "&
  "587  (BC_6,      PCI1_AD(31),          bidir,    0,     586,   0,   Z), "&
  "588  (BC_6,        MSRCID(4),          bidir,    0,     591,   0,   Z), "&
  "589  (BC_6,        MSRCID(3),          bidir,    0,     591,   0,   Z), "&
  "590  (BC_6,        MSRCID(2),          bidir,    0,     591,   0,   Z), "&
  "591  (BC_2,                *,        control,    0),                    "&
  "592  (BC_6,        MSRCID(1),          bidir,    0,     594,   0,   Z), "&
  "593  (BC_6,        MSRCID(0),          bidir,    0,     594,   0,   Z), "&
  "594  (BC_2,                *,        control,    0),                    "&
  "595  (BC_2,   DMA_DDONE_L(1),        output3,    0,     596,   0,   Z), "&
  "596  (BC_2,                *,        control,    0),                    "&
  "597  (BC_2,   DMA_DDONE_L(0),        output3,    0,     598,   0,   Z), "&
  "598  (BC_2,                *,        control,    0),                    "&
  "599  (BC_2,    DMA_DREQ_L(1),          input,    X),                    "&
  "600  (BC_2,    DMA_DREQ_L(0),          input,    X),                    "&
  "601  (BC_6,    DMA_DACK_L(1),          bidir,    0,     603,   0,   Z), "&
  "602  (BC_6,    DMA_DACK_L(0),          bidir,    0,     603,   0,   Z), "&
  "603  (BC_2,                *,        control,    0),                    "&
  "604  (BC_6,         TRIG_OUT,          bidir,    0,     605,   0,   Z), "&
  "605  (BC_2,                *,        control,    0),                    "&
  "606  (BC_2,          TRIG_IN,          input,    X),                    "&
  "607  (BC_2,    UART_RTS_L(1),        output3,    0,     609,   0,   Z), "&
  "608  (BC_2,    UART_RTS_L(0),        output3,    0,     609,   0,   Z), "&
  "609  (BC_2,                *,        control,    0),                    "&
  "610  (BC_2,    UART_CTS_L(1),          input,    X),                    "&
  "611  (BC_2,    UART_CTS_L(0),          input,    X),                    "&
  "612  (BC_2,      UART_SIN(1),          input,    X),                    "&
  "613  (BC_2,      UART_SIN(0),          input,    X),                    "&
  "614  (BC_2,     UART_SOUT(1),        output3,    0,     616,   0,   Z), "&
  "615  (BC_2,     UART_SOUT(0),        output3,    0,     616,   0,   Z), "&
  "616  (BC_2,                *,        control,    0),                    "&
  "617  (BC_2,      CKSTP_OUT_L,        output3,    0,     618,   0,   Z), "&
  "618  (BC_2,                *,        control,    0),                    "&
  "619  (BC_2,       CKSTP_IN_L,          input,    X),                    "&
  "620  (BC_6,          EC_MDIO,          bidir,    0,     621,   0,   Z), "&
  "621  (BC_2,                *,        control,    0),                    "&
  "622  (BC_6,           EC_MDC,          bidir,    0,     623,   0,   Z), "&
  "623  (BC_2,                *,        control,    0),                    "&
  "624  (BC_2,                *,       internal,    X),                    "& 
  "625  (BC_2,                *,       internal,    X),                    "& 
  "626  (BC_2,                *,       internal,    X),                    "& 
  "627  (BC_4,        SD1_RX(0),   observe_only,    X),                    "&
  "628  (BC_2,                *,        control,    1),                    "&
  "629  (BC_2,        SD1_TX(0),        output3,    0,     628,   1,   Z), "&
  "630  (BC_2,                *,        control,    1),                    "&
  "631  (BC_2,        SD1_TX(1),        output3,    0,     630,   1,   Z), "&
  "632  (BC_4,        SD1_RX(1),   observe_only,    X),                    "&
  "633  (BC_4,        SD1_RX(2),   observe_only,    X),                    "&
  "634  (BC_2,                *,        control,    1),                    "&
  "635  (BC_2,        SD1_TX(2),        output3,    0,     634,   1,   Z), "&
  "636  (BC_2,                *,        control,    1),                    "&
  "637  (BC_2,        SD1_TX(3),        output3,    0,     636,   1,   Z), "&
  "638  (BC_4,        SD1_RX(3),   observe_only,    X),                    "&
  "639  (BC_4,      SD1_REF_CLK,          clock,    X),                    "&
  "640  (BC_2,                *,        control,    1),                    "&
  "641  (BC_2,      SD1_PLL_TPD,        output3,    0,     640,   1,   Z), "&
  "642  (BC_2,                *,       internal,    X),                    "&
  "643  (BC_2,                *,        control,    1),                    "&
  "644  (BC_2,      SD1_TST_CLK,        output3,    0,     643,   1,   Z), "&
  "645  (BC_2,                *,        control,    1),                    "&
  "646  (BC_2,        SD1_TX(4),        output3,    0,     645,   1,   Z), "&
  "647  (BC_4,        SD1_RX(4),   observe_only,    X),                    "&
  "648  (BC_4,        SD1_RX(5),   observe_only,    X),                    "&
  "649  (BC_2,                *,        control,    1),                    "&
  "650  (BC_2,        SD1_TX(5),        output3,    0,     649,   1,   Z), "&
  "651  (BC_2,                *,        control,    1),                    "&
  "652  (BC_2,        SD1_TX(6),        output3,    0,     651,   1,   Z), "&
  "653  (BC_4,        SD1_RX(6),   observe_only,    X),                    "&
  "654  (BC_4,        SD1_RX(7),   observe_only,    X),                    "&
  "655  (BC_2,                *,        control,    1),                    "&
  "656  (BC_2,        SD1_TX(7),        output3,    0,     655,   1,   Z), "&
  "657  (BC_4,          SD2_RX0,   observe_only,    X),                    "& 
  "658  (BC_2,                *,        control,    1),                    "&
  "659  (BC_2,          SD2_TX0,        output3,    0,     658,   1,   Z), "& 
  "660  (BC_2,                *,       internal,    X),                    "& 
  "661  (BC_2,                *,       internal,    X),                    "&
  "662  (BC_2,                *,       internal,    X),                    "&
  "663  (BC_4,      SD2_REF_CLK,          clock,    X),                    "& 
  "664  (BC_2,                *,        control,    1),                    "&
  "665  (BC_2,      SD2_PLL_TPD,        output3,    0,     664,   1,   Z), "& 
  "666  (BC_2,                *,        control,    1),                    "&
  "667  (BC_2,      SD2_TST_CLK,        output3,    0,     666,   1,   Z), "& 
  "668  (BC_2,                *,        control,    1),                    "&
  "669  (BC_2,          SD2_TX2,        output3,    0,     668,   1,   Z), "& 
  "670  (BC_4,          SD2_RX2,   observe_only,    X),                    "& 
  "671  (BC_4,          SD2_RX3,   observe_only,    X),                    "& 
  "672  (BC_2,                *,        control,    1),                    "&
  "673  (BC_2,          SD2_TX3,        output3,    0,     672,   1,   Z)  "; 
-- tdi
end MPC8544;