-- Generated by boundaryScanGenerate 7.0.SP02-Build20090611.045 on 10/26/09 10:03:17
-- BSDL Version 2001
entity top is
generic (PHYSICAL_PIN_MAP : string := "MML");
port (
-- Port List
resetb : linkage bit;
mdio : inout bit;
mdc : inout bit;
led9 : inout bit;
led8 : inout bit;
led7 : inout bit;
led6 : inout bit;
led5 : inout bit;
led4 : inout bit;
led3 : linkage bit;
led2 : inout bit;
led1 : linkage bit;
led0 : inout bit;
mosi : inout bit;
sck : inout bit;
miso : inout bit;
ss : inout bit;
XTAL_I : linkage bit;
XTAL_O : linkage bit;
tck : in bit;
tdi : in bit;
tdo : out bit;
trst_b : in bit;
tms : in bit;
jtce : in bit;
intr_b : inout bit;
fso : linkage bit;
fcsb : inout bit;
fclk : inout bit;
fsi : inout bit;
rs232_rxd : inout bit;
rs232_txd : inout bit;
ledclk : inout bit;
leddata : linkage bit;
tst_enable : linkage bit;
test_mode_0 : linkage bit;
test_mode_1 : linkage bit;
test_mode_2 : linkage bit;
imp_txd4 : inout bit;
imp_txd0 : inout bit;
imp_txd5 : inout bit;
imp_txd1 : inout bit;
imp_txd6 : inout bit;
imp_txd2 : inout bit;
imp_txd7 : inout bit;
imp_txd3 : inout bit;
imp_gtxclk : inout bit;
imp_txen : inout bit;
imp_txer : inout bit;
imp_txclk : inout bit;
imp_vol_ref : linkage bit;
imp_rxer : inout bit;
imp_rxdv : inout bit;
imp_rxclk : inout bit;
imp_rxd4 : inout bit;
imp_rxd0 : inout bit;
imp_rxd1 : inout bit;
imp_rxd5 : inout bit;
imp_rxd6 : inout bit;
imp_rxd2 : inout bit;
imp_rxd3 : inout bit;
imp_rxd7 : inout bit;
gmii_txen : inout bit;
gmii_gtxclk : inout bit;
gmii_txclk : inout bit;
gmii_txd4 : inout bit;
gmii_txd0 : inout bit;
gmii_txd5 : inout bit;
gmii_txd1 : inout bit;
gmii_txd6 : inout bit;
gmii_txd2 : inout bit;
gmii_txd7 : inout bit;
gmii_txd3 : inout bit;
gmii_txer : inout bit;
gmii_vol_ref : linkage bit;
gmii_rxer : inout bit;
gmii_rxdv : inout bit;
gmii_rxclk : inout bit;
gmii_rxd4 : inout bit;
gmii_rxd0 : inout bit;
gmii_rxd1 : inout bit;
gmii_rxd5 : inout bit;
gmii_rxd6 : inout bit;
gmii_rxd2 : inout bit;
gmii_rxd3 : linkage bit;
gmii_rxd7 : linkage bit);
use STD_1149_1_2001.all;
use LVS_BSCAN_CELLS.all;
attribute COMPONENT_CONFORMANCE of top: entity is "STD_1149_1_2001";
--Pin mappings
attribute PIN_MAP of top: entity is PHYSICAL_PIN_MAP;
constant MML : PIN_MAP_STRING :=
"resetb : AF2, " &
"mdio : AE3, " &
"mdc : AE1, " &
"led9 : AD2, " &
"led8 : AB5, " &
"led7 : AC3, " &
"led6 : AC1, " &
"led5 : AB2, " &
"led4 : AA3, " &
"led3 : Y5, " &
"led2 : Y2, " &
"led1 : W3, " &
"led0 : V5, " &
"mosi : W1, " &
"sck : V2, " &
"miso : U3, " &
"ss : U1, " &
"XTAL_I : T2, " &
"XTAL_O : R3, " &
"tck : R1, " &
"tdi : P5, " &
"tdo : P2, " &
"trst_b : N1, " &
"tms : N3, " &
"jtce : M2, " &
"intr_b : L1, " &
"fso : L3, " &
"fcsb : K2, " &
"fclk : J1, " &
"fsi : K5, " &
"rs232_rxd : J3, " &
"rs232_txd : H2, " &
"ledclk : G1, " &
"leddata : H5, " &
"tst_enable : G3, " &
"test_mode_0 : F2, " &
"test_mode_1 : E1, " &
"test_mode_2 : E3, " &
"imp_txd4 : E27, " &
"imp_txd0 : E29, " &
"imp_txd5 : F28, " &
"imp_txd1 : G27, " &
"imp_txd6 : G29, " &
"imp_txd2 : H28, " &
"imp_txd7 : J27, " &
"imp_txd3 : K25, " &
"imp_gtxclk : J29, " &
"imp_txen : K28, " &
"imp_txer : L27, " &
"imp_txclk : L29, " &
"imp_vol_ref : M25, " &
"imp_rxer : N27, " &
"imp_rxdv : N29, " &
"imp_rxclk : P25, " &
"imp_rxd4 : P28, " &
"imp_rxd0 : R29, " &
"imp_rxd1 : R27, " &
"imp_rxd5 : T28, " &
"imp_rxd6 : U29, " &
"imp_rxd2 : U27, " &
"imp_rxd3 : V28, " &
"imp_rxd7 : W29, " &
"gmii_txen : Y28, " &
"gmii_gtxclk : AA29, " &
"gmii_txclk : AA27, " &
"gmii_txd4 : AB28, " &
"gmii_txd0 : AC29, " &
"gmii_txd5 : AC27, " &
"gmii_txd1 : AB25, " &
"gmii_txd6 : AD28, " &
"gmii_txd2 : AE29, " &
"gmii_txd7 : AE27, " &
"gmii_txd3 : AF28, " &
"gmii_txer : AD25, " &
"gmii_vol_ref : AE24, " &
"gmii_rxer : AE22, " &
"gmii_rxdv : AJ25, " &
"gmii_rxclk : AH24, " &
"gmii_rxd4 : AG23, " &
"gmii_rxd0 : AJ23, " &
"gmii_rxd1 : AH22, " &
"gmii_rxd5 : AE20, " &
"gmii_rxd6 : AG21, " &
"gmii_rxd2 : AJ21, " &
"gmii_rxd3 : AH20, " &
"gmii_rxd7 : AG19 " ;
attribute TAP_SCAN_RESET of trst_b : signal is true;
attribute TAP_SCAN_IN of tdi : signal is true;
attribute TAP_SCAN_MODE of tms : signal is true;
attribute TAP_SCAN_OUT of tdo : signal is true;
attribute TAP_SCAN_CLOCK of tck : signal is (2.5000000000000000000e+07, BOTH);
attribute COMPLIANCE_PATTERNS of top : entity is
"(jtce) (1)";
attribute INSTRUCTION_LENGTH of top: entity is 32;
attribute INSTRUCTION_OPCODE of top: entity is
"IDCODE (11111111111111111111111111111110)," &
"BYPASS (00000000000000000000000000000000, 11111111111111111111111111111111)," &
"EXTEST (11111111111111111111111111101000)," &
"SAMPLE (11111111111111111111111111111000)," &
"PRELOAD (11111111111111111111111111111000)," &
"HIGHZ (11111111111111111111111111001111)," &
"CLAMP (11111111111111111111111111101111) " ;
attribute INSTRUCTION_CAPTURE of top: entity is "xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx01";
attribute IDCODE_REGISTER of top: entity is
"0000" & -- version
"0000000011111010" & -- part number
"00010111111" & -- manufacturer's identity
"1"; -- required by 1149.1
attribute REGISTER_ACCESS of top: entity is
"BOUNDARY ( SAMPLE, PRELOAD )," &
"BYPASS ( HIGHZ, CLAMP, BYPASS ) " ;
--Boundary scan definition
attribute BOUNDARY_LENGTH of top: entity is 100;
attribute BOUNDARY_REGISTER of top: entity is
-- num cell port function safe [ccell disval rslt]
" 99 (BC_2 , * , control , 1 ) ,"&
" 98 (LV_BC_7 , mdio , bidir , X , 99 , 1 , pull0),"&
" 97 (BC_2 , * , control , 1 ) ,"&
" 96 (LV_BC_7 , mdc , bidir , X , 97 , 1 , pull0),"&
" 95 (BC_2 , * , control , 0 ) ,"&
" 94 (LV_BC_7 , led9 , bidir , X , 95 , 0 , pull1),"&
" 93 (BC_2 , * , control , 1 ) ,"&
" 92 (LV_BC_7 , led8 , bidir , X , 93 , 1 , pull1),"&
" 91 (LV_BC_7 , led7 , bidir , X , 95 , 0 , pull1),"&
" 90 (BC_2 , * , control , 1 ) ,"&
" 89 (LV_BC_7 , led6 , bidir , X , 90 , 1 , pull1),"&
" 88 (BC_2 , * , control , 0 ) ,"&
" 87 (LV_BC_7 , led5 , bidir , X , 88 , 0 , pull1),"&
" 86 (LV_BC_7 , led4 , bidir , X , 88 , 0 , pull1),"&
" 85 (LV_BC_7 , led2 , bidir , X , 88 , 0 , pull1),"&
" 84 (BC_2 , * , control , 1 ) ,"&
" 83 (LV_BC_7 , led0 , bidir , X , 84 , 1 , pull1),"&
" 82 (BC_2 , * , control , 1 ) ,"&
" 81 (LV_BC_7 , mosi , bidir , X , 82 , 1 , pull1),"&
" 80 (LV_BC_7 , sck , bidir , X , 82 , 1 , pull0),"&
" 79 (BC_2 , * , control , 1 ) ,"&
" 78 (LV_BC_7 , miso , bidir , X , 79 , 1 , pull1),"&
" 77 (LV_BC_7 , ss , bidir , X , 82 , 1 , pull1),"&
" 76 (BC_2 , * , control , 1 ) ,"&
" 75 (LV_BC_7 , intr_b , bidir , X , 76 , 1 , pull1),"&
" 74 (LV_BC_7 , fcsb , bidir , X , 93 , 1 , pull0),"&
" 73 (BC_2 , * , control , 1 ) ,"&
" 72 (LV_BC_7 , fclk , bidir , X , 73 , 1 , pull0),"&
" 71 (BC_2 , * , control , 1 ) ,"&
" 70 (LV_BC_7 , fsi , bidir , X , 71 , 1 , pull0),"&
" 69 (BC_2 , * , control , 1 ) ,"&
" 68 (LV_BC_7 , rs232_rxd , bidir , X , 69 , 1 , pull1),"&
" 67 (LV_BC_7 , rs232_txd , bidir , X , 93 , 1 , pull0),"&
" 66 (BC_2 , * , control , 1 ) ,"&
" 65 (LV_BC_7 , ledclk , bidir , X , 66 , 1 , pull0),"&
" 64 (BC_2 , * , control , 1 ) ,"&
" 63 (LV_BC_7 , imp_txd4 , bidir , X , 64 , 1 , pull0),"&
" 62 (BC_2 , * , control , 0 ) ,"&
" 61 (LV_BC_7 , imp_txd0 , bidir , X , 62 , 0 , pull0),"&
" 60 (BC_2 , * , control , 1 ) ,"&
" 59 (LV_BC_7 , imp_txd5 , bidir , X , 60 , 1 , pull0),"&
" 58 (BC_2 , * , control , 0 ) ,"&
" 57 (LV_BC_7 , imp_txd1 , bidir , X , 58 , 0 , pull0),"&
" 56 (LV_BC_7 , imp_txd6 , bidir , X , 60 , 1 , pull0),"&
" 55 (LV_BC_7 , imp_txd2 , bidir , X , 58 , 0 , pull0),"&
" 54 (LV_BC_7 , imp_txd7 , bidir , X , 60 , 1 , pull0),"&
" 53 (LV_BC_7 , imp_txd3 , bidir , X , 58 , 0 , pull0),"&
" 52 (BC_2 , * , control , 1 ) ,"&
" 51 (LV_BC_7 , imp_gtxclk , bidir , X , 52 , 1 , pull0),"&
" 50 (BC_2 , * , control , 1 ) ,"&
" 49 (LV_BC_7 , imp_txen , bidir , X , 50 , 1 , pull0),"&
" 48 (BC_2 , * , control , 1 ) ,"&
" 47 (LV_BC_7 , imp_txer , bidir , X , 48 , 1 , pull0),"&
" 46 (BC_2 , * , control , 1 ) ,"&
" 45 (LV_BC_7 , imp_txclk , bidir , X , 46 , 1 , pull0),"&
" 44 (BC_2 , * , control , 1 ) ,"&
" 43 (LV_BC_7 , imp_rxer , bidir , X , 44 , 1 , pull0),"&
" 42 (LV_BC_7 , imp_rxdv , bidir , X , 44 , 1 , pull0),"&
" 41 (LV_BC_7 , imp_rxclk , bidir , X , 46 , 1 , pull0),"&
" 40 (BC_2 , * , control , 1 ) ,"&
" 39 (LV_BC_7 , imp_rxd4 , bidir , X , 40 , 1 , pull0),"&
" 38 (LV_BC_7 , imp_rxd0 , bidir , X , 40 , 1 , pull0),"&
" 37 (LV_BC_7 , imp_rxd1 , bidir , X , 40 , 1 , pull0),"&
" 36 (BC_2 , * , control , 1 ) ,"&
" 35 (LV_BC_7 , imp_rxd5 , bidir , X , 36 , 1 , pull0),"&
" 34 (LV_BC_7 , imp_rxd6 , bidir , X , 44 , 1 , pull0),"&
" 33 (LV_BC_7 , imp_rxd2 , bidir , X , 40 , 1 , pull0),"&
" 32 (LV_BC_7 , imp_rxd3 , bidir , X , 36 , 1 , pull0),"&
" 31 (BC_2 , * , control , 1 ) ,"&
" 30 (LV_BC_7 , imp_rxd7 , bidir , X , 31 , 1 , pull0),"&
" 29 (BC_2 , * , control , 1 ) ,"&
" 28 (LV_BC_7 , gmii_txen , bidir , X , 29 , 1 , pull0),"&
" 27 (BC_2 , * , control , 1 ) ,"&
" 26 (LV_BC_7 , gmii_gtxclk , bidir , X , 27 , 1 , pull0),"&
" 25 (BC_2 , * , control , 1 ) ,"&
" 24 (LV_BC_7 , gmii_txclk , bidir , X , 25 , 1 , pull0),"&
" 23 (BC_2 , * , control , 1 ) ,"&
" 22 (LV_BC_7 , gmii_txd4 , bidir , X , 23 , 1 , pull0),"&
" 21 (BC_2 , * , control , 1 ) ,"&
" 20 (LV_BC_7 , gmii_txd0 , bidir , X , 21 , 1 , pull0),"&
" 19 (LV_BC_7 , gmii_txd5 , bidir , X , 23 , 1 , pull0),"&
" 18 (LV_BC_7 , gmii_txd1 , bidir , X , 21 , 1 , pull0),"&
" 17 (LV_BC_7 , gmii_txd6 , bidir , X , 23 , 1 , pull0),"&
" 16 (LV_BC_7 , gmii_txd2 , bidir , X , 21 , 1 , pull0),"&
" 15 (LV_BC_7 , gmii_txd7 , bidir , X , 23 , 1 , pull0),"&
" 14 (LV_BC_7 , gmii_txd3 , bidir , X , 21 , 1 , pull0),"&
" 13 (BC_2 , * , control , 1 ) ,"&
" 12 (LV_BC_7 , gmii_txer , bidir , X , 13 , 1 , pull0),"&
" 11 (BC_2 , * , control , 1 ) ,"&
" 10 (LV_BC_7 , gmii_rxer , bidir , X , 11 , 1 , pull0),"&
" 9 (LV_BC_7 , gmii_rxdv , bidir , X , 11 , 1 , pull0),"&
" 8 (LV_BC_7 , gmii_rxclk , bidir , X , 25 , 1 , pull0),"&
" 7 (BC_2 , * , control , 1 ) ,"&
" 6 (LV_BC_7 , gmii_rxd4 , bidir , X , 7 , 1 , pull0),"&
" 5 (LV_BC_7 , gmii_rxd0 , bidir , X , 7 , 1 , pull0),"&
" 4 (LV_BC_7 , gmii_rxd1 , bidir , X , 7 , 1 , pull0),"&
" 3 (LV_BC_7 , gmii_rxd5 , bidir , X , 7 , 1 , pull0),"&
" 2 (BC_2 , * , control , 1 ) ,"&
" 1 (LV_BC_7 , gmii_rxd6 , bidir , X , 2 , 1 , pull0),"&
" 0 (LV_BC_7 , gmii_rxd2 , bidir , X , 7 , 1 , pull0) ";
end top;