-- *****************************************************************************
-- Copyright (c) 2009 NXP B.V. All rights reserved.
-- BSDL file for design LPC23XXFBD144 Revision A
-- Created by Synopsys Version Y-2006.06-SP2 (Sep 01, 2006)
-- Version: 1.0
-- Date: Sep 10, 2009
-- *****************************************************************************
entity LPC23XXFBD144 is
-- This section identifies the default device package selected.
generic (PHYSICAL_PIN_MAP: string:= "LQFP144");
-- This section declares all the ports in the design.
port (
DBGEN : in bit;
TCK : in bit;
TDI : in bit;
TMS : in bit;
TRST_N : in bit;
P0_0 : inout bit;
P0_1 : inout bit;
P0_2 : inout bit;
P0_3 : inout bit;
P0_4 : inout bit;
P0_5 : inout bit;
P0_6 : inout bit;
P0_7 : inout bit;
P0_8 : inout bit;
P0_9 : inout bit;
P0_10 : inout bit;
P0_11 : inout bit;
P0_12 : inout bit;
P0_13 : inout bit;
P0_14 : inout bit;
P0_15 : inout bit;
P0_16 : inout bit;
P0_17 : inout bit;
P0_18 : inout bit;
P0_19 : inout bit;
P0_20 : inout bit;
P0_21 : inout bit;
P0_22 : inout bit;
P0_23 : inout bit;
P0_24 : inout bit;
P0_25 : inout bit;
P0_26 : inout bit;
P0_27 : inout bit;
P0_28 : inout bit;
P1_0 : inout bit;
P1_1 : inout bit;
P1_4 : inout bit;
P1_8 : inout bit;
P1_9 : inout bit;
P1_10 : inout bit;
P1_14 : inout bit;
P1_15 : inout bit;
P1_16 : inout bit;
P1_17 : inout bit;
P1_18 : inout bit;
P1_19 : inout bit;
P1_20 : inout bit;
P1_21 : inout bit;
P1_22 : inout bit;
P1_23 : inout bit;
P1_24 : inout bit;
P1_25 : inout bit;
P1_26 : inout bit;
P1_27 : inout bit;
P1_28 : inout bit;
P1_29 : inout bit;
P1_30 : inout bit;
P1_31 : inout bit;
P2_0 : inout bit;
P2_1 : inout bit;
P2_2 : inout bit;
P2_3 : inout bit;
P2_4 : inout bit;
P2_5 : inout bit;
P2_6 : inout bit;
P2_7 : inout bit;
P2_8 : inout bit;
P2_9 : inout bit;
P2_10 : inout bit;
P2_11 : inout bit;
P2_12 : inout bit;
P2_13 : inout bit;
P3_0 : inout bit;
P3_1 : inout bit;
P3_2 : inout bit;
P3_3 : inout bit;
P3_4 : inout bit;
P3_5 : inout bit;
P3_6 : inout bit;
P3_7 : inout bit;
P3_23 : inout bit;
P3_24 : inout bit;
P3_25 : inout bit;
P3_26 : inout bit;
P4_0 : inout bit;
P4_1 : inout bit;
P4_2 : inout bit;
P4_3 : inout bit;
P4_4 : inout bit;
P4_5 : inout bit;
P4_6 : inout bit;
P4_7 : inout bit;
P4_8 : inout bit;
P4_9 : inout bit;
P4_10 : inout bit;
P4_11 : inout bit;
P4_12 : inout bit;
P4_13 : inout bit;
P4_14 : inout bit;
P4_15 : inout bit;
P4_24 : inout bit;
P4_25 : inout bit;
P4_28 : inout bit;
P4_29 : inout bit;
P4_30 : inout bit;
P4_31 : inout bit;
RSTOUT_N : out bit;
RTCK : inout bit;
TDO : out bit;
ALARM : linkage bit;
NC : linkage bit_vector (1 to 3);
P0_29 : linkage bit;
P0_30 : linkage bit;
P0_31 : linkage bit;
RESET_N : linkage bit;
RTCX1 : linkage bit;
RTCX2 : linkage bit;
USB_DM2 : linkage bit;
VBAT : linkage bit;
VDCDC : linkage bit_vector (1 to 3);
VDD : linkage bit_vector (1 to 6);
VDDA : linkage bit;
VREF : linkage bit;
VSS : linkage bit_vector (1 to 9);
VSSA : linkage bit;
XTAL1 : linkage bit;
XTAL2 : linkage bit
);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of LPC23XXFBD144: entity is "STD_1149_1_2001";
attribute PIN_MAP of LPC23XXFBD144: entity is PHYSICAL_PIN_MAP;
-- This section specifies the pin map for each port. This information is
-- extracted from the port-to-pin map file that was read in using the
-- "read_pin_map" command.
constant LQFP144: PIN_MAP_STRING :=
"DBGEN : 6," &
"TCK : 7," &
"TDI : 3," &
"TMS : 4," &
"TRST_N : 5," &
"P0_0 : 66," &
"P0_1 : 67," &
"P0_2 : 141," &
"P0_3 : 142," &
"P0_4 : 116," &
"P0_5 : 115," &
"P0_6 : 113," &
"P0_7 : 112," &
"P0_8 : 111," &
"P0_9 : 109," &
"P0_10 : 69," &
"P0_11 : 70," &
"P0_12 : 29," &
"P0_13 : 32," &
"P0_14 : 48," &
"P0_15 : 89," &
"P0_16 : 90," &
"P0_17 : 87," &
"P0_18 : 86," &
"P0_19 : 85," &
"P0_20 : 83," &
"P0_21 : 82," &
"P0_22 : 80," &
"P0_23 : 13," &
"P0_24 : 11," &
"P0_25 : 10," &
"P0_26 : 8," &
"P0_27 : 35," &
"P0_28 : 34," &
"P1_0 : 136," &
"P1_1 : 135," &
"P1_4 : 133," &
"P1_8 : 132," &
"P1_9 : 131," &
"P1_10 : 129," &
"P1_14 : 128," &
"P1_15 : 126," &
"P1_16 : 125," &
"P1_17 : 123," &
"P1_18 : 46," &
"P1_19 : 47," &
"P1_20 : 49," &
"P1_21 : 50," &
"P1_22 : 51," &
"P1_23 : 53," &
"P1_24 : 54," &
"P1_25 : 56," &
"P1_26 : 57," &
"P1_27 : 61," &
"P1_28 : 63," &
"P1_29 : 64," &
"P1_30 : 30," &
"P1_31 : 28," &
"P2_0 : 107," &
"P2_1 : 106," &
"P2_2 : 105," &
"P2_3 : 100," &
"P2_4 : 99," &
"P2_5 : 97," &
"P2_6 : 96," &
"P2_7 : 95," &
"P2_8 : 93," &
"P2_9 : 92," &
"P2_10 : 76," &
"P2_11 : 75," &
"P2_12 : 73," &
"P2_13 : 71," &
"P3_0 : 137," &
"P3_1 : 140," &
"P3_2 : 144," &
"P3_3 : 2," &
"P3_4 : 9," &
"P3_5 : 12," &
"P3_6 : 16," &
"P3_7 : 19," &
"P3_23 : 45," &
"P3_24 : 40," &
"P3_25 : 39," &
"P3_26 : 38," &
"P4_0 : 52," &
"P4_1 : 55," &
"P4_2 : 58," &
"P4_3 : 68," &
"P4_4 : 72," &
"P4_5 : 74," &
"P4_6 : 78," &
"P4_7 : 84," &
"P4_8 : 88," &
"P4_9 : 91," &
"P4_10 : 94," &
"P4_11 : 101," &
"P4_12 : 104," &
"P4_13 : 108," &
"P4_14 : 110," &
"P4_15 : 120," &
"P4_24 : 127," &
"P4_25 : 124," &
"P4_28 : 118," &
"P4_29 : 122," &
"P4_30 : 130," &
"P4_31 : 134," &
"RSTOUT_N : 20," &
"RTCK : 143," &
"TDO : 1," &
"ALARM : 26," &
"NC : (21, 81, 98)," &
"P0_29 : 42," &
"P0_30 : 43," &
"P0_31 : 36," &
"RESET_N : 24," &
"RTCX1 : 23," &
"RTCX2 : 25," &
"USB_DM2 : 37," &
"VBAT : 27," &
"VDCDC : (18, 60, 121)," &
"VDD : (41, 62, 77, 102, 114, 138)," &
"VDDA : 14," &
"VREF : 17," &
"VSS : (22, 44, 59, 65, 79, 103, 117, 119, 139)," &
"VSSA : 15," &
"XTAL1 : 31," &
"XTAL2 : 33";
-- This section specifies the TAP ports. For the TAP TCK port, the parameters in
-- the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be stopped in.
attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH);
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_RESET of TRST_N: signal is true;
-- Specifies the compliance enable patterns for the design. It lists a set of
-- design ports and the values that they should be set to, in order to enable
-- compliance to IEEE Std 1149.1
attribute COMPLIANCE_PATTERNS of LPC23XXFBD144: entity is
"(DBGEN) (0)";
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of LPC23XXFBD144: entity is 3;
-- Specifies the boundary-scan instructions implemented in the design and their
-- opcodes.
attribute INSTRUCTION_OPCODE of LPC23XXFBD144: entity is
"BYPASS (111)," &
"EXTEST (001)," &
"SAMPLE (100)," &
"PRELOAD (100)," &
"CLAMP (010)," &
"IDCODE (011)";
-- Specifies the bit pattern that is loaded into the instruction register when
-- the TAP controller passes through the Capture-IR state. The standard mandates
-- that the two LSBs must be "01". The remaining bits are design specific.
attribute INSTRUCTION_CAPTURE of LPC23XXFBD144: entity is "001";
-- Specifies the bit pattern that is loaded into the DEVICE_ID register during
-- the IDCODE instruction when the TAP controller passes through the Capture-DR
-- state.
attribute IDCODE_REGISTER of LPC23XXFBD144: entity is
"0011" &
-- 4-bit version number
"0000000111110000" &
-- 16-bit part number
"00000010101" &
-- 11-bit identity of the manufacturer
"1";
-- Required by IEEE Std 1149.1
-- This section specifies the test data register placed between TDI and TDO for
-- each implemented instruction.
attribute REGISTER_ACCESS of LPC23XXFBD144: entity is
"BYPASS (BYPASS, CLAMP)," &
"BOUNDARY (EXTEST, SAMPLE, PRELOAD)," &
"DEVICE_ID (IDCODE)";
-- Specifies the length of the boundary scan register.
attribute BOUNDARY_LENGTH of LPC23XXFBD144: entity is 317;
-- The following list specifies the characteristics of each cell in the boundary
-- scan register from TDI to TDO. The following is a description of the label
-- fields:
-- num : Is the cell number.
-- cell : Is the cell type as defined by the standard.
-- port : Is the design port name. Control cells do not have a port
-- name.
-- function: Is the function of the cell as defined by the standard. Is one
-- of input, output2, output3, bidir, control or controlr.
-- safe : Specifies the value that the BSR cell should be loaded with
-- for safe operation when the software might otherwise choose a
-- random value.
-- ccell : The control cell number. Specifies the control cell that
-- drives the output enable for this port.
-- disval : Specifies the value that is loaded into the control cell to
-- disable the output enable for the corresponding port.
-- rslt : Resulting state. Shows the state of the driver when it is
-- disabled.
attribute BOUNDARY_REGISTER of LPC23XXFBD144: entity is
--
-- num cell port function safe [ccell disval rslt]
--
"316 (BC_0, *, internal, X), " &
"315 (BC_0, *, internal, X), " &
"314 (BC_2, *, control, 1), " &
"313 (BC_7, P3_3, bidir, X, 314, 1, Z), " &
"312 (BC_0, *, internal, X), " &
"311 (BC_0, *, internal, X), " &
"310 (BC_0, *, internal, X), " &
"309 (BC_0, *, internal, X), " &
"308 (BC_0, *, internal, X), " &
"307 (BC_0, *, internal, X), " &
"306 (BC_2, *, control, 1), " &
"305 (BC_7, P0_26, bidir, X, 306, 1, Z), " &
"304 (BC_2, *, control, 1), " &
"303 (BC_7, P3_4, bidir, X, 304, 1, Z), " &
"302 (BC_2, *, control, 1), " &
"301 (BC_7, P0_25, bidir, X, 302, 1, Z), " &
"300 (BC_2, *, control, 1), " &
"299 (BC_7, P0_24, bidir, X, 300, 1, Z), " &
"298 (BC_2, *, control, 1), " &
"297 (BC_7, P3_5, bidir, X, 298, 1, Z), " &
"296 (BC_2, *, control, 1), " &
"295 (BC_7, P0_23, bidir, X, 296, 1, Z), " &
"294 (BC_0, *, internal, X), " &
"293 (BC_0, *, internal, X), " &
"292 (BC_0, *, internal, X), " &
"291 (BC_0, *, internal, X), " &
"290 (BC_2, *, control, 1), " &
"289 (BC_7, P3_6, bidir, X, 290, 1, Z), " &
"288 (BC_0, *, internal, X), " &
"287 (BC_0, *, internal, X), " &
"286 (BC_2, *, control, 1), " &
"285 (BC_7, P3_7, bidir, X, 286, 1, Z), " &
"284 (BC_0, *, internal, X), " &
"283 (BC_0, *, internal, X), " &
"282 (BC_1, RSTOUT_N, output2, X), " &
"281 (BC_0, *, internal, X), " &
"280 (BC_0, *, internal, X), " &
"279 (BC_0, *, internal, X), " &
"278 (BC_0, *, internal, X), " &
"277 (BC_2, *, control, 1), " &
"276 (BC_7, P1_31, bidir, X, 277, 1, Z), " &
"275 (BC_2, *, control, 1), " &
"274 (BC_7, P0_12, bidir, X, 275, 1, Z), " &
"273 (BC_2, *, control, 1), " &
"272 (BC_7, P1_30, bidir, X, 273, 1, Z), " &
"271 (BC_0, *, internal, X), " &
"270 (BC_0, *, internal, X), " &
"269 (BC_2, *, control, 1), " &
"268 (BC_7, P0_13, bidir, X, 269, 1, Z), " &
"267 (BC_0, *, internal, X), " &
"266 (BC_0, *, internal, X), " &
"265 (BC_2, P0_28, output2, 1, 265, 1, WEAK1), " &
"264 (BC_2, P0_28, input, X), " &
"263 (BC_0, *, internal, X), " &
"262 (BC_0, *, internal, X), " &
"261 (BC_2, P0_27, output2, 1, 261, 1, WEAK1), " &
"260 (BC_2, P0_27, input, X), " &
"259 (BC_0, *, internal, X), " &
"258 (BC_0, *, internal, X), " &
"257 (BC_0, *, internal, X), " &
"256 (BC_0, *, internal, X), " &
"255 (BC_2, *, control, 1), " &
"254 (BC_7, P3_26, bidir, X, 255, 1, Z), " &
"253 (BC_2, *, control, 1), " &
"252 (BC_7, P3_25, bidir, X, 253, 1, Z), " &
"251 (BC_0, *, internal, X), " &
"250 (BC_0, *, internal, X), " &
"249 (BC_2, *, control, 1), " &
"248 (BC_7, P3_24, bidir, X, 249, 1, Z), " &
"247 (BC_0, *, internal, X), " &
"246 (BC_0, *, internal, X), " &
"245 (BC_0, *, internal, X), " &
"244 (BC_0, *, internal, X), " &
"243 (BC_2, *, control, 1), " &
"242 (BC_7, P3_23, bidir, X, 243, 1, Z), " &
"241 (BC_2, *, control, 1), " &
"240 (BC_7, P1_18, bidir, X, 241, 1, Z), " &
"239 (BC_0, *, internal, X), " &
"238 (BC_0, *, internal, X), " &
"237 (BC_2, *, control, 1), " &
"236 (BC_7, P1_19, bidir, X, 237, 1, Z), " &
"235 (BC_2, *, control, 1), " &
"234 (BC_7, P0_14, bidir, X, 235, 1, Z), " &
"233 (BC_2, *, control, 1), " &
"232 (BC_7, P1_20, bidir, X, 233, 1, Z), " &
"231 (BC_2, *, control, 1), " &
"230 (BC_7, P1_21, bidir, X, 231, 1, Z), " &
"229 (BC_0, *, internal, X), " &
"228 (BC_0, *, internal, X), " &
"227 (BC_2, *, control, 1), " &
"226 (BC_7, P1_22, bidir, X, 227, 1, Z), " &
"225 (BC_2, *, control, 1), " &
"224 (BC_7, P4_0, bidir, X, 225, 1, Z), " &
"223 (BC_2, *, control, 1), " &
"222 (BC_7, P1_23, bidir, X, 223, 1, Z), " &
"221 (BC_2, *, control, 1), " &
"220 (BC_7, P1_24, bidir, X, 221, 1, Z), " &
"219 (BC_2, *, control, 1), " &
"218 (BC_7, P4_1, bidir, X, 219, 1, Z), " &
"217 (BC_2, *, control, 1), " &
"216 (BC_7, P1_25, bidir, X, 217, 1, Z), " &
"215 (BC_0, *, internal, X), " &
"214 (BC_0, *, internal, X), " &
"213 (BC_2, *, control, 1), " &
"212 (BC_7, P1_26, bidir, X, 213, 1, Z), " &
"211 (BC_2, *, control, 1), " &
"210 (BC_7, P4_2, bidir, X, 211, 1, Z), " &
"209 (BC_0, *, internal, X), " &
"208 (BC_0, *, internal, X), " &
"207 (BC_0, *, internal, X), " &
"206 (BC_0, *, internal, X), " &
"205 (BC_2, *, control, 1), " &
"204 (BC_7, P1_27, bidir, X, 205, 1, Z), " &
"203 (BC_2, *, control, 1), " &
"202 (BC_7, P1_28, bidir, X, 203, 1, Z), " &
"201 (BC_0, *, internal, X), " &
"200 (BC_0, *, internal, X), " &
"199 (BC_2, *, control, 1), " &
"198 (BC_7, P1_29, bidir, X, 199, 1, Z), " &
"197 (BC_2, *, control, 1), " &
"196 (BC_7, P0_0, bidir, X, 197, 1, Z), " &
"195 (BC_0, *, internal, X), " &
"194 (BC_0, *, internal, X), " &
"193 (BC_2, *, control, 1), " &
"192 (BC_7, P0_1, bidir, X, 193, 1, Z), " &
"191 (BC_2, *, control, 1), " &
"190 (BC_7, P4_3, bidir, X, 191, 1, Z), " &
"189 (BC_2, *, control, 1), " &
"188 (BC_7, P0_10, bidir, X, 189, 1, Z), " &
"187 (BC_0, *, internal, X), " &
"186 (BC_0, *, internal, X), " &
"185 (BC_2, *, control, 1), " &
"184 (BC_7, P0_11, bidir, X, 185, 1, Z), " &
"183 (BC_0, *, internal, X), " &
"182 (BC_0, *, internal, X), " &
"181 (BC_2, *, control, 1), " &
"180 (BC_7, P2_13, bidir, X, 181, 1, Z), " &
"179 (BC_2, *, control, 1), " &
"178 (BC_7, P4_4, bidir, X, 179, 1, Z), " &
"177 (BC_0, *, internal, X), " &
"176 (BC_0, *, internal, X), " &
"175 (BC_0, *, internal, X), " &
"174 (BC_0, *, internal, X), " &
"173 (BC_2, *, control, 1), " &
"172 (BC_7, P2_12, bidir, X, 173, 1, Z), " &
"171 (BC_2, *, control, 1), " &
"170 (BC_7, P4_5, bidir, X, 171, 1, Z), " &
"169 (BC_2, *, control, 1), " &
"168 (BC_7, P2_11, bidir, X, 169, 1, Z), " &
"167 (BC_0, *, internal, X), " &
"166 (BC_0, *, internal, X), " &
"165 (BC_2, *, control, 1), " &
"164 (BC_7, P2_10, bidir, X, 165, 1, Z), " &
"163 (BC_0, *, internal, X), " &
"162 (BC_0, *, internal, X), " &
"161 (BC_2, *, control, 1), " &
"160 (BC_7, P4_6, bidir, X, 161, 1, Z), " &
"159 (BC_0, *, internal, X), " &
"158 (BC_0, *, internal, X), " &
"157 (BC_2, *, control, 1), " &
"156 (BC_7, P0_22, bidir, X, 157, 1, Z), " &
"155 (BC_2, *, control, 1), " &
"154 (BC_7, P0_21, bidir, X, 155, 1, Z), " &
"153 (BC_0, *, internal, X), " &
"152 (BC_0, *, internal, X), " &
"151 (BC_2, *, control, 1), " &
"150 (BC_7, P0_20, bidir, X, 151, 1, Z), " &
"149 (BC_2, *, control, 1), " &
"148 (BC_7, P4_7, bidir, X, 149, 1, Z), " &
"147 (BC_2, *, control, 1), " &
"146 (BC_7, P0_19, bidir, X, 147, 1, Z), " &
"145 (BC_0, *, internal, X), " &
"144 (BC_0, *, internal, X), " &
"143 (BC_2, *, control, 1), " &
"142 (BC_7, P0_18, bidir, X, 143, 1, Z), " &
"141 (BC_2, *, control, 1), " &
"140 (BC_7, P0_17, bidir, X, 141, 1, Z), " &
"139 (BC_2, *, control, 1), " &
"138 (BC_7, P4_8, bidir, X, 139, 1, Z), " &
"137 (BC_2, *, control, 1), " &
"136 (BC_7, P0_15, bidir, X, 137, 1, Z), " &
"135 (BC_0, *, internal, X), " &
"134 (BC_0, *, internal, X), " &
"133 (BC_2, *, control, 1), " &
"132 (BC_7, P0_16, bidir, X, 133, 1, Z), " &
"131 (BC_2, *, control, 1), " &
"130 (BC_7, P4_9, bidir, X, 131, 1, Z), " &
"129 (BC_2, *, control, 1), " &
"128 (BC_7, P2_9, bidir, X, 129, 1, Z), " &
"127 (BC_2, *, control, 1), " &
"126 (BC_7, P2_8, bidir, X, 127, 1, Z), " &
"125 (BC_2, *, control, 1), " &
"124 (BC_7, P4_10, bidir, X, 125, 1, Z), " &
"123 (BC_2, *, control, 1), " &
"122 (BC_7, P2_7, bidir, X, 123, 1, Z), " &
"121 (BC_0, *, internal, X), " &
"120 (BC_0, *, internal, X), " &
"119 (BC_2, *, control, 1), " &
"118 (BC_7, P2_6, bidir, X, 119, 1, Z), " &
"117 (BC_0, *, internal, X), " &
"116 (BC_0, *, internal, X), " &
"115 (BC_2, *, control, 1), " &
"114 (BC_7, P2_5, bidir, X, 115, 1, Z), " &
"113 (BC_2, *, control, 1), " &
"112 (BC_7, P2_4, bidir, X, 113, 1, Z), " &
"111 (BC_0, *, internal, X), " &
"110 (BC_0, *, internal, X), " &
"109 (BC_2, *, control, 1), " &
"108 (BC_7, P2_3, bidir, X, 109, 1, Z), " &
"107 (BC_2, *, control, 1), " &
"106 (BC_7, P4_11, bidir, X, 107, 1, Z), " &
"105 (BC_0, *, internal, X), " &
"104 (BC_0, *, internal, X), " &
"103 (BC_2, *, control, 1), " &
"102 (BC_7, P4_12, bidir, X, 103, 1, Z), " &
"101 (BC_2, *, control, 1), " &
"100 (BC_7, P2_2, bidir, X, 101, 1, Z), " &
"99 (BC_0, *, internal, X), " &
"98 (BC_0, *, internal, X), " &
"97 (BC_2, *, control, 1), " &
"96 (BC_7, P2_1, bidir, X, 97, 1, Z), " &
"95 (BC_0, *, internal, X), " &
"94 (BC_0, *, internal, X), " &
"93 (BC_2, *, control, 1), " &
"92 (BC_7, P2_0, bidir, X, 93, 1, Z), " &
"91 (BC_2, *, control, 1), " &
"90 (BC_7, P4_13, bidir, X, 91, 1, Z), " &
"89 (BC_0, *, internal, X), " &
"88 (BC_0, *, internal, X), " &
"87 (BC_0, *, internal, X), " &
"86 (BC_0, *, internal, X), " &
"85 (BC_2, *, control, 1), " &
"84 (BC_7, P0_9, bidir, X, 85, 1, Z), " &
"83 (BC_2, *, control, 1), " &
"82 (BC_7, P4_14, bidir, X, 83, 1, Z), " &
"81 (BC_2, *, control, 1), " &
"80 (BC_7, P0_8, bidir, X, 81, 1, Z), " &
"79 (BC_0, *, internal, X), " &
"78 (BC_0, *, internal, X), " &
"77 (BC_2, *, control, 1), " &
"76 (BC_7, P0_7, bidir, X, 77, 1, Z), " &
"75 (BC_0, *, internal, X), " &
"74 (BC_0, *, internal, X), " &
"73 (BC_2, *, control, 1), " &
"72 (BC_7, P0_6, bidir, X, 73, 1, Z), " &
"71 (BC_2, *, control, 1), " &
"70 (BC_7, P0_5, bidir, X, 71, 1, Z), " &
"69 (BC_0, *, internal, X), " &
"68 (BC_0, *, internal, X), " &
"67 (BC_2, *, control, 1), " &
"66 (BC_7, P0_4, bidir, X, 67, 1, Z), " &
"65 (BC_2, *, control, 1), " &
"64 (BC_7, P4_28, bidir, X, 65, 1, Z), " &
"63 (BC_0, *, internal, X), " &
"62 (BC_0, *, internal, X), " &
"61 (BC_2, *, control, 1), " &
"60 (BC_7, P4_15, bidir, X, 61, 1, Z), " &
"59 (BC_0, *, internal, X), " &
"58 (BC_0, *, internal, X), " &
"57 (BC_2, *, control, 1), " &
"56 (BC_7, P4_29, bidir, X, 57, 1, Z), " &
"55 (BC_0, *, internal, X), " &
"54 (BC_0, *, internal, X), " &
"53 (BC_2, *, control, 1), " &
"52 (BC_7, P1_17, bidir, X, 53, 1, Z), " &
"51 (BC_2, *, control, 1), " &
"50 (BC_7, P4_25, bidir, X, 51, 1, Z), " &
"49 (BC_2, *, control, 1), " &
"48 (BC_7, P1_16, bidir, X, 49, 1, Z), " &
"47 (BC_2, *, control, 1), " &
"46 (BC_7, P1_15, bidir, X, 47, 1, Z), " &
"45 (BC_2, *, control, 1), " &
"44 (BC_7, P4_24, bidir, X, 45, 1, Z), " &
"43 (BC_2, *, control, 1), " &
"42 (BC_7, P1_14, bidir, X, 43, 1, Z), " &
"41 (BC_0, *, internal, X), " &
"40 (BC_0, *, internal, X), " &
"39 (BC_2, *, control, 1), " &
"38 (BC_7, P1_10, bidir, X, 39, 1, Z), " &
"37 (BC_2, *, control, 1), " &
"36 (BC_7, P4_30, bidir, X, 37, 1, Z), " &
"35 (BC_2, *, control, 1), " &
"34 (BC_7, P1_9, bidir, X, 35, 1, Z), " &
"33 (BC_2, *, control, 1), " &
"32 (BC_7, P1_8, bidir, X, 33, 1, Z), " &
"31 (BC_0, *, internal, X), " &
"30 (BC_0, *, internal, X), " &
"29 (BC_2, *, control, 1), " &
"28 (BC_7, P1_4, bidir, X, 29, 1, Z), " &
"27 (BC_2, *, control, 1), " &
"26 (BC_7, P4_31, bidir, X, 27, 1, Z), " &
"25 (BC_2, *, control, 1), " &
"24 (BC_7, P1_1, bidir, X, 25, 1, Z), " &
"23 (BC_0, *, internal, X), " &
"22 (BC_0, *, internal, X), " &
"21 (BC_2, *, control, 1), " &
"20 (BC_7, P1_0, bidir, X, 21, 1, Z), " &
"19 (BC_2, *, control, 1), " &
"18 (BC_7, P3_0, bidir, X, 19, 1, Z), " &
"17 (BC_0, *, internal, X), " &
"16 (BC_0, *, internal, X), " &
"15 (BC_2, *, control, 1), " &
"14 (BC_7, P3_1, bidir, X, 15, 1, Z), " &
"13 (BC_2, *, control, 1), " &
"12 (BC_7, P0_2, bidir, X, 13, 1, Z), " &
"11 (BC_0, *, internal, X), " &
"10 (BC_0, *, internal, X), " &
"9 (BC_2, *, control, 1), " &
"8 (BC_7, P0_3, bidir, X, 9, 1, Z), " &
"7 (BC_0, *, internal, X), " &
"6 (BC_0, *, internal, X), " &
"5 (BC_2, *, control, 1), " &
"4 (BC_7, RTCK, bidir, X, 5, 1, PULL1)," &
"3 (BC_2, *, control, 1), " &
"2 (BC_7, P3_2, bidir, X, 3, 1, Z), " &
"1 (BC_0, *, internal, X), " &
"0 (BC_0, *, internal, X) ";
end LPC23XXFBD144;