-- M O T O R O L A A D V T J T A G S O F T W A R E
-- BSDL File Generated: Thu Apr 14 01:40:02 2005
--
-- Revision History: updated by Mac Lobdell, 6 Dec 2005
--
entity MCF5213 is
generic (PHYSICAL_PIN_MAP : string := "MAPBGA_81");
port ( VSS0: linkage bit;
URTS1: inout bit;
TEST: in bit;
UCTS0: inout bit;
URXD0: inout bit;
UTXD0: inout bit;
URTS0: inout bit;
SCL: inout bit;
SDA: inout bit;
QSPI_CS3: inout bit;
QSPI_CS2: inout bit;
QSPI_DIN: inout bit;
QSPI_DOUT: inout bit;
SCK: inout bit;
QSPI_CS1: inout bit;
QSPI_CS0: inout bit;
RCON: in bit;
VDD0: linkage bit;
VDD1: linkage bit;
VSS1: linkage bit;
VSS2: linkage bit;
VDD2: linkage bit;
VSS3: linkage bit;
VDD3: linkage bit;
VSS4: linkage bit;
VSS5: linkage bit;
JTAG_EN: in bit;
DTIN3: inout bit;
DTIN2: inout bit;
PWM3: inout bit;
VDD4: linkage bit;
VDD5: linkage bit;
VSS6: linkage bit;
DTIN1: inout bit;
DTIN0: inout bit;
PWM1: inout bit;
CLKMOD1: in bit;
CLKMOD0: in bit;
VDD6: linkage bit;
AN0: inout bit;
AN1: inout bit;
AN2: inout bit;
AN3: inout bit;
VSSA0: linkage bit;
VSSA1: linkage bit;
VRL: linkage bit;
VRH: linkage bit;
VDDA0: linkage bit;
AN7: inout bit;
AN6: inout bit;
AN5: inout bit;
AN4: inout bit;
VSTBY: linkage bit;
GPT0: inout bit;
GPT1: inout bit;
PWM5: inout bit;
GPT2: inout bit;
GPT3: inout bit;
PWM7: inout bit;
TCLK: in bit;
VSSPLL0: linkage bit;
XTAL: inout bit;
EXTAL: linkage bit;
VDDPLL: linkage bit;
TMS: in bit;
TDI: in bit;
TDO: out bit;
TRST: in bit;
ALLPST: out bit;
IRQ1: inout bit;
IRQ2: inout bit;
IRQ3: inout bit;
IRQ4: inout bit;
IRQ5: inout bit;
IRQ6: inout bit;
IRQ7: inout bit;
RSTI: in bit;
RSTO: inout bit;
UCTS1: inout bit;
UTXD1: inout bit;
URXD1: inout bit);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of MCF5213 : entity is "STD_1149_1_2001";
attribute PIN_MAP of MCF5213 : entity is PHYSICAL_PIN_MAP;
constant MAPBGA_81 : PIN_MAP_STRING :=
"VSS0: A1, " &
"UTXD1: A2, " &
"RSTI: A3, " &
"IRQ5: A4, " &
"IRQ2: A5, " &
"TRST: A6, " &
"TDI: A7, " &
"TMS: A8, " &
"VSS1: A9, " &
"URTS1: B1, " &
"URXD1: B2, " &
"RSTO: B3, " &
"IRQ6: B4, " &
"IRQ3: B5, " &
"ALLPST: B6, " &
"TDO: B7, " &
"VDDPLL: B8, " &
"EXTAL: B9, " &
"UCTS0: C1, " &
"TEST: C2, " &
"UCTS1: C3, " &
"IRQ7: C4, " &
"IRQ4: C5, " &
"IRQ1: C6, " &
"TCLK: C7, " &
"VSSPLL0: C8, " &
"XTAL: C9, " &
"URXD0: D1, " &
"UTXD0: D2, " &
"URTS0: D3, " &
"VSS2: D4, " &
"VDD0: D5, " &
"VSS3: D6, " &
"PWM7: D7, " &
"GPT3: D8, " &
"GPT2: D9, " &
"SCL: E1, " &
"SDA: E2, " &
"VDD1: E3, " &
"VDD2: E4, " &
"VDD3: E5, " &
"VDD4: E6, " &
"VDD5: E7, " &
"PWM5: E8, " &
"GPT1: E9, " &
"QSPI_CS3: F1, " &
"QSPI_CS2: F2, " &
"QSPI_DIN: F3, " &
"VSS4: F4, " &
"VDD6: F5, " &
"VSS5: F6, " &
"GPT0: F7, " &
"VSTBY: F8, " &
"AN4: F9, " &
"QSPI_DOUT: G1, " &
"SCK: G2, " &
"RCON: G3, " &
"DTIN1: G4, " &
"CLKMOD0: G5, " &
"AN2: G6, " &
"AN3: G7, " &
"AN5: G8, " &
"AN6: G9, " &
"QSPI_CS0: H1, " &
"QSPI_CS1: H2, " &
"DTIN3: H3, " &
"DTIN0: H4, " &
"CLKMOD1: H5, " &
"AN1: H6, " &
"VSSA0: H7, " &
"VDDA0: H8, " &
"AN7: H9, " &
"VSS6: J1, " &
"JTAG_EN: J2, " &
"DTIN2: J3, " &
"PWM3: J4, " &
"PWM1: J5, " &
"AN0: J6, " &
"VRL: J7, " &
"VRH: J8, " &
"VSSA1: J9 ";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_RESET of TRST : signal is true;
attribute TAP_SCAN_CLOCK of TCLK : signal is (25.0e6, BOTH);
attribute COMPLIANCE_PATTERNS of MCF5213 : entity is
"(TEST, JTAG_EN) (01)";
attribute INSTRUCTION_LENGTH of MCF5213 : entity is 4;
attribute INSTRUCTION_OPCODE of MCF5213 : entity is
"EXTEST (0000)," &
"IDCODE (0001)," &
"CLAMP (1100)," &
"HIGHZ (1001)," &
"SAMPLE (0010)," &
"PRELOAD (0010)," &
"TEST_LEAKAGE (0101)," &
"ENABLE_TEST_CTRL (0110)," &
"LOCKOUT_RECOVERY (1011)," &
"BYPASS (1111)";
attribute INSTRUCTION_CAPTURE of MCF5213 : entity is "0001";
attribute INSTRUCTION_PRIVATE of MCF5213 : entity is
"TEST_LEAKAGE, ENABLE_TEST_CTRL ";
attribute IDCODE_REGISTER of MCF5213 : entity is
"00001000000001000010000000011101";
attribute REGISTER_ACCESS of MCF5213 : entity is
"BYPASS (TEST_LEAKAGE)," &
"TEST_CTRL[3] (ENABLE_TEST_CTRL)," &
"JTAG_CFM_CLKDIV[7] (LOCKOUT_RECOVERY)";
attribute BOUNDARY_LENGTH of MCF5213 : entity is 123;
attribute BOUNDARY_REGISTER of MCF5213 : entity is
-- num cell port func safe [ccell dis rslt]
"0 (BC_2, *, control, 0)," &
"1 (BC_7, URTS1, bidir, X, 0, 0, Z)," &
"2 (BC_2, *, control, 0)," &
"3 (BC_7, UCTS0, bidir, X, 2, 0, Z)," &
"4 (BC_2, *, control, 0)," &
"5 (BC_7, URXD0, bidir, X, 4, 0, Z)," &
"6 (BC_2, *, control, 0)," &
"7 (BC_7, UTXD0, bidir, X, 6, 0, Z)," &
"8 (BC_2, *, control, 0)," &
"9 (BC_7, URTS0, bidir, X, 8, 0, Z)," &
"10 (BC_2, *, control, 0)," &
"11 (BC_7, SCL, bidir, X, 10, 0, Z)," &
"12 (BC_2, *, control, 0)," &
"13 (BC_7, SDA, bidir, X, 12, 0, Z)," &
"14 (BC_2, *, control, 0)," &
"15 (BC_7, QSPI_CS3, bidir, X, 14, 0, Z)," &
"16 (BC_2, *, control, 0)," &
"17 (BC_7, QSPI_CS2, bidir, X, 16, 0, Z)," &
"18 (BC_2, *, control, 0)," &
"19 (BC_7, QSPI_DIN, bidir, X, 18, 0, Z)," &
-- num cell port func safe [ccell dis rslt]
"20 (BC_2, *, control, 0)," &
"21 (BC_7, QSPI_DOUT, bidir, X, 20, 0, Z)," &
"22 (BC_2, *, control, 0)," &
"23 (BC_7, SCK, bidir, X, 22, 0, Z)," &
"24 (BC_2, *, control, 0)," &
"25 (BC_7, QSPI_CS1, bidir, X, 24, 0, Z)," &
"26 (BC_2, *, control, 0)," &
"27 (BC_7, QSPI_CS0, bidir, X, 26, 0, Z)," &
"28 (BC_4, RCON, input, X)," &
"29 (BC_2, *, internal, 0)," &
"30 (BC_2, *, internal, 0)," &
"31 (BC_2, *, internal, 0)," &
"32 (BC_2, *, internal, 0)," &
"33 (BC_2, *, internal, 0)," &
"34 (BC_2, *, internal, 0)," &
"35 (BC_2, *, internal, 0)," &
"36 (BC_2, *, internal, 0)," &
"37 (BC_2, *, control, 0)," &
"38 (BC_7, DTIN3, bidir, X, 37, 0, Z)," &
"39 (BC_2, *, control, 0)," &
-- num cell port func safe [ccell dis rslt]
"40 (BC_7, DTIN2, bidir, X, 39, 0, Z)," &
"41 (BC_2, *, control, 0)," &
"42 (BC_7, PWM3, bidir, X, 41, 0, Z)," &
"43 (BC_2, *, internal, 0)," &
"44 (BC_2, *, control, 0)," &
"45 (BC_7, DTIN1, bidir, X, 44, 0, Z)," &
"46 (BC_2, *, control, 0)," &
"47 (BC_7, DTIN0, bidir, X, 46, 0, Z)," &
"48 (BC_2, *, control, 0)," &
"49 (BC_7, PWM1, bidir, X, 48, 0, Z)," &
"50 (BC_4, CLKMOD1, input, X)," &
"51 (BC_4, CLKMOD0, input, X)," &
"52 (BC_2, *, control, 0)," &
"53 (BC_7, AN0, bidir, X, 52, 0, Z)," &
"54 (BC_2, *, control, 0)," &
"55 (BC_7, AN1, bidir, X, 54, 0, Z)," &
"56 (BC_2, *, control, 0)," &
"57 (BC_7, AN2, bidir, X, 56, 0, Z)," &
"58 (BC_2, *, control, 0)," &
"59 (BC_7, AN3, bidir, X, 58, 0, Z)," &
"60 (BC_2, *, control, 0)," &
-- num cell port func safe [ccell dis rslt]
"61 (BC_7, AN7, bidir, X, 60, 0, Z)," &
"62 (BC_2, *, control, 0)," &
"63 (BC_7, AN6, bidir, X, 62, 0, Z)," &
"64 (BC_2, *, control, 0)," &
"65 (BC_7, AN5, bidir, X, 64, 0, Z)," &
"66 (BC_2, *, control, 0)," &
"67 (BC_7, AN4, bidir, X, 66, 0, Z)," &
"68 (BC_2, *, control, 0)," &
"69 (BC_7, GPT0, bidir, X, 68, 0, Z)," &
"70 (BC_2, *, control, 0)," &
"71 (BC_7, GPT1, bidir, X, 70, 0, Z)," &
"72 (BC_2, *, control, 0)," &
"73 (BC_7, PWM5, bidir, X, 72, 0, Z)," &
"74 (BC_2, *, control, 0)," &
"75 (BC_7, GPT2, bidir, X, 74, 0, Z)," &
"76 (BC_2, *, control, 0)," &
"77 (BC_7, GPT3, bidir, X, 76, 0, Z)," &
"78 (BC_2, *, control, 0)," &
"79 (BC_7, PWM7, bidir, X, 78, 0, Z)," &
"80 (BC_2, *, internal, 0)," &
-- num cell port func safe [ccell dis rslt]
"81 (BC_2, *, internal, 0)," &
"82 (BC_2, *, internal, 0)," &
"83 (BC_2, *, internal, 0)," &
"84 (BC_2, *, internal, 0)," &
"85 (BC_2, *, internal, 0)," &
"86 (BC_2, *, internal, 0)," &
"87 (BC_2, *, internal, 0)," &
"88 (BC_2, *, control, 0)," &
"89 (BC_7, XTAL, bidir, X, 88, 0, Z)," &
"90 (BC_2, *, internal, 0)," &
"91 (BC_2, *, internal, 0)," &
"92 (BC_2, *, internal, 0)," &
"93 (BC_2, *, internal, 0)," &
"94 (BC_2, *, internal, 0)," &
"95 (BC_2, *, internal, 0)," &
"96 (BC_2, *, internal, 0)," &
"97 (BC_2, *, internal, 0)," &
"98 (BC_2, *, control, 0)," &
"99 (BC_2, ALLPST, output3, X, 98, 0, Z)," &
"100 (BC_2, *, control, 0)," &
-- num cell port func safe [ccell dis rslt]
"101 (BC_7, IRQ1, bidir, X, 100, 0, Z)," &
"102 (BC_2, *, control, 0)," &
"103 (BC_7, IRQ2, bidir, X, 102, 0, Z)," &
"104 (BC_2, *, control, 0)," &
"105 (BC_7, IRQ3, bidir, X, 104, 0, Z)," &
"106 (BC_2, *, control, 0)," &
"107 (BC_7, IRQ4, bidir, X, 106, 0, Z)," &
"108 (BC_2, *, control, 0)," &
"109 (BC_7, IRQ5, bidir, X, 108, 0, Z)," &
"110 (BC_2, *, control, 0)," &
"111 (BC_7, IRQ6, bidir, X, 110, 0, Z)," &
"112 (BC_2, *, control, 0)," &
"113 (BC_7, IRQ7, bidir, X, 112, 0, Z)," &
"114 (BC_4, RSTI, input, X)," &
"115 (BC_2, *, control, 0)," &
"116 (BC_7, RSTO, bidir, X, 115, 0, Z)," &
"117 (BC_2, *, control, 0)," &
"118 (BC_7, UCTS1, bidir, X, 117, 0, Z)," &
"119 (BC_2, *, control, 0)," &
"120 (BC_7, UTXD1, bidir, X, 119, 0, Z)," &
-- num cell port func safe [ccell dis rslt]
"121 (BC_2, *, control, 0)," &
"122 (BC_7, URXD1, bidir, X, 121, 0, Z)";
end MCF5213;