--*****************************************************************
--
-- Device: M4A3-96/48 100 pin TQFP
-- File Name: M4A96TL.BSM
-- Written by: Phil Vu 10/14/99
--
-- Modifications:
-- 03/28/2000 (jkb): Changed port, PIN_MAP_STRING, and BSDL description
-- statements from IO array to IO Segment arrays.
-- 03/31/2000 (jkb): updated Copyright comments.
-- ****************************************************************
-- * Copyright 1999, 2000 Lattice/Vantis Corporation *
-- * 995 Stewart Dr. Sunnyvale, Ca 94088 *
-- * All rights reserved. No part of this program or publication*
-- * may be reproduced, transmitted, transcribed, stored in a *
-- * retrieval system, or translated into any language or *
-- * computer language, in any form or by any means without this *
-- * notice appearing within. *
-- ****************************************************************
-- * Lattice/Vantis makes no warranty for the use of this *
-- * product and assumes no responsibility for any errors which *
-- * may appear within. Neither does it make a commitment to *
-- * update this information. *
-- ****************************************************************
-- * This is the template BSDL file to be used for the purpose *
-- * of verifying the part's compliance with the IEEE standard *
-- * 1149.1-1990. *
-- ****************************************************************
--
-- This file has been verified by:
-- Teradyne VICTORY v 2.10
-- - Syntax Check using BSA
-- - Test vector generation using BSA
--
-- Hewlett-Packard Boundary-Scan Software
-- - Syntax Check
--
-- Genrad Boundary-Scan Software
-- - Syntax Check
-- - Physical Verification
--
-- Entity format: Mabcdddeeefggg
-- a = family (1, 2, 4, 5)
-- b = A for "A" type parts
-- c = Vcc level: 5, 3, 2, or 1 for 5.0, 3.3, 2.5, or 1.8 VDC
-- ddd = number of macrocells, such as 064
-- eee = number of I/O pins, such as 032
-- f = package: L, P, T, or B for PLCC, PQFP, TQFP, or BGA
-- ggg = number of pins, such as 044
entity M4A3096048T100 is
generic(PHYSICAL_PIN_MAP : string := "TQFP_100pin");
port (
DED_IN : in bit_vector(0 to 7); -- Clocks/Inputs
IOA : inout bit_vector(0 to 7); -- Segment A pins
IOB : inout bit_vector(0 to 7); -- Segment B pins
IOC : inout bit_vector(0 to 7); -- Segment C pins
IOD : inout bit_vector(0 to 7); -- Segment D pins
IOE : inout bit_vector(0 to 7); -- Segment E pins
IOF : inout bit_vector(0 to 7); -- Segment F pins
TCK, TMS, TDI: in bit; -- JTAG inputs
TDO : out bit; -- JTAG outputs
VCC : linkage bit_vector(0 to 3);
GND : linkage bit_vector(0 to 7);
NC : linkage bit_vector(0 to 27)
);
use STD_1149_1_1990.all; -- get JTAG definitions and attributes
attribute PIN_MAP of M4A3096048T100 : entity is PHYSICAL_PIN_MAP;
constant TQFP_100pin : PIN_MAP_STRING :=
"DED_IN: (11, 14, 36, 41, 61, 64, 86, 91), " & -- Clk/Inp Pins
"IOA : ( 6, 5, 97, 96, 95, 94, 93, 92)," & -- I/O A
"IOB : ( 7, 8, 9, 10, 15, 16, 17, 18)," & -- I/O B
"IOC : ( 19, 20, 29, 30, 31, 32, 33, 34)," & -- I/O C
"IOD : ( 56, 55, 47, 46, 45, 44, 43, 42)," & -- I/O D
"IOE : ( 68, 67, 66, 65, 60, 59, 58, 57)," & -- I/O E
"IOF : ( 69, 70, 79, 80, 81, 82, 83, 84)," & -- I/O F
"TDI: 2, TMS: 23, TCK: 24, TDO: 74, " & -- JTAG
"VCC: (12, 40, 62, 90), " & -- POWER
"GND: (13, 26, 39, 50, 63, 76, 89, 100), " & -- GROUND PINS
"NC : ( 1, 3, 4, 21, 22, 25, 27, 28, " &
" 35, 37, 38, 48, 49, 51, 52, 53, " &
" 54, 71, 72, 73, 75, 77, 78, 85, " &
" 87, 88, 98, 99)"; -- No Connect
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (20.0e6, BOTH);
-- Instruction register definitions
attribute INSTRUCTION_LENGTH of M4A3096048T100 : entity is 6;
attribute INSTRUCTION_OPCODE of M4A3096048T100 : entity is
"BYPASS (111111)," &
"EXTEST (000000)," &
"SAMPLE (000010)," &
"IDCODE (000001)," &
"USERCODE (010000)," &
"HIGHZ (010001)," &
"PRIV003 (000011)," &
"PRIV004 (000100)," &
"PRIV005 (000101)," &
"PRIV006 (000110)," &
"PRIV007 (000111)," &
"PRIV008 (001000)," &
"PRIV009 (001001)," &
"PRIV00F (001111)," &
"PRIVATE (110011,110100,110000,110010,100101,101110," &
"100111,101101,001100,001101,001110)";
attribute INSTRUCTION_CAPTURE of M4A3096048T100 : entity is "000001";
attribute INSTRUCTION_DISABLE of M4A3096048T100 : entity is "HIGHZ";
attribute INSTRUCTION_PRIVATE of M4A3096048T100 : entity is "PRIVATE";
attribute IDCODE_REGISTER of M4A3096048T100 : entity is
"0001" & -- version number
"0111010011010110" & -- part identification
"00010101011" & -- company code
"1"; -- mandatory 1
attribute USERCODE_REGISTER of M4A3096048T100 : entity is
"11111111111111111111111111111111";
attribute REGISTER_ACCESS of M4A3096048T100 : entity is
"BYPASS (BYPASS, HIGHZ, PRIV005, PRIV006, PRIV008, PRIV009)," &
"BOUNDARY (EXTEST, SAMPLE)," &
"ROWREG[80](PRIV003)," &
"COLREG[582](PRIV004, PRIV007)," &
"PRIVR00F[5](PRIV00F)";
-- **************************************************************
-- * BOUNDARY SCAN CELL REGISTER DESCRIPTION
-- * THE FIRST CELL (0) IS THE CELL CLOSEST TO TDO
-- **************************************************************
attribute BOUNDARY_CELLS of M4A3096048T100: entity is "BC_1";
attribute BOUNDARY_LENGTH of M4A3096048T100: entity is 152;
attribute BOUNDARY_REGISTER of M4A3096048T100: entity is
-- 1. The order of the I/O cell is OE - OUTPUT - INPUT
-- 2. The output is disabled when a 0 is shifted into the OE cell.
-- 3. The pictoral representation of the Boundary scan
-- register is found in VANTIS document no. 93-009-6105-JT-01.
----------------------------- Block A -------------------------------
" 151 (BC_1, IOA(0), INPUT , X)," & -- A0
" 150 (BC_1, IOA(0), OUTPUT3, X, 149, 0, Z)," &
" 149 (BC_1, *, CONTROL, 0)," &
" 148 (BC_1, IOA(1), INPUT , X)," &
" 147 (BC_1, IOA(1), OUTPUT3, X, 146, 0, Z)," &
" 146 (BC_1, *, CONTROL, 0)," &
" 145 (BC_1, IOA(2), INPUT , X)," &
" 144 (BC_1, IOA(2), OUTPUT3, X, 143, 0, Z)," &
" 143 (BC_1, *, CONTROL, 0)," &
" 142 (BC_1, IOA(3), INPUT , X)," &
" 141 (BC_1, IOA(3), OUTPUT3, X, 140, 0, Z)," &
" 140 (BC_1, *, CONTROL, 0)," &
" 139 (BC_1, IOA(4), INPUT , X)," &
" 138 (BC_1, IOA(4), OUTPUT3, X, 137, 0, Z)," &
" 137 (BC_1, *, CONTROL, 0)," &
" 136 (BC_1, IOA(5), INPUT , X)," &
" 135 (BC_1, IOA(5), OUTPUT3, X, 134, 0, Z)," &
" 134 (BC_1, *, CONTROL, 0)," &
" 133 (BC_1, IOA(6), INPUT , X)," &
" 132 (BC_1, IOA(6), OUTPUT3, X, 131, 0, Z)," &
" 131 (BC_1, *, CONTROL, 0)," &
" 130 (BC_1, IOA(7), INPUT , X)," & -- A7
" 129 (BC_1, IOA(7), OUTPUT3, X, 128, 0, Z)," &
" 128 (BC_1, *, CONTROL, 0)," &
----------------------------- Block B -------------------------------------------------
" 127 (BC_1, IOB(0), INPUT , X)," & -- B0
" 126 (BC_1, IOB(0), OUTPUT3, X, 125, 0, Z)," &
" 125 (BC_1, *, CONTROL, 0)," &
" 124 (BC_1, IOB(1), INPUT , X)," &
" 123 (BC_1, IOB(1), OUTPUT3, X, 122, 0, Z)," &
" 122 (BC_1, *, CONTROL, 0)," &
" 121 (BC_1, IOB(2), INPUT , X)," &
" 120 (BC_1, IOB(2), OUTPUT3, X, 119, 0, Z)," &
" 119 (BC_1, *, CONTROL, 0)," &
" 118 (BC_1, IOB(3), INPUT , X)," &
" 117 (BC_1, IOB(3), OUTPUT3, X, 116, 0, Z)," &
" 116 (BC_1, *, CONTROL, 0)," &
" 115 (BC_1, IOB(4), INPUT , X)," &
" 114 (BC_1, IOB(4), OUTPUT3, X, 113, 0, Z)," &
" 113 (BC_1, *, CONTROL, 0)," &
" 112 (BC_1, IOB(5), INPUT , X)," &
" 111 (BC_1, IOB(5), OUTPUT3, X, 110, 0, Z)," &
" 110 (BC_1, *, CONTROL, 0)," &
" 109 (BC_1, IOB(6), INPUT , X)," &
" 108 (BC_1, IOB(6), OUTPUT3, X, 107, 0, Z)," &
" 107 (BC_1, *, CONTROL, 0)," &
" 106 (BC_1, IOB(7), INPUT , X)," & -- B7
" 105 (BC_1, IOB(7), OUTPUT3, X, 104, 0, Z)," &
" 104 (BC_1, *, CONTROL, 0)," &
----------------------------- II0/Clock0 & II1/Clock1 -----------------------------
" 103 (BC_1, DED_IN(0), INPUT, X)," &
" 102 (BC_1, DED_IN(1), INPUT, X)," &
----------------------------- Block C -------------------------------------------------
" 101 (BC_1, IOC(0), INPUT , X)," & -- C0
" 100 (BC_1, IOC(0), OUTPUT3, X, 99, 0, Z)," &
" 99 (BC_1, *, CONTROL, 0)," &
" 98 (BC_1, IOC(1), INPUT , X)," &
" 97 (BC_1, IOC(1), OUTPUT3, X, 96, 0, Z)," &
" 96 (BC_1, *, CONTROL, 0)," &
" 95 (BC_1, IOC(2), INPUT , X)," &
" 94 (BC_1, IOC(2), OUTPUT3, X, 93, 0, Z)," &
" 93 (BC_1, *, CONTROL, 0)," &
" 92 (BC_1, IOC(3), INPUT , X)," &
" 91 (BC_1, IOC(3), OUTPUT3, X, 90, 0, Z)," &
" 90 (BC_1, *, CONTROL, 0)," &
" 89 (BC_1, IOC(4), INPUT , X)," &
" 88 (BC_1, IOC(4), OUTPUT3, X, 87, 0, Z)," &
" 87 (BC_1, *, CONTROL, 0)," &
" 86 (BC_1, IOC(5), INPUT , X)," &
" 85 (BC_1, IOC(5), OUTPUT3, X, 84, 0, Z)," &
" 84 (BC_1, *, CONTROL, 0)," &
" 83 (BC_1, IOC(6), INPUT , X)," &
" 82 (BC_1, IOC(6), OUTPUT3, X, 81, 0, Z)," &
" 81 (BC_1, *, CONTROL, 0)," &
" 80 (BC_1, IOC(7), INPUT , X)," & -- C7
" 79 (BC_1, IOC(7), OUTPUT3, X, 78, 0, Z)," &
" 78 (BC_1, *, CONTROL, 0)," &
----------------------------- II2 & II3 -----------------------------------------------
" 77 (BC_1, DED_IN(2), INPUT, X)," &
" 76 (BC_1, DED_IN(3), INPUT, X)," &
----------------------------- Block D -------------------------------------------------
" 75 (BC_1, IOD(0), INPUT , X)," & -- D0
" 74 (BC_1, IOD(0), OUTPUT3, X, 73, 0, Z)," &
" 73 (BC_1, *, CONTROL, 0)," &
" 72 (BC_1, IOD(1), INPUT , X)," &
" 71 (BC_1, IOD(1), OUTPUT3, X, 70, 0, Z)," &
" 70 (BC_1, *, CONTROL, 0)," &
" 69 (BC_1, IOD(2), INPUT , X)," &
" 68 (BC_1, IOD(2), OUTPUT3, X, 67, 0, Z)," &
" 67 (BC_1, *, CONTROL, 0)," &
" 66 (BC_1, IOD(3), INPUT , X)," &
" 65 (BC_1, IOD(3), OUTPUT3, X, 64, 0, Z)," &
" 64 (BC_1, *, CONTROL, 0)," &
" 63 (BC_1, IOD(4), INPUT , X)," &
" 62 (BC_1, IOD(4), OUTPUT3, X, 61, 0, Z)," &
" 61 (BC_1, *, CONTROL, 0)," &
" 60 (BC_1, IOD(5), INPUT , X)," &
" 59 (BC_1, IOD(5), OUTPUT3, X, 58, 0, Z)," &
" 58 (BC_1, *, CONTROL, 0)," &
" 57 (BC_1, IOD(6), INPUT , X)," &
" 56 (BC_1, IOD(6), OUTPUT3, X, 55, 0, Z)," &
" 55 (BC_1, *, CONTROL, 0)," &
" 54 (BC_1, IOD(7), INPUT , X)," & -- D7
" 53 (BC_1, IOD(7), OUTPUT3, X, 52, 0, Z)," &
" 52 (BC_1, *, CONTROL, 0)," &
----------------------------- II4/Clock2 & II5/Clock3 -----------------------------
" 51 (BC_1, DED_IN(4), INPUT, X)," &
" 50 (BC_1, DED_IN(5), INPUT, X)," &
----------------------------- Block E -------------------------------------------------
" 49 (BC_1, IOE(0), INPUT , X)," & -- E0
" 48 (BC_1, IOE(0), OUTPUT3, X, 47, 0, Z)," &
" 47 (BC_1, *, CONTROL, 0)," &
" 46 (BC_1, IOE(1), INPUT , X)," &
" 45 (BC_1, IOE(1), OUTPUT3, X, 44, 0, Z)," &
" 44 (BC_1, *, CONTROL, 0)," &
" 43 (BC_1, IOE(2), INPUT , X)," &
" 42 (BC_1, IOE(2), OUTPUT3, X, 41, 0, Z)," &
" 41 (BC_1, *, CONTROL, 0)," &
" 40 (BC_1, IOE(3), INPUT , X)," &
" 39 (BC_1, IOE(3), OUTPUT3, X, 38, 0, Z)," &
" 38 (BC_1, *, CONTROL, 0)," &
" 37 (BC_1, IOE(4), INPUT , X)," &
" 36 (BC_1, IOE(4), OUTPUT3, X, 35, 0, Z)," &
" 35 (BC_1, *, CONTROL, 0)," &
" 34 (BC_1, IOE(5), INPUT , X)," &
" 33 (BC_1, IOE(5), OUTPUT3, X, 32, 0, Z)," &
" 32 (BC_1, *, CONTROL, 0)," &
" 31 (BC_1, IOE(6), INPUT , X)," &
" 30 (BC_1, IOE(6), OUTPUT3, X, 29, 0, Z)," &
" 29 (BC_1, *, CONTROL, 0)," &
" 28 (BC_1, IOE(7), INPUT , X)," & -- E7
" 27 (BC_1, IOE(7), OUTPUT3, X, 26, 0, Z)," &
" 26 (BC_1, *, CONTROL, 0)," &
----------------------------- Block F -------------------------------------------------
" 25 (BC_1, IOF(0), INPUT , X)," & -- F0
" 24 (BC_1, IOF(0), OUTPUT3, X, 23, 0, Z)," &
" 23 (BC_1, *, CONTROL, 0)," &
" 22 (BC_1, IOF(1), INPUT , X)," &
" 21 (BC_1, IOF(1), OUTPUT3, X, 20, 0, Z)," &
" 20 (BC_1, *, CONTROL, 0)," &
" 19 (BC_1, IOF(2), INPUT , X)," &
" 18 (BC_1, IOF(2), OUTPUT3, X, 17, 0, Z)," &
" 17 (BC_1, *, CONTROL, 0)," &
" 16 (BC_1, IOF(3), INPUT , X)," &
" 15 (BC_1, IOF(3), OUTPUT3, X, 14, 0, Z)," &
" 14 (BC_1, *, CONTROL, 0)," &
" 13 (BC_1, IOF(4), INPUT , X)," &
" 12 (BC_1, IOF(4), OUTPUT3, X, 11, 0, Z)," &
" 11 (BC_1, *, CONTROL, 0)," &
" 10 (BC_1, IOF(5), INPUT , X)," &
" 9 (BC_1, IOF(5), OUTPUT3, X, 8, 0, Z)," &
" 8 (BC_1, *, CONTROL, 0)," &
" 7 (BC_1, IOF(6), INPUT , X)," &
" 6 (BC_1, IOF(6), OUTPUT3, X, 5, 0, Z)," &
" 5 (BC_1, *, CONTROL, 0)," &
" 4 (BC_1, IOF(7), INPUT , X)," & -- F7
" 3 (BC_1, IOF(7), OUTPUT3, X, 2, 0, Z)," &
" 2 (BC_1, *, CONTROL, 0)," &
----------------------------- II6 & II7 -----------------------------
" 1 (BC_1, DED_IN(6), INPUT, X)," &
" 0 (BC_1, DED_IN(7), INPUT, X) ";
end M4A3096048T100;
