-- ********************************************************************
-- * CLK5308S_TQFP48 BSDL Model *
-- * File Version: 1.0 *
-- * File Date: 12/14/2006 *
-- * *
-- * Standard Test Access Port and Boundary-Scan Architecture *
-- * VHDL Description File *
-- * *
-- * This BSDL file is created by genBSDL V 2.0 according to: *
-- * - IEEE Standard 1149.1-1994 *
-- * *
-- * This BSDL file has been syntax checked with: *
-- * - Lattice BSDL Syntax Checker *
-- * - Goepel BSDL Syntax Checker *
-- * - Agilent BSDL Syntax Checker *
-- * *
-- * Copyright 2000 - 2004 Lattice Semiconductor Corporation *
-- * 5555 NE Moore Ct., Hillsboro, OR 97124 *
-- * *
-- * All rights reserved. No part of this program or publication *
-- * may be reproduced, transmitted, transcribed, stored in a *
-- * retrieval system, or translated into any language or *
-- * computer language, in any form or by any means without this *
-- * notice appearing within. *
-- ********************************************************************
-- * *
-- * IMPORTANT *
-- * *
-- * The following is a BSDL file that tests all of the I/O pins *
-- * as bi-directional pins. The functionality of the BSCAN register *
-- * for this device is dependent of the pattern programmed into the *
-- * device. If the device is configured to use LVDS pairs or VREF *
-- * signals, an application specific BSDL file is required. *
-- * *
-- * For Further assistance, please contact Tech Support at *
-- * 1-800-LATTICE or techsupport@latticesemi.com *
-- ********************************************************************
-- * *
-- * REVISION HISTORY *
-- * Rev 1.00: *
-- * - Initial version; created from clk5312s_tqfp48.bsm *
-- * *
-- ********************************************************************
entity CLK5308S_TQFP48 is
generic (PHYSICAL_PIN_MAP : string := "tqfp48");
port (
NC : linkage bit_vector(1 to 8);
VCCO_0 : linkage bit;
BANK_0A : out bit;
GNDO_0 : linkage bit;
BANK_0B : out bit;
VCCO_1 : linkage bit;
BANK_1A : out bit;
GNDO_1 : linkage bit;
BANK_1B : out bit;
VCCO_2 : linkage bit;
BANK_2A : out bit;
GNDO_2 : linkage bit;
BANK_2B : out bit;
VTT_REFA : linkage bit;
REFA_REFP : in bit;
REFB_REFN : in bit;
VTT_REFB : linkage bit;
FBK : in bit;
VTT_FBK : linkage bit;
REFSEL : in bit;
RESETB : in bit;
BANK_3B : out bit;
GNDO_3 : linkage bit;
BANK_3A : out bit;
VCCO_3 : linkage bit;
TDO : out bit;
TMS : in bit;
TCK : in bit;
TDI : in bit;
VCCJ : linkage bit;
OEYB : in bit;
OEXB : in bit;
PLL_BYPASS : in bit;
LOCK : out bit;
VCCA : linkage bit;
GNDA : linkage bit;
GNDD : linkage bit_vector (1 to 3);
VCCD : linkage bit_vector (1 to 2));
-- Version Control
use STD_1149_1_2001.all; -- 1149.1-2001 attributes
-- Component Conformance Statement
attribute COMPONENT_CONFORMANCE of CLK5308S_TQFP48 : entity is "STD_1149_1_2001";
-- Device Package Pin Mapping
attribute PIN_MAP of CLK5308S_TQFP48 : entity is PHYSICAL_PIN_MAP;
constant tqfp48 : PIN_MAP_STRING :=
" VCCO_0: 5, " &
" BANK_0A: 6, " &
" GNDO_0: 7, " &
" BANK_0B: 8, " &
" VCCO_1: 9, " &
" BANK_1A: 10, " &
" GNDO_1: 11, " &
" BANK_1B: 12, " &
" VTT_REFA: 13, " &
" REFA_REFP: 14, " &
" REFB_REFN: 15, " &
" VTT_REFB: 16, " &
" FBK: 17, " &
" VTT_FBK: 18, " &
" REFSEL: 19, " &
" RESETB: 20, " &
" BANK_2B: 25, " &
" GNDO_2: 26, " &
" BANK_2A: 27, " &
" VCCO_2: 28, " &
" BANK_3B: 29, " &
" GNDO_3: 30, " &
" BANK_3A: 31, " &
" VCCO_3: 32, " &
" TDO: 37, " &
" TMS: 38, " &
" TCK: 39, " &
" TDI: 40, " &
" VCCJ: 41, " &
" OEYB: 42, " &
" OEXB: 43, " &
" PLL_BYPASS: 44, " &
" LOCK: 45, " &
" VCCA: 46, " &
" GNDA: 47, " &
" GNDD: ( 23, " &
" 24, " &
" 48)," &
" VCCD: ( 21, " &
" 22)," &
" NC: ( 1, " &
" 2, " &
" 3, " &
" 4, " &
" 33, " &
" 34, " &
" 35, " &
" 36) ";
-- End of pin mapping
-- Grouped port mapping and definition
-- attribute PORT_GROUPING of CLK5308S_TQFP48 : entity is
-- "DIFFERENTIAL_CURRENT ( " &
-- End of grouped port mapping
-- TAP definition and characteristics
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (25.0e6, BOTH);
-- Instruction register description
attribute INSTRUCTION_LENGTH of CLK5308S_TQFP48 : entity is 8;
attribute INSTRUCTION_OPCODE of CLK5308S_TQFP48 : entity is
"LSC_PROGRAM_USERCODE (00011010)," &
" ISC_ADDRESS_SHIFT (00000001)," &
" ISC_NOOP (00110000)," &
" IDCODE (00010110)," &
" ISC_PROGRAM (00000111)," &
"ISC_PROGRAM_SECURITY (00001001)," &
" PRELOAD (00011100)," &
" ISC_ENABLE (00010101)," &
" SAMPLE (00011100)," &
" ISC_READ (00101010)," &
" INTEST (00101100)," &
" ISC_PROGRAM_DONE (00101111)," &
" HIGHZ (00011000)," &
" BYPASS (11111111)," &
" ISC_DATA_SHIFT (00000010)," &
" ISC_DISCHARGE (00010100)," &
" ISC_DISABLE (00011110)," &
" ISC_ADDRESS_INIT (00100001)," &
"LSC_USER_LOGIC_RESET (00100010)," &
" USERCODE (00010111)," &
" ISC_ERASE (00000011)," &
" ISC_ERASE_DONE (00100100)," &
" CLAMP (00100000)," &
" EXTEST (00000000)";
attribute INSTRUCTION_CAPTURE of CLK5308S_TQFP48 : entity is
"00011X01";
--IDCODE and USERCODE register definition
attribute IDCODE_REGISTER of CLK5308S_TQFP48 : entity is
"0000" & --Version number
"0000000101110001" & --Device specific number
"000001000011"; --Company code
attribute USERCODE_REGISTER of CLK5308S_TQFP48 : entity is
"11111111111111111111111111111111";
attribute REGISTER_ACCESS of CLK5308S_TQFP48 : entity is
"BYPASS (BYPASS, " &
" HIGHZ, " &
" CLAMP), " &
"ISC_DEFAULT[1] (ISC_ENABLE, " &
" ISC_DISABLE, " &
" ISC_NOOP, " &
" ISC_ADDRESS_INIT, " &
" ISC_ERASE, " &
" ISC_DISCHARGE, " &
" ISC_PROGRAM_SECURITY, " &
" ISC_PROGRAM_DONE, " &
" ISC_ERASE_DONE, " &
" LSC_USER_LOGIC_RESET), " &
"ISC_ADDRESS[10] (ISC_ADDRESS_SHIFT), " &
"ISC_DATA[42] (ISC_DATA_SHIFT), " &
"BOUNDARY (SAMPLE, " &
" PRELOAD, " &
" EXTEST, " &
" INTEST), " &
"DEVICE_ID (IDCODE, " &
" USERCODE, " &
" LSC_PROGRAM_USERCODE), " &
"ISC_PDATA[42] (ISC_PROGRAM, " &
" ISC_READ)";
-- *****************************************************************
-- Boundary Scan Register Description, Cell 0 is the closest to TDO
-- *****************************************************************
attribute BOUNDARY_LENGTH of CLK5308S_TQFP48 : entity is 34;
attribute BOUNDARY_REGISTER of CLK5308S_TQFP48 : entity is
"33 (BC_1, BANK_3A, output3, X, 32, 0, Z), " &
"32 (BC_1, *, control, 0), " &
"31 (BC_1, BANK_3B, output3, X, 30, 0, Z), " &
"30 (BC_1, *, control, 0), " &
"29 (BC_1, *, internal, 0), " &
"28 (BC_1, *, internal, 0), " &
"27 (BC_1, *, internal, 0), " &
"26 (BC_1, *, internal, 0), " &
"25 (BC_1, BANK_2A, output3, X, 24, 0, Z), " &
"24 (BC_1, *, control, 0), " &
"23 (BC_1, BANK_2B, output3, X, 22, 0, Z), " &
"22 (BC_1, *, control, 0), " &
"21 (BC_2, RESETB, input, X), " &
"20 (BC_2, REFSEL, input, X), " &
"19 (BC_2, FBK, input, X), " &
"18 (BC_2, REFB_REFN, input, X), " &
"17 (BC_2, REFA_REFP, input, X), " &
"16 (BC_1, BANK_1B, output3, X, 15, 0, Z), " &
"15 (BC_1, *, control, 0), " &
"14 (BC_1, BANK_1A, output3, X, 13, 0, Z), " &
"13 (BC_1, *, control, 0), " &
"12 (BC_1, *, internal, 0), " &
"11 (BC_1, *, internal, 0), " &
"10 (BC_1, *, internal, 0), " &
"9 (BC_1, *, internal, 0), " &
"8 (BC_1, BANK_0B, output3, X, 7, 0, Z), " &
"7 (BC_1, *, control, 0), " &
"6 (BC_1, BANK_0A, output3, X, 5, 0, Z), " &
"5 (BC_1, *, control, 0), " &
"4 (BC_1, LOCK, output3, X, 3, 0, Z), " &
"3 (BC_1, *, control, 0), " &
"2 (BC_2, PLL_BYPASS, input, X), " &
"1 (BC_2, OEXB, input, X), " &
"0 (BC_2, OEYB, input, X)";
end CLK5308S_TQFP48;