--$ XILINX$RCSfile: xcs10xl_pc84.bsd,v $
--$ XILINX$Revision: 1.3 $
--
-- BSDL file for device XCS10XL, package PC84
-- Xilinx, Inc. $State: FINAL $ $Date: 2002-01-29 14:11:30-08 $
-- Generated by createBSDL 2.10
--
-- For technical support, contact Xilinx as follows:
-- North America 1-800-255-7778 hotline@xilinx.com
-- United Kingdom +44 870 7350 610 eurosupport@xilinx.com
-- France (33) 1 3463 0100 eurosupport@xilinx.com
-- Germany (49) 89 991 54930 eurosupport@xilinx.com
-- Japan (81) 3-3297-9163 jhotline@xilinx.com
--
-- BSDL verified to conform to 1149.1b-1994 syntax. This device has been
-- tested by the Intellitech 1149.1 Verification Lab using the Intellitech
-- Eclipse(TM) Scan Diagnostic Tool and the Intellitech RCT(TM). This
-- device has been verified to operate according to the BSDL provided,
-- and is compatible with the IEEE 1149.1 standard when the operating
-- instructions in the BSDL are followed.
-- PH: 603-868-7116 or email: scansupport@intellitech.com
--
-- This BSDL file reflects the pre-configuration JTAG behavior. To reflect
-- the post-configuration JTAG behavior (if any), edit this file as described
-- below. Many of these changes are demonstrated by commented-out template
-- lines preceeding the lines they would replace:
--
-- 1. Enable USER instructions as appropriate (see below).
-- 2. For inputs using uncontrolled paths (e.g. PGCK, SGCK), change
-- boundary cell function from 'input' to 'clock' or 'observe_only'.
-- 3. Set disable result of all pads as configured.
-- 4. Set safe state of boundary cells as necessary.
-- 5. Set safe state of INIT output to X, or as necessary (see below).
-- 6. Rename entity if necessary to avoid name collisions.
-- 7. Change INIT port direction from "in" to "inout" (see below).
-- 8. Change COMPLIANCE_PATTERNS to "(LPWRB,PROGRAM) (11)" (see below).
-- 9. Change INIT boundary cells from internal to controlr, output3,
-- and input, respectively (see below).
-- 10. Remove the design warning regarding keeping INIT low.
--
-- NOTE: Post-configuration JTAG is available only if the BSCAN symbol
-- is instantiated in the FPGA design.
-- NOTE: PULLUP symbols must be instantiated on the TMS and TDI pins
-- in the FPGA design to comply with IEEE Std. 1149.1-1993.
entity XCS10XL_PC84 is
generic (PHYSICAL_PIN_MAP : string := "PC84" );
port (
CCLK: linkage bit;
DONE: linkage bit;
GND: linkage bit_vector (1 to 8);
-- INIT is not a compliance enable after configuration. For post-configuration
-- operation un-comment the next line and comment out the following line so
-- that INIT is of type inout.
-- INIT: inout bit;
INIT: in bit;
IO2: inout bit;
IO3: inout bit;
IO6: inout bit;
IO7: inout bit;
IO13: inout bit;
IO14: inout bit;
IO17: inout bit;
IO18: inout bit;
IO22: inout bit;
IO23: inout bit;
IO32: inout bit;
IO37: inout bit;
IO38: inout bit;
IO41: inout bit;
IO42: inout bit;
IO47: inout bit;
IO48: inout bit;
IO52: inout bit;
IO56: inout bit;
IO57: inout bit;
IO64: inout bit;
IO65: inout bit;
IO69: inout bit;
IO73: inout bit;
IO74: inout bit;
IO79: inout bit;
IO83: inout bit;
IO84: inout bit;
IO89: inout bit;
IO90: inout bit;
IO94: inout bit;
IO95: inout bit;
IO98: inout bit;
IO99: inout bit;
IO105: inout bit;
IO106: inout bit;
IO109: inout bit;
IO116: inout bit;
IO117: inout bit;
IO120: inout bit;
IO121: inout bit;
IO124: inout bit;
IO125: inout bit;
IO128: inout bit;
IO129: inout bit;
IO135: inout bit;
IO136: inout bit;
IO139: inout bit;
IO140: inout bit;
IO146: inout bit;
IO147: inout bit;
IO150: inout bit;
IO151: inout bit;
IO157: inout bit;
IO158: inout bit;
IO161: inout bit;
IO162: inout bit;
LPWRB: in bit;
M0: in bit;
M1: inout bit;
PROGRAM: in bit;
TCK: in bit;
TDI: in bit;
TDO: out bit;
TMS: in bit;
VCC: linkage bit_vector (1 to 8)
); --end port list
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of XCS10XL_PC84 : entity is
"STD_1149_1_1993";
attribute PIN_MAP of XCS10XL_PC84 : entity is PHYSICAL_PIN_MAP;
constant PC84: PIN_MAP_STRING:=
"CCLK:P73," &
"DONE:P53," &
"GND:(P12,P21,P31,P43,P52,P64,P76,P1)," &
"INIT:P41," &
"IO2:P3," &
"IO3:P4," &
"IO6:P5," &
"IO7:P6," &
"IO13:P7," &
"IO14:P8," &
"IO17:P9," &
"IO18:P10," &
"IO22:P13," &
"IO23:P14," &
"IO32:P18," &
"IO37:P19," &
"IO38:P20," &
"IO41:P23," &
"IO42:P24," &
"IO47:P25," &
"IO48:P26," &
"IO52:P27," &
"IO56:P28," &
"IO57:P29," &
"IO64:P35," &
"IO65:P36," &
"IO69:P37," &
"IO73:P38," &
"IO74:P39," &
"IO79:P40," &
"IO83:P44," &
"IO84:P45," &
"IO89:P46," &
"IO90:P47," &
"IO94:P48," &
"IO95:P49," &
"IO98:P50," &
"IO99:P51," &
"IO105:P56," &
"IO106:P57," &
"IO109:P58," &
"IO116:P59," &
"IO117:P60," &
"IO120:P61," &
"IO121:P62," &
"IO124:P65," &
"IO125:P66," &
"IO128:P67," &
"IO129:P68," &
"IO135:P69," &
"IO136:P70," &
"IO139:P71," &
"IO140:P72," &
"IO146:P77," &
"IO147:P78," &
"IO150:P79," &
"IO151:P80," &
"IO157:P81," &
"IO158:P82," &
"IO161:P83," &
"IO162:P84," &
"LPWRB:P34," &
"M0:P32," &
"M1:P30," &
"PROGRAM:P55," &
"TCK:P16," &
"TDI:P15," &
"TDO:P75," &
"TMS:P17," &
"VCC:(P2,P11,P22,P33,P42,P54,P63,P74)";
--end pin map
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (2.0e6, LOW);
-- This is conservative. Real max is expected to be (~5MHz, BOTH).
attribute COMPLIANCE_PATTERNS of XCS10XL_PC84 : entity is
-- INIT is not a compliance enable after configuration. For post-configuration
-- operation un-comment the next line and comment out the corresponding line
-- below.
-- "(PROGRAM,LPWRB) (11)";
--
-- NOTE: If INIT has been high or floating since the later of power-on
-- and the last rising transition of PROGRAM, then the device may
-- be in configuration mode in which case some JTAG instructions
-- will not be available.
"(INIT,PROGRAM,LPWRB) (011)";
attribute INSTRUCTION_LENGTH of XCS10XL_PC84 : entity is 3;
attribute INSTRUCTION_OPCODE of XCS10XL_PC84 : entity is
"SAMPLE (001)," & -- Internal capture not valid until after config
"IDCODE (110)," &
"READBACK (100)," & -- Not available during configuration
"CONFIGURE (101)," & -- Not available during configuration
"USER2 (011)," & -- Not available until after configuration
"USER1 (010)," & -- Not available until after configuration
"EXTEST (000)," & -- Not available during configuration
"BYPASS (111)";
attribute INSTRUCTION_CAPTURE of XCS10XL_PC84 : entity is "X01";
-- MSB of instruction capture is low during configuration.
-- If the device is configured, and a USER instruction is implemented
-- and not private to the FPGA designer, then it should be removed
-- from INSTRUCTION_PRIVATE, and the target register should be defined
-- in REGISTER_ACCESS.
attribute INSTRUCTION_PRIVATE of XCS10XL_PC84 : entity is
"USER1," &
"USER2," &
"READBACK," &
"CONFIGURE";
attribute IDCODE_REGISTER of XCS10XL_PC84 : entity is
"XXXX" & -- version
"0000010" & -- family
"000001110" & -- array size
"00001001001" & -- manufacturer
"1"; -- required by 1149.1
attribute REGISTER_ACCESS of XCS10XL_PC84 : entity is
-- "<reg_name>[<length>] (USER1)," &
-- "<reg_name>[<length>] (USER2)," &
"BYPASS (BYPASS)," &
"DEVICE_ID (IDCODE)," &
"BOUNDARY (SAMPLE,EXTEST)";
attribute BOUNDARY_LENGTH of XCS10XL_PC84 : entity is 343;
attribute BOUNDARY_REGISTER of XCS10XL_PC84 : entity is
-- cellnum (type, port, function, safe[, ccell, disval, disrslt])
" 0 (BC_1, *, internal, X)," &
" 1 (BC_1, *, internal, X)," &
" 2 (BC_1, *, controlr, 1)," &
" 3 (BC_1, IO146, output3, X, 2, 1, PULL1)," &
" 4 (BC_1, IO146, input, X)," &
" 5 (BC_1, *, controlr, 1)," &
" 6 (BC_1, IO147, output3, X, 5, 1, PULL1)," &
" 7 (BC_1, IO147, input, X)," &
" 8 (BC_1, *, internal, 1)," & -- IO148.T
" 9 (BC_1, *, internal, X)," & -- IO148.O
" 10 (BC_1, *, internal, X)," & -- IO148.I
" 11 (BC_1, *, internal, 1)," & -- IO149.T
" 12 (BC_1, *, internal, X)," & -- IO149.O
" 13 (BC_1, *, internal, X)," & -- IO149.I
" 14 (BC_1, *, controlr, 1)," &
" 15 (BC_1, IO150, output3, X, 14, 1, PULL1)," &
" 16 (BC_1, IO150, input, X)," &
" 17 (BC_1, *, controlr, 1)," &
" 18 (BC_1, IO151, output3, X, 17, 1, PULL1)," &
" 19 (BC_1, IO151, input, X)," &
" 20 (BC_1, *, internal, 1)," & -- IO153.T
" 21 (BC_1, *, internal, X)," & -- IO153.O
" 22 (BC_1, *, internal, X)," & -- IO153.I
" 23 (BC_1, *, internal, 1)," & -- IO154.T
" 24 (BC_1, *, internal, X)," & -- IO154.O
" 25 (BC_1, *, internal, X)," & -- IO154.I
" 26 (BC_1, *, controlr, 1)," &
" 27 (BC_1, IO157, output3, X, 26, 1, PULL1)," &
" 28 (BC_1, IO157, input, X)," &
" 29 (BC_1, *, controlr, 1)," &
" 30 (BC_1, IO158, output3, X, 29, 1, PULL1)," &
" 31 (BC_1, IO158, input, X)," &
" 32 (BC_1, *, internal, 1)," & -- IO159.T
" 33 (BC_1, *, internal, X)," & -- IO159.O
" 34 (BC_1, *, internal, X)," & -- IO159.I
" 35 (BC_1, *, internal, 1)," & -- IO160.T
" 36 (BC_1, *, internal, X)," & -- IO160.O
" 37 (BC_1, *, internal, X)," & -- IO160.I
" 38 (BC_1, *, controlr, 1)," &
" 39 (BC_1, IO161, output3, X, 38, 1, PULL1)," &
" 40 (BC_1, IO161, input, X)," &
" 41 (BC_1, *, controlr, 1)," &
" 42 (BC_1, IO162, output3, X, 41, 1, PULL1)," &
" 43 (BC_1, IO162, input, X)," &
" 44 (BC_1, *, controlr, 1)," &
" 45 (BC_1, IO2, output3, X, 44, 1, PULL1)," &
" 46 (BC_1, IO2, input, X)," &
" 47 (BC_1, *, controlr, 1)," &
" 48 (BC_1, IO3, output3, X, 47, 1, PULL1)," &
" 49 (BC_1, IO3, input, X)," &
" 50 (BC_1, *, internal, 1)," & -- IO4.T
" 51 (BC_1, *, internal, X)," & -- IO4.O
" 52 (BC_1, *, internal, X)," & -- IO4.I
" 53 (BC_1, *, internal, 1)," & -- IO5.T
" 54 (BC_1, *, internal, X)," & -- IO5.O
" 55 (BC_1, *, internal, X)," & -- IO5.I
" 56 (BC_1, *, controlr, 1)," &
" 57 (BC_1, IO6, output3, X, 56, 1, PULL1)," &
" 58 (BC_1, IO6, input, X)," &
" 59 (BC_1, *, controlr, 1)," &
" 60 (BC_1, IO7, output3, X, 59, 1, PULL1)," &
" 61 (BC_1, IO7, input, X)," &
" 62 (BC_1, *, internal, 1)," & -- IO10.T
" 63 (BC_1, *, internal, X)," & -- IO10.O
" 64 (BC_1, *, internal, X)," & -- IO10.I
" 65 (BC_1, *, internal, 1)," & -- IO11.T
" 66 (BC_1, *, internal, X)," & -- IO11.O
" 67 (BC_1, *, internal, X)," & -- IO11.I
" 68 (BC_1, *, controlr, 1)," &
" 69 (BC_1, IO13, output3, X, 68, 1, PULL1)," &
" 70 (BC_1, IO13, input, X)," &
" 71 (BC_1, *, controlr, 1)," &
" 72 (BC_1, IO14, output3, X, 71, 1, PULL1)," &
" 73 (BC_1, IO14, input, X)," &
" 74 (BC_1, *, internal, 1)," & -- IO15.T
" 75 (BC_1, *, internal, X)," & -- IO15.O
" 76 (BC_1, *, internal, X)," & -- IO15.I
" 77 (BC_1, *, internal, 1)," & -- IO16.T
" 78 (BC_1, *, internal, X)," & -- IO16.O
" 79 (BC_1, *, internal, X)," & -- IO16.I
" 80 (BC_1, *, controlr, 1)," &
" 81 (BC_1, IO17, output3, X, 80, 1, PULL1)," &
" 82 (BC_1, IO17, input, X)," &
" 83 (BC_1, *, controlr, 1)," &
" 84 (BC_1, IO18, output3, X, 83, 1, PULL1)," &
" 85 (BC_1, IO18, input, X)," &
" 86 (BC_1, *, controlr, 1)," &
" 87 (BC_1, IO22, output3, X, 86, 1, PULL1)," &
" 88 (BC_1, IO22, input, X)," &
" 89 (BC_1, *, controlr, 1)," &
" 90 (BC_1, IO23, output3, X, 89, 1, PULL1)," &
" 91 (BC_1, IO23, input, X)," &
" 92 (BC_1, *, internal, 1)," & -- IO24.T
" 93 (BC_1, *, internal, X)," & -- IO24.O
" 94 (BC_1, *, internal, X)," & -- IO24.I
" 95 (BC_1, *, internal, 1)," & -- IO25.T
" 96 (BC_1, *, internal, X)," & -- IO25.O
" 97 (BC_1, *, internal, X)," & -- IO25.I
" 98 (BC_1, *, internal, X)," &
" 99 (BC_1, *, internal, X)," &
" 100 (BC_1, *, internal, X)," &
" 101 (BC_1, *, internal, X)," &
" 102 (BC_1, *, internal, X)," &
" 103 (BC_1, *, internal, X)," &
" 104 (BC_1, *, internal, 1)," & -- IO29.T
" 105 (BC_1, *, internal, X)," & -- IO29.O
" 106 (BC_1, *, internal, X)," & -- IO29.I
" 107 (BC_1, *, internal, 1)," & -- IO30.T
" 108 (BC_1, *, internal, X)," & -- IO30.O
" 109 (BC_1, *, internal, X)," & -- IO30.I
" 110 (BC_1, *, internal, X)," &
" 111 (BC_1, *, internal, X)," &
" 112 (BC_1, *, internal, X)," &
" 113 (BC_1, *, controlr, 1)," &
" 114 (BC_1, IO32, output3, X, 113, 1, PULL1)," &
" 115 (BC_1, IO32, input, X)," &
" 116 (BC_1, *, internal, 1)," & -- IO35.T
" 117 (BC_1, *, internal, X)," & -- IO35.O
" 118 (BC_1, *, internal, X)," & -- IO35.I
" 119 (BC_1, *, internal, 1)," & -- IO36.T
" 120 (BC_1, *, internal, X)," & -- IO36.O
" 121 (BC_1, *, internal, X)," & -- IO36.I
" 122 (BC_1, *, controlr, 1)," &
" 123 (BC_1, IO37, output3, X, 122, 1, PULL1)," &
" 124 (BC_1, IO37, input, X)," &
" 125 (BC_1, *, controlr, 1)," &
" 126 (BC_1, IO38, output3, X, 125, 1, PULL1)," &
" 127 (BC_1, IO38, input, X)," &
" 128 (BC_1, *, controlr, 1)," &
" 129 (BC_1, IO41, output3, X, 128, 1, PULL1)," &
" 130 (BC_1, IO41, input, X)," &
" 131 (BC_1, *, controlr, 1)," &
" 132 (BC_1, IO42, output3, X, 131, 1, PULL1)," &
" 133 (BC_1, IO42, input, X)," &
" 134 (BC_1, *, internal, 1)," & -- IO43.T
" 135 (BC_1, *, internal, X)," & -- IO43.O
" 136 (BC_1, *, internal, X)," & -- IO43.I
" 137 (BC_1, *, internal, 1)," & -- IO44.T
" 138 (BC_1, *, internal, X)," & -- IO44.O
" 139 (BC_1, *, internal, X)," & -- IO44.I
" 140 (BC_1, *, controlr, 1)," &
" 141 (BC_1, IO47, output3, X, 140, 1, PULL1)," &
" 142 (BC_1, IO47, input, X)," &
" 143 (BC_1, *, controlr, 1)," &
" 144 (BC_1, IO48, output3, X, 143, 1, PULL1)," &
" 145 (BC_1, IO48, input, X)," &
" 146 (BC_1, *, internal, 1)," & -- IO49.T
" 147 (BC_1, *, internal, X)," & -- IO49.O
" 148 (BC_1, *, internal, X)," & -- IO49.I
" 149 (BC_1, *, internal, 1)," & -- IO50.T
" 150 (BC_1, *, internal, X)," & -- IO50.O
" 151 (BC_1, *, internal, X)," & -- IO50.I
" 152 (BC_1, *, controlr, 1)," &
" 153 (BC_1, IO52, output3, X, 152, 1, PULL1)," &
" 154 (BC_1, IO52, input, X)," &
" 155 (BC_1, *, internal, 1)," & -- IO53.T
" 156 (BC_1, *, internal, X)," & -- IO53.O
" 157 (BC_1, *, internal, X)," & -- IO53.I
" 158 (BC_1, *, internal, 1)," & -- IO54.T
" 159 (BC_1, *, internal, X)," & -- IO54.O
" 160 (BC_1, *, internal, X)," & -- IO54.I
" 161 (BC_1, *, internal, 1)," & -- IO55.T
" 162 (BC_1, *, internal, X)," & -- IO55.O
" 163 (BC_1, *, internal, X)," & -- IO55.I
" 164 (BC_1, *, controlr, 1)," &
" 165 (BC_1, IO56, output3, X, 164, 1, PULL1)," &
" 166 (BC_1, IO56, input, X)," &
" 167 (BC_1, *, controlr, 1)," &
" 168 (BC_1, IO57, output3, X, 167, 1, PULL1)," &
" 169 (BC_1, IO57, input, X)," &
" 170 (BC_1, *, controlr, 1)," &
" 171 (BC_1, M1, output3, X, 170, 1, PULL1)," &
" 172 (BC_1, M1, input, X)," &
" 173 (BC_1, M0, input, X)," &
" 174 (BC_1, *, controlr, 1)," &
" 175 (BC_1, IO64, output3, X, 174, 1, PULL1)," &
" 176 (BC_1, IO64, input, X)," &
" 177 (BC_1, *, controlr, 1)," &
" 178 (BC_1, IO65, output3, X, 177, 1, PULL1)," &
" 179 (BC_1, IO65, input, X)," &
" 180 (BC_1, *, internal, 1)," & -- IO66.T
" 181 (BC_1, *, internal, X)," & -- IO66.O
" 182 (BC_1, *, internal, X)," & -- IO66.I
" 183 (BC_1, *, internal, 1)," & -- IO67.T
" 184 (BC_1, *, internal, X)," & -- IO67.O
" 185 (BC_1, *, internal, X)," & -- IO67.I
" 186 (BC_1, *, internal, 1)," & -- IO68.T
" 187 (BC_1, *, internal, X)," & -- IO68.O
" 188 (BC_1, *, internal, X)," & -- IO68.I
" 189 (BC_1, *, controlr, 1)," &
" 190 (BC_1, IO69, output3, X, 189, 1, PULL1)," &
" 191 (BC_1, IO69, input, X)," &
" 192 (BC_1, *, internal, 1)," & -- IO71.T
" 193 (BC_1, *, internal, X)," & -- IO71.O
" 194 (BC_1, *, internal, X)," & -- IO71.I
" 195 (BC_1, *, internal, 1)," & -- IO72.T
" 196 (BC_1, *, internal, X)," & -- IO72.O
" 197 (BC_1, *, internal, X)," & -- IO72.I
" 198 (BC_1, *, controlr, 1)," &
" 199 (BC_1, IO73, output3, X, 198, 1, PULL1)," &
" 200 (BC_1, IO73, input, X)," &
" 201 (BC_1, *, controlr, 1)," &
" 202 (BC_1, IO74, output3, X, 201, 1, PULL1)," &
" 203 (BC_1, IO74, input, X)," &
" 204 (BC_1, *, internal, 1)," & -- IO77.T
" 205 (BC_1, *, internal, X)," & -- IO77.O
" 206 (BC_1, *, internal, X)," & -- IO77.I
" 207 (BC_1, *, internal, 1)," & -- IO78.T
" 208 (BC_1, *, internal, X)," & -- IO78.O
" 209 (BC_1, *, internal, X)," & -- IO78.I
" 210 (BC_1, *, controlr, 1)," &
" 211 (BC_1, IO79, output3, X, 210, 1, PULL1)," &
" 212 (BC_1, IO79, input, X)," &
-- INIT is not a compliance enable after configuration. For post-configuration
-- operation un-comment the next line and comment out the following line.
-- Repeat for registers 213 through 215.
-- " 213 (BC_1, *, controlr, 1)," &
" 213 (BC_1, *, internal, 1)," &
-- " 214 (BC_1, INIT, output3, X, 213, 1, PULL1)," &
" 214 (BC_1, *, internal, 0)," &
-- " 215 (BC_1, INIT, input, X)," &
" 215 (BC_1, *, internal, X)," &
" 216 (BC_1, *, controlr, 1)," &
" 217 (BC_1, IO83, output3, X, 216, 1, PULL1)," &
" 218 (BC_1, IO83, input, X)," &
" 219 (BC_1, *, controlr, 1)," &
" 220 (BC_1, IO84, output3, X, 219, 1, PULL1)," &
" 221 (BC_1, IO84, input, X)," &
" 222 (BC_1, *, internal, 1)," & -- IO85.T
" 223 (BC_1, *, internal, X)," & -- IO85.O
" 224 (BC_1, *, internal, X)," & -- IO85.I
" 225 (BC_1, *, internal, 1)," & -- IO86.T
" 226 (BC_1, *, internal, X)," & -- IO86.O
" 227 (BC_1, *, internal, X)," & -- IO86.I
" 228 (BC_1, *, controlr, 1)," &
" 229 (BC_1, IO89, output3, X, 228, 1, PULL1)," &
" 230 (BC_1, IO89, input, X)," &
" 231 (BC_1, *, controlr, 1)," &
" 232 (BC_1, IO90, output3, X, 231, 1, PULL1)," &
" 233 (BC_1, IO90, input, X)," &
" 234 (BC_1, *, internal, 1)," & -- IO91.T
" 235 (BC_1, *, internal, X)," & -- IO91.O
" 236 (BC_1, *, internal, X)," & -- IO91.I
" 237 (BC_1, *, internal, 1)," & -- IO92.T
" 238 (BC_1, *, internal, X)," & -- IO92.O
" 239 (BC_1, *, internal, X)," & -- IO92.I
" 240 (BC_1, *, controlr, 1)," &
" 241 (BC_1, IO94, output3, X, 240, 1, PULL1)," &
" 242 (BC_1, IO94, input, X)," &
" 243 (BC_1, *, controlr, 1)," &
" 244 (BC_1, IO95, output3, X, 243, 1, PULL1)," &
" 245 (BC_1, IO95, input, X)," &
" 246 (BC_1, *, internal, 1)," & -- IO96.T
" 247 (BC_1, *, internal, X)," & -- IO96.O
" 248 (BC_1, *, internal, X)," & -- IO96.I
" 249 (BC_1, *, internal, 1)," & -- IO97.T
" 250 (BC_1, *, internal, X)," & -- IO97.O
" 251 (BC_1, *, internal, X)," & -- IO97.I
" 252 (BC_1, *, controlr, 1)," &
" 253 (BC_1, IO98, output3, X, 252, 1, PULL1)," &
" 254 (BC_1, IO98, input, X)," &
" 255 (BC_1, *, controlr, 1)," &
" 256 (BC_1, IO99, output3, X, 255, 1, PULL1)," &
" 257 (BC_1, IO99, input, X)," &
" 258 (BC_1, *, controlr, 1)," &
" 259 (BC_1, IO105, output3, X, 258, 1, PULL1)," &
" 260 (BC_1, IO105, input, X)," &
" 261 (BC_1, *, controlr, 1)," &
" 262 (BC_1, IO106, output3, X, 261, 1, PULL1)," &
" 263 (BC_1, IO106, input, X)," &
" 264 (BC_1, *, internal, 1)," & -- IO107.T
" 265 (BC_1, *, internal, X)," & -- IO107.O
" 266 (BC_1, *, internal, X)," & -- IO107.I
" 267 (BC_1, *, internal, 1)," & -- IO108.T
" 268 (BC_1, *, internal, X)," & -- IO108.O
" 269 (BC_1, *, internal, X)," & -- IO108.I
" 270 (BC_1, *, controlr, 1)," &
" 271 (BC_1, IO109, output3, X, 270, 1, PULL1)," &
" 272 (BC_1, IO109, input, X)," &
" 273 (BC_1, *, internal, 1)," & -- IO110.T
" 274 (BC_1, *, internal, X)," & -- IO110.O
" 275 (BC_1, *, internal, X)," & -- IO110.I
" 276 (BC_1, *, internal, 1)," & -- IO112.T
" 277 (BC_1, *, internal, X)," & -- IO112.O
" 278 (BC_1, *, internal, X)," & -- IO112.I
" 279 (BC_1, *, internal, 1)," & -- IO113.T
" 280 (BC_1, *, internal, X)," & -- IO113.O
" 281 (BC_1, *, internal, X)," & -- IO113.I
" 282 (BC_1, *, controlr, 1)," &
" 283 (BC_1, IO116, output3, X, 282, 1, PULL1)," &
" 284 (BC_1, IO116, input, X)," &
" 285 (BC_1, *, controlr, 1)," &
" 286 (BC_1, IO117, output3, X, 285, 1, PULL1)," &
" 287 (BC_1, IO117, input, X)," &
" 288 (BC_1, *, internal, 1)," & -- IO118.T
" 289 (BC_1, *, internal, X)," & -- IO118.O
" 290 (BC_1, *, internal, X)," & -- IO118.I
" 291 (BC_1, *, internal, 1)," & -- IO119.T
" 292 (BC_1, *, internal, X)," & -- IO119.O
" 293 (BC_1, *, internal, X)," & -- IO119.I
" 294 (BC_1, *, controlr, 1)," &
" 295 (BC_1, IO120, output3, X, 294, 1, PULL1)," &
" 296 (BC_1, IO120, input, X)," &
" 297 (BC_1, *, controlr, 1)," &
" 298 (BC_1, IO121, output3, X, 297, 1, PULL1)," &
" 299 (BC_1, IO121, input, X)," &
" 300 (BC_1, *, controlr, 1)," &
" 301 (BC_1, IO124, output3, X, 300, 1, PULL1)," &
" 302 (BC_1, IO124, input, X)," &
" 303 (BC_1, *, controlr, 1)," &
" 304 (BC_1, IO125, output3, X, 303, 1, PULL1)," &
" 305 (BC_1, IO125, input, X)," &
" 306 (BC_1, *, internal, 1)," & -- IO126.T
" 307 (BC_1, *, internal, X)," & -- IO126.O
" 308 (BC_1, *, internal, X)," & -- IO126.I
" 309 (BC_1, *, internal, 1)," & -- IO127.T
" 310 (BC_1, *, internal, X)," & -- IO127.O
" 311 (BC_1, *, internal, X)," & -- IO127.I
" 312 (BC_1, *, controlr, 1)," &
" 313 (BC_1, IO128, output3, X, 312, 1, PULL1)," &
" 314 (BC_1, IO128, input, X)," &
" 315 (BC_1, *, controlr, 1)," &
" 316 (BC_1, IO129, output3, X, 315, 1, PULL1)," &
" 317 (BC_1, IO129, input, X)," &
" 318 (BC_1, *, internal, 1)," & -- IO132.T
" 319 (BC_1, *, internal, X)," & -- IO132.O
" 320 (BC_1, *, internal, X)," & -- IO132.I
" 321 (BC_1, *, internal, 1)," & -- IO133.T
" 322 (BC_1, *, internal, X)," & -- IO133.O
" 323 (BC_1, *, internal, X)," & -- IO133.I
" 324 (BC_1, *, controlr, 1)," &
" 325 (BC_1, IO135, output3, X, 324, 1, PULL1)," &
" 326 (BC_1, IO135, input, X)," &
" 327 (BC_1, *, controlr, 1)," &
" 328 (BC_1, IO136, output3, X, 327, 1, PULL1)," &
" 329 (BC_1, IO136, input, X)," &
" 330 (BC_1, *, internal, 1)," & -- IO137.T
" 331 (BC_1, *, internal, X)," & -- IO137.O
" 332 (BC_1, *, internal, X)," & -- IO137.I
" 333 (BC_1, *, internal, 1)," & -- IO138.T
" 334 (BC_1, *, internal, X)," & -- IO138.O
" 335 (BC_1, *, internal, X)," & -- IO138.I
" 336 (BC_1, *, controlr, 1)," &
" 337 (BC_1, IO139, output3, X, 336, 1, PULL1)," &
" 338 (BC_1, IO139, input, X)," &
" 339 (BC_1, *, controlr, 1)," &
" 340 (BC_1, IO140, output3, X, 339, 1, PULL1)," &
" 341 (BC_1, IO140, input, X)," &
" 342 (BC_1, *, internal, X)";
--end boundary register
attribute DESIGN_WARNING of XCS10XL_PC84 : entity is
"LPWRB, CLK and DONE are not represented in BOUNDARY_REGISTER." &
"This BSDL file must be modified by the FPGA designer in order to" &
"reflect post-configuration behavior (if any)." &
"If INIT has been high or floating since power-on or the last" &
"rising edge of PROGRAM, then the device may be in" &
"configuration mode in which case this file is not valid." &
"The output and tristate capture values are not valid until after" &
"the device is configured." &
"The fast output mux (where used) is not captured properly." &
"The tristate control is not captured properly when GTS is activated." &
"Some pins have both controlled and uncontrolled input paths.";
end XCS10XL_PC84;