----------------------------------------------------------------------------------
--
-- File Name : DS33Z44_BSDL.txt
-- Created by Synopsys Version 2000.11 (Nov 27, 2000)
--
-- Company : Dallas Semiconductor/Maxim
-- Documentation : DS33Z44 datasheet
-- BSDL Revision : 1.0
-- Date : 9/21/2006
--
-- Device : DS33Z44
-- Package : 256-pin CSBGA
--
-- IMPORTANT NOTICE
-- Dallas Semiconductor customers are advised to obtain the latest version of
-- device specifications before relying on any published information contained
-- herein. Dallas Semiconductor assumes no responsibility or liability arising
-- out of the application of any information described herein.
--
-- IMPORTANT NOTICE ABOUT THE REVISION
--
-- Dallas Semiconductor customers are advised to check the revision of the
-- device they will be using. All the codes for the device revisions are
-- herein this BSDL file.
--
-- The characters "/", "(", ")" and "*" have been removed from signal names for
-- compatibility with BSDL file format.
--
-- --------------------------------------------------------------------------------
entity ds33z44 is
-- This section identifies the default device package selected.
generic (PHYSICAL_PIN_MAP: string:= "PBGA_256");
-- This section declares all the ports in the design.
port (
cs : in bit;
dcedtes : in bit;
jtclk : in bit;
jtdi : in bit;
jtms : in bit;
jtrst : in bit;
rclki1 : in bit;
rd_n : in bit;
ref_clk : in bit;
rmiimiis : in bit;
rser1 : in bit;
rst_n : in bit;
sysclki : in bit;
tclki1 : in bit;
wr_n : in bit;
a : in bit_vector (0 to 9);
modec : in bit_vector (0 to 1);
ckpha : inout bit;
coldet1 : inout bit;
coldet2 : inout bit;
coldet3 : inout bit;
coldet4 : inout bit;
rx_crs1 : inout bit;
rx_crs2 : inout bit;
rx_crs3 : inout bit;
rx_crs4 : inout bit;
hwmode : inout bit;
mdio : inout bit;
rclki2 : inout bit;
rclki3 : inout bit;
rclki4 : inout bit;
rden1 : inout bit;
rden2 : inout bit;
rden3 : inout bit;
rden4 : inout bit;
rser2 : inout bit;
rser3 : inout bit;
rser4 : inout bit;
rx_dv1 : inout bit;
rx_dv2 : inout bit;
rx_dv3 : inout bit;
rx_dv4 : inout bit;
rx_err1 : inout bit;
rx_err2 : inout bit;
rx_err3 : inout bit;
rx_err4 : inout bit;
tclki2 : inout bit;
tclki3 : inout bit;
tclki4 : inout bit;
tden1 : inout bit;
tden2 : inout bit;
tden3 : inout bit;
tden4 : inout bit;
afcs : inout bit_vector (1 to 4);
d : inout bit_vector (0 to 7);
fullds : inout bit_vector (1 to 4);
h10s : inout bit_vector (1 to 4);
rx_clk1 : inout bit;
rx_clk2 : inout bit;
rx_clk3 : inout bit;
rx_clk4 : inout bit;
rxd1 : inout bit_vector (0 to 3);
rxd2 : inout bit_vector (0 to 3);
rxd3 : inout bit_vector (0 to 3);
rxd4 : inout bit_vector (0 to 3);
sdata : inout bit_vector (0 to 31);
tx_clk1 : inout bit;
tx_clk2 : inout bit;
tx_clk3 : inout bit;
tx_clk4 : inout bit;
jtdo : out bit;
int_n : buffer bit;
mdc : buffer bit;
ref_clko : buffer bit;
scas : buffer bit;
sdclko : buffer bit;
sdcs : buffer bit;
spi_cs : buffer bit;
sras : buffer bit;
swe : buffer bit;
tser1 : buffer bit;
tser2 : buffer bit;
tser3 : buffer bit;
tser4 : buffer bit;
tx_en1 : buffer bit;
tx_en2 : buffer bit;
tx_en3 : buffer bit;
tx_en4 : buffer bit;
qovf : buffer bit_vector (1 to 4);
sba : buffer bit_vector (0 to 1);
sda : buffer bit_vector (0 to 11);
sdmask : buffer bit_vector (0 to 3);
txd1 : buffer bit_vector (0 to 3);
txd2 : buffer bit_vector (0 to 3);
txd3 : buffer bit_vector (0 to 3);
txd4 : buffer bit_vector (0 to 3);
vdd3_3 : linkage bit_vector (1 to 16);
vdd1_8 : linkage bit_vector (1 to 13);
vss : linkage bit_vector (1 to 27)
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of ds33z44: entity is "STD_1149_1_1993";
attribute PIN_MAP of ds33z44: entity is PHYSICAL_PIN_MAP;
-- This section specifies the pin map for each port. This information
-- is extracted from the port-to-pin map file that was read in using
-- the "read_pin_map" command.
constant PBGA_256: PIN_MAP_STRING :=
"tclki1 : F1," &
"tclki2 : J1," &
"tclki3 : M1," &
"tclki4 : R1," &
"tser1 : F2," &
"tser2 : J2," &
"tser3 : M2," &
"tser4 : R2," &
"tden1 : F5," &
"tden2 : K2," &
"tden3 : P3," &
"tden4 : R3," &
"rclki1 : G2," &
"rclki2 : L2," &
"rclki3 : N2," &
"rclki4 : T3," &
"rser1 : H1," &
"rser2 : K1," &
"rser3 : P1," &
"rser4 : T2," &
"rden1 : H2," &
"rden2 : L1," &
"rden3 : N1," &
"rden4 : T1," &
"ref_clk : C15," &
"ref_clko : B15," &
"tx_clk1 : A9," &
"tx_clk2 : M16," &
"tx_clk3 : G16," &
"tx_clk4 : A16," &
"tx_en1 : E10," &
"tx_en2 : L14," &
"tx_en3 : E15," &
"tx_en4 : G13," &
"txd1 : (B9, C9, D9, E9)," &
"txd2 : (R15, R16, L15, N14)," &
"txd3 : (F15, G14, H13, H14)," &
"txd4 : (B16, C16, D16, E16)," &
"rx_clk1 : A11," &
"rx_clk2 : L16," &
"rx_clk3 : H16," &
"rx_clk4 : A13," &
"rxd1 : (B11, C11, D11, E11)," &
"rxd2 : (K13, K14, H15, K16)," &
"rxd3 : (G15, J14, J13, J12)," &
"rxd4 : (B13, C13, B14, C14)," &
"rx_dv1 : D10," &
"rx_dv2 : K15," &
"rx_dv3 : K11," &
"rx_dv4 : D15," &
"rx_crs1 : D12," &
"rx_crs2 : N16," &
"rx_crs3 : M15," &
"rx_crs4 : F14," &
"rx_err1 : E12," &
"rx_err2 : T16," &
"rx_err3 : G11," &
"rx_err4 : D14," &
"coldet1 : D13," &
"coldet2 : P16," &
"coldet3 : H11," &
"coldet4 : F16," &
"mdc : F11," &
"mdio : F10," &
"a : (A1, B1, A2, B2, C2, A3, B3, C3, A4, B4)," &
"d : (A5, A6, A7, B5, B6, B7, C5, C6)," &
"spi_cs : E13," &
"ckpha : F6," &
"cs : D1," &
"rd_n : E1," &
"wr_n : E2," &
"int_n : D3," &
"rst_n : D8," &
"hwmode : D5," &
"modec : (D6, D7)," &
"dcedtes : A15," &
"rmiimiis : C4," &
"fullds : (A10, J15, H12, A12)," &
"h10s : (B10, L11, F12, B12)," &
"afcs : (C10, J16, J11, C12)," &
"sdata : (R4, P5, T4, R5, T5, T6, R6, P7, N6, P6, M6, M3, M5, N4" &
", N5, P4, R12, N12, P12, T13, T12, T14, R13, R14, P14, P13, N15, " &
"N13, M13, L12, M12, M11)," &
"sda : (R10, T10, R11, P11, M9, N9, N10, M8, N8, P9, P10, T9)," &
"sba : (R8, R9)," &
"sras : P15," &
"scas : N7," &
"swe : R7," &
"sdmask : (T8, M7, T11, N11)," &
"sdclko : T7," &
"sysclki : T15," &
"sdcs : P8," &
"qovf : (C7, C8, B8, A8)," &
"jtrst : E6," &
"jtclk : D4," &
"jtdo : E5," &
"jtdi : E4," &
"jtms : F7," &
"vdd3_3 : (G3, G4, G5, G6, G7, G8, G9, G10, H3, H4, H5, H6, H7, " &
"H8, H9, H10)," &
"vdd1_8 : (C1, D2, E3, E14, F4, F13, G12, K12, L13, M4, M14, N3, " &
"P2)," &
"vss : (E7, E8, J3, J4, J5, J6, J7, J8, J9, J10, K3, K4, K5, K6, K7, " &
"K8, K9, K10, L3, L4, L5, L6, L7, L8, L9, L10, M10)";
-- This section specifies the TAP ports.
-- For the TAP TCK port, the parameters in the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be stopped in.
attribute TAP_SCAN_CLOCK of jtclk: signal is (10.0e6, BOTH);
attribute TAP_SCAN_IN of jtdi : signal is true;
attribute TAP_SCAN_MODE of jtms : signal is true;
attribute TAP_SCAN_OUT of jtdo : signal is true;
attribute TAP_SCAN_RESET of jtrst: signal is true;
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of ds33z44: entity is 3;
-- Specifies the boundary-scan instructions implemented in the
-- design and their opcodes.
attribute INSTRUCTION_OPCODE of ds33z44: entity is
"BYPASS (111)," &
"EXTEST (000)," &
"SAMPLE (010)," &
"CLAMP (011)," &
"HIGHZ (100)," &
"IDCODE (001)";
-- Specifies the bit pattern that is loaded into the instruction
-- register when the TAP controller passes through the Capture-IR
-- state. The standard mandates that the two LSBs must be "01".
-- The remaining bits are design specific.
attribute INSTRUCTION_CAPTURE of ds33z44: entity is "001";
-- Specifies the bit pattern that is loaded into the DEVICE_ID
-- register during the IDCODE instruction when the TAP controller
-- passes through the Capture-DR state.
attribute IDCODE_REGISTER of ds33z44: entity is
"0000" & -- 4-bit version number
"0000000001100011" & -- 16-bit part number
"00010100001" & -- 11-bit identity of the manufacturer
"1"; -- Required by IEEE Std 1149.1
-- This section specifies the test data register placed between TDI
-- and TDO for each implemented instruction.
attribute REGISTER_ACCESS of ds33z44: entity is
"BYPASS (BYPASS, CLAMP, HIGHZ)," &
"BOUNDARY (EXTEST, SAMPLE)," &
"DEVICE_ID (IDCODE)";
-- Specifies the length of the boundary scan register.
attribute BOUNDARY_LENGTH of ds33z44: entity is 306;
-- The following list specifies the characteristics of each cell
-- in the boundary scan register from TDI to TDO.
-- The following is a description of the label fields:
-- num : Is the cell number.
-- cell : Is the cell type as defined by the standard.
-- port : Is the design port name. Control cells do not
-- have a port name.
-- function: Is the function of the cell as defined by the
-- standard. Is one of input, output2, output3,
-- bidir, control or controlr.
-- safe : Specifies the value that the BSR cell should be
-- loaded with for safe operation when the software
-- might otherwise choose a random value.
-- ccell : The control cell number. Specifies the control
-- cell that drives the output enable for this port.
-- disval : Specifies the value that is loaded into the
-- control cell to disable the output enable for
-- the corresponding port.
-- rslt : Resulting state. Shows the state of the driver
-- when it is disabled.
attribute BOUNDARY_REGISTER of ds33z44: entity is
--
-- num cell port function safe [ccell disval rslt]
--
"305 (BC_1, dcedtes, input, X), " &
"304 (BC_1, rmiimiis, input, X), " &
"303 (BC_2, qovf(2), output2, X), " &
"302 (BC_2, qovf(3), output2, X), " &
"301 (BC_2, qovf(4), output2, X), " &
"300 (BC_1, tclki1, input, X), " &
"299 (BC_2, tser1, output2, X), " &
"298 (BC_1, *, controlr, 0), " &
"297 (BC_0, tden1, bidir, X, 298, 0, Z), " &
"296 (BC_0, *, internal, X), " &
"295 (BC_0, *, internal, X), " &
"294 (BC_1, rclki1, input, X), " &
"293 (BC_1, rser1, input, X), " &
"292 (BC_1, *, controlr, 0), " &
"291 (BC_0, rden1, bidir, X, 292, 0, Z), " &
"290 (BC_0, *, internal, X), " &
"289 (BC_0, *, internal, X), " &
"288 (BC_1, *, controlr, 0), " &
"287 (BC_0, tclki2, bidir, X, 288, 0, Z), " &
"286 (BC_2, tser2, output2, X), " &
"285 (BC_1, *, controlr, 0), " &
"284 (BC_0, tden2, bidir, X, 285, 0, Z), " &
"283 (BC_1, *, controlr, 0), " &
"282 (BC_0, rclki2, bidir, X, 283, 0, Z), " &
"281 (BC_1, *, controlr, 0), " &
"280 (BC_0, rser2, bidir, X, 281, 0, Z), " &
"279 (BC_1, *, controlr, 0), " &
"278 (BC_0, rden2, bidir, X, 279, 0, Z), " &
"277 (BC_1, *, controlr, 0), " &
"276 (BC_0, tclki3, bidir, X, 277, 0, Z), " &
"275 (BC_2, tser3, output2, X), " &
"274 (BC_1, *, controlr, 0), " &
"273 (BC_0, tden3, bidir, X, 274, 0, Z), " &
"272 (BC_1, *, controlr, 0), " &
"271 (BC_0, rclki3, bidir, X, 272, 0, Z), " &
"270 (BC_1, *, controlr, 0), " &
"269 (BC_0, rser3, bidir, X, 270, 0, Z), " &
"268 (BC_1, *, controlr, 0), " &
"267 (BC_0, rden3, bidir, X, 268, 0, Z), " &
"266 (BC_1, *, controlr, 0), " &
"265 (BC_0, tclki4, bidir, X, 266, 0, Z), " &
"264 (BC_2, tser4, output2, X), " &
"263 (BC_1, *, controlr, 0), " &
"262 (BC_0, tden4, bidir, X, 263, 0, Z), " &
"261 (BC_1, *, controlr, 0), " &
"260 (BC_0, rclki4, bidir, X, 261, 0, Z), " &
"259 (BC_1, *, controlr, 0), " &
"258 (BC_0, rser4, bidir, X, 259, 0, Z), " &
"257 (BC_1, *, controlr, 0), " &
"256 (BC_0, rden4, bidir, X, 257, 0, Z), " &
"255 (BC_1, *, controlr, 0), " &
"254 (BC_0, sdata(0), bidir, X, 255, 0, Z), " &
"253 (BC_1, *, controlr, 0), " &
"252 (BC_0, sdata(1), bidir, X, 253, 0, Z), " &
"251 (BC_1, *, controlr, 0), " &
"250 (BC_0, sdata(2), bidir, X, 251, 0, Z), " &
"249 (BC_1, *, controlr, 0), " &
"248 (BC_0, sdata(3), bidir, X, 249, 0, Z), " &
"247 (BC_1, *, controlr, 0), " &
"246 (BC_0, sdata(4), bidir, X, 247, 0, Z), " &
"245 (BC_1, *, controlr, 0), " &
"244 (BC_0, sdata(5), bidir, X, 245, 0, Z), " &
"243 (BC_1, *, controlr, 0), " &
"242 (BC_0, sdata(6), bidir, X, 243, 0, Z), " &
"241 (BC_1, *, controlr, 0), " &
"240 (BC_0, sdata(7), bidir, X, 241, 0, Z), " &
"239 (BC_1, *, controlr, 0), " &
"238 (BC_0, sdata(8), bidir, X, 239, 0, Z), " &
"237 (BC_1, *, controlr, 0), " &
"236 (BC_0, sdata(9), bidir, X, 237, 0, Z), " &
"235 (BC_1, *, controlr, 0), " &
"234 (BC_0, sdata(10), bidir, X, 235, 0, Z), " &
"233 (BC_1, *, controlr, 0), " &
"232 (BC_0, sdata(11), bidir, X, 233, 0, Z), " &
"231 (BC_1, *, controlr, 0), " &
"230 (BC_0, sdata(12), bidir, X, 231, 0, Z), " &
"229 (BC_1, *, controlr, 0), " &
"228 (BC_0, sdata(13), bidir, X, 229, 0, Z), " &
"227 (BC_1, *, controlr, 0), " &
"226 (BC_0, sdata(14), bidir, X, 227, 0, Z), " &
"225 (BC_1, *, controlr, 0), " &
"224 (BC_0, sdata(15), bidir, X, 225, 0, Z), " &
"223 (BC_1, *, controlr, 0), " &
"222 (BC_0, sdata(16), bidir, X, 223, 0, Z), " &
"221 (BC_2, sdcs, output2, X), " &
"220 (BC_2, sdmask(0), output2, X), " &
"219 (BC_2, sdmask(1), output2, X), " &
"218 (BC_2, sdmask(2), output2, X), " &
"217 (BC_2, sdmask(3), output2, X), " &
"216 (BC_2, sdclko, output2, X), " &
"215 (BC_1, sysclki, input, X), " &
"214 (BC_2, scas, output2, X), " &
"213 (BC_2, swe, output2, X), " &
"212 (BC_2, sras, output2, X), " &
"211 (BC_2, sba(0), output2, X), " &
"210 (BC_2, sba(1), output2, X), " &
"209 (BC_2, sda(11), output2, X), " &
"208 (BC_2, sda(10), output2, X), " &
"207 (BC_2, sda(9), output2, X), " &
"206 (BC_2, sda(8), output2, X), " &
"205 (BC_2, sda(7), output2, X), " &
"204 (BC_2, sda(6), output2, X), " &
"203 (BC_2, sda(5), output2, X), " &
"202 (BC_2, sda(4), output2, X), " &
"201 (BC_2, sda(3), output2, X), " &
"200 (BC_2, sda(2), output2, X), " &
"199 (BC_2, sda(1), output2, X), " &
"198 (BC_2, sda(0), output2, X), " &
"197 (BC_1, *, controlr, 0), " &
"196 (BC_0, sdata(17), bidir, X, 197, 0, Z), " &
"195 (BC_1, *, controlr, 0), " &
"194 (BC_0, sdata(18), bidir, X, 195, 0, Z), " &
"193 (BC_1, *, controlr, 0), " &
"192 (BC_0, sdata(19), bidir, X, 193, 0, Z), " &
"191 (BC_1, *, controlr, 0), " &
"190 (BC_0, sdata(20), bidir, X, 191, 0, Z), " &
"189 (BC_1, *, controlr, 0), " &
"188 (BC_0, sdata(21), bidir, X, 189, 0, Z), " &
"187 (BC_1, *, controlr, 0), " &
"186 (BC_0, sdata(22), bidir, X, 187, 0, Z), " &
"185 (BC_1, *, controlr, 0), " &
"184 (BC_0, sdata(23), bidir, X, 185, 0, Z), " &
"183 (BC_1, *, controlr, 0), " &
"182 (BC_0, sdata(24), bidir, X, 183, 0, Z), " &
"181 (BC_1, *, controlr, 0), " &
"180 (BC_0, sdata(25), bidir, X, 181, 0, Z), " &
"179 (BC_1, *, controlr, 0), " &
"178 (BC_0, sdata(26), bidir, X, 179, 0, Z), " &
"177 (BC_1, *, controlr, 0), " &
"176 (BC_0, sdata(27), bidir, X, 177, 0, Z), " &
"175 (BC_1, *, controlr, 0), " &
"174 (BC_0, sdata(28), bidir, X, 175, 0, Z), " &
"173 (BC_1, *, controlr, 0), " &
"172 (BC_0, sdata(29), bidir, X, 173, 0, Z), " &
"171 (BC_1, *, controlr, 0), " &
"170 (BC_0, sdata(30), bidir, X, 171, 0, Z), " &
"169 (BC_1, *, controlr, 0), " &
"168 (BC_0, sdata(31), bidir, X, 169, 0, Z), " &
"167 (BC_2, txd2(3), output2, X), " &
"166 (BC_2, txd2(2), output2, X), " &
"165 (BC_2, txd2(1), output2, X), " &
"164 (BC_2, txd2(0), output2, X), " &
"163 (BC_2, tx_en2, output2, X), " &
"162 (BC_1, *, controlr, 0), " &
"161 (BC_0, tx_clk2, bidir, X, 162, 0, Z), " &
"160 (BC_1, *, controlr, 0), " &
"159 (BC_0, rx_err2, bidir, X, 160, 0, Z), " &
"158 (BC_1, *, controlr, 0), " &
"157 (BC_0, rx_clk2, bidir, X, 158, 0, Z), " &
"156 (BC_1, *, controlr, 0), " &
"155 (BC_0, rx_dv2, bidir, X, 156, 0, Z), " &
"154 (BC_1, *, controlr, 0), " &
"153 (BC_0, rxd2(0), bidir, X, 154, 0, Z), " &
"152 (BC_1, *, controlr, 0), " &
"151 (BC_0, rxd2(1), bidir, X, 152, 0, Z), " &
"150 (BC_1, *, controlr, 0), " &
"149 (BC_0, rxd2(2), bidir, X, 150, 0, Z), " &
"148 (BC_1, *, controlr, 0), " &
"147 (BC_0, rxd2(3), bidir, X, 148, 0, Z), " &
"146 (BC_1, *, controlr, 0), " &
"145 (BC_0, fullds(2), bidir, X, 146, 0, Z), " &
"144 (BC_1, *, controlr, 0), " &
"143 (BC_0, h10s(2), bidir, X, 144, 0, Z), " &
"142 (BC_1, *, controlr, 0), " &
"141 (BC_0, afcs(2), bidir, X, 142, 0, Z), " &
"140 (BC_1, *, controlr, 0), " &
"139 (BC_0, rx_crs2, bidir, X, 140, 0, Z), " &
"138 (BC_1, *, controlr, 0), " &
"137 (BC_0, coldet2, bidir, X, 138, 0, Z), " &
"136 (BC_2, txd3(3), output2, X), " &
"135 (BC_2, txd3(2), output2, X), " &
"134 (BC_2, txd3(1), output2, X), " &
"133 (BC_2, txd3(0), output2, X), " &
"132 (BC_2, tx_en3, output2, X), " &
"131 (BC_1, *, controlr, 0), " &
"130 (BC_0, tx_clk3, bidir, X, 131, 0, Z), " &
"129 (BC_1, *, controlr, 0), " &
"128 (BC_0, rx_err3, bidir, X, 129, 0, Z), " &
"127 (BC_1, *, controlr, 0), " &
"126 (BC_0, rx_clk3, bidir, X, 127, 0, Z), " &
"125 (BC_1, *, controlr, 0), " &
"124 (BC_0, rx_dv3, bidir, X, 125, 0, Z), " &
"123 (BC_1, *, controlr, 0), " &
"122 (BC_0, rxd3(0), bidir, X, 123, 0, Z), " &
"121 (BC_1, *, controlr, 0), " &
"120 (BC_0, rxd3(1), bidir, X, 121, 0, Z), " &
"119 (BC_1, *, controlr, 0), " &
"118 (BC_0, rxd3(2), bidir, X, 119, 0, Z), " &
"117 (BC_1, *, controlr, 0), " &
"116 (BC_0, rxd3(3), bidir, X, 117, 0, Z), " &
"115 (BC_1, *, controlr, 0), " &
"114 (BC_0, fullds(3), bidir, X, 115, 0, Z), " &
"113 (BC_1, *, controlr, 0), " &
"112 (BC_0, h10s(3), bidir, X, 113, 0, Z), " &
"111 (BC_1, *, controlr, 0), " &
"110 (BC_0, afcs(3), bidir, X, 111, 0, Z), " &
"109 (BC_1, *, controlr, 0), " &
"108 (BC_0, rx_crs3, bidir, X, 109, 0, Z), " &
"107 (BC_1, *, controlr, 0), " &
"106 (BC_0, coldet3, bidir, X, 107, 0, Z), " &
"105 (BC_1, *, controlr, 0), " &
"104 (BC_0, rx_crs1, bidir, X, 105, 0, Z), " &
"103 (BC_1, *, controlr, 0), " &
"102 (BC_0, coldet1, bidir, X, 103, 0, Z), " &
"101 (BC_2, txd1(3), output2, X), " &
"100 (BC_2, txd1(2), output2, X), " &
"99 (BC_2, txd1(1), output2, X), " &
"98 (BC_2, txd1(0), output2, X), " &
"97 (BC_2, tx_en1, output2, X), " &
"96 (BC_1, *, controlr, 0), " &
"95 (BC_0, tx_clk1, bidir, X, 96, 0, Z), " &
"94 (BC_1, *, controlr, 0), " &
"93 (BC_0, rx_err1, bidir, X, 94, 0, Z), " &
"92 (BC_1, *, controlr, 0), " &
"91 (BC_0, rx_clk1, bidir, X, 92, 0, Z), " &
"90 (BC_1, *, controlr, 0), " &
"89 (BC_0, rx_dv1, bidir, X, 90, 0, Z), " &
"88 (BC_1, *, controlr, 0), " &
"87 (BC_0, rxd1(0), bidir, X, 88, 0, Z), " &
"86 (BC_1, *, controlr, 0), " &
"85 (BC_0, rxd1(1), bidir, X, 86, 0, Z), " &
"84 (BC_1, *, controlr, 0), " &
"83 (BC_0, rxd1(2), bidir, X, 84, 0, Z), " &
"82 (BC_1, *, controlr, 0), " &
"81 (BC_0, rxd1(3), bidir, X, 82, 0, Z), " &
"80 (BC_1, *, controlr, 0), " &
"79 (BC_0, fullds(1), bidir, X, 80, 0, Z), " &
"78 (BC_1, *, controlr, 0), " &
"77 (BC_0, h10s(1), bidir, X, 78, 0, Z), " &
"76 (BC_1, *, controlr, 0), " &
"75 (BC_0, afcs(1), bidir, X, 76, 0, Z), " &
"74 (BC_2, mdc, output2, X), " &
"73 (BC_1, *, controlr, 0), " &
"72 (BC_0, mdio, bidir, X, 73, 0, Z), " &
"71 (BC_1, ref_clk, input, X), " &
"70 (BC_2, ref_clko, output2, X), " &
"69 (BC_1, *, controlr, 0), " &
"68 (BC_0, fullds(4), bidir, X, 69, 0, Z), " &
"67 (BC_1, *, controlr, 0), " &
"66 (BC_0, h10s(4), bidir, X, 67, 0, Z), " &
"65 (BC_1, *, controlr, 0), " &
"64 (BC_0, afcs(4), bidir, X, 65, 0, Z), " &
"63 (BC_1, *, controlr, 0), " &
"62 (BC_0, rxd4(3), bidir, X, 63, 0, Z), " &
"61 (BC_1, *, controlr, 0), " &
"60 (BC_0, rxd4(2), bidir, X, 61, 0, Z), " &
"59 (BC_1, *, controlr, 0), " &
"58 (BC_0, rxd4(1), bidir, X, 59, 0, Z), " &
"57 (BC_1, *, controlr, 0), " &
"56 (BC_0, rxd4(0), bidir, X, 57, 0, Z), " &
"55 (BC_1, *, controlr, 0), " &
"54 (BC_0, rx_dv4, bidir, X, 55, 0, Z), " &
"53 (BC_1, *, controlr, 0), " &
"52 (BC_0, rx_clk4, bidir, X, 53, 0, Z), " &
"51 (BC_1, *, controlr, 0), " &
"50 (BC_0, rx_err4, bidir, X, 51, 0, Z), " &
"49 (BC_1, *, controlr, 0), " &
"48 (BC_0, tx_clk4, bidir, X, 49, 0, Z), " &
"47 (BC_2, tx_en4, output2, X), " &
"46 (BC_2, txd4(0), output2, X), " &
"45 (BC_2, txd4(1), output2, X), " &
"44 (BC_2, txd4(2), output2, X), " &
"43 (BC_2, txd4(3), output2, X), " &
"42 (BC_1, *, controlr, 0), " &
"41 (BC_0, coldet4, bidir, X, 42, 0, Z), " &
"40 (BC_1, *, controlr, 0), " &
"39 (BC_0, rx_crs4, bidir, X, 40, 0, Z), " &
"38 (BC_2, qovf(1), output2, X), " &
"37 (BC_1, a(0), input, X), " &
"36 (BC_1, a(1), input, X), " &
"35 (BC_1, a(2), input, X), " &
"34 (BC_1, a(3), input, X), " &
"33 (BC_1, a(4), input, X), " &
"32 (BC_1, a(5), input, X), " &
"31 (BC_1, a(6), input, X), " &
"30 (BC_1, a(7), input, X), " &
"29 (BC_1, a(8), input, X), " &
"28 (BC_1, a(9), input, X), " &
"27 (BC_1, *, controlr, 0), " &
"26 (BC_0, d(0), bidir, X, 27, 0, Z), " &
"25 (BC_1, *, controlr, 0), " &
"24 (BC_0, d(1), bidir, X, 25, 0, Z), " &
"23 (BC_1, *, controlr, 0), " &
"22 (BC_0, d(2), bidir, X, 23, 0, Z), " &
"21 (BC_1, *, controlr, 0), " &
"20 (BC_0, d(3), bidir, X, 21, 0, Z), " &
"19 (BC_1, *, controlr, 0), " &
"18 (BC_0, d(4), bidir, X, 19, 0, Z), " &
"17 (BC_1, *, controlr, 0), " &
"16 (BC_0, d(5), bidir, X, 17, 0, Z), " &
"15 (BC_1, *, controlr, 0), " &
"14 (BC_0, d(6), bidir, X, 15, 0, Z), " &
"13 (BC_1, *, controlr, 0), " &
"12 (BC_0, d(7), bidir, X, 13, 0, Z), " &
"11 (BC_1, cs, input, X), " &
"10 (BC_1, rd_n, input, X), " &
"9 (BC_1, wr_n, input, X), " &
"8 (BC_2, int_n, output2, X), " &
"7 (BC_2, spi_cs, output2, X), " &
"6 (BC_1, *, controlr, 0), " &
"5 (BC_0, ckpha, bidir, X, 6, 0, Z), " &
"4 (BC_1, rst_n, input, X), " &
"3 (BC_1, *, controlr, 0), " &
"2 (BC_0, hwmode, bidir, X, 3, 0, Z), " &
"1 (BC_1, modec(0), input, X), " &
"0 (BC_1, modec(1), input, X) ";
end ds33z44;