BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: TMS470MF066PZ

----------------------------------------------------------------------
-- BSDL Description for TMS470MF066PZ                             --          
-- Revised 22 April 2013                                            --
----------------------------------------------------------------------
--  Supported Devices: TMS470MF066PZ Revision 1.0                 --
----------------------------------------------------------------------
--  Created by    : Texas Instruments Incorporated                  --
--                : Marley Morrell                                  --
--  BSDL Revision : 1.2 Updated Power and ground numbers            --
--  BSDL Revision : 1.0 Released                                    --
--  BSDL Revision : 0.2 Beta Testing                                --
--  BSDL Revision : 0.1 originally created                          --
--                                                                  --
--  BSDL Status   : Released                                        --
--  Date Created  : 20 March 2008                                   --
--  Revision      : 1.0                                             --
----------------------------------------------------------------------
--                                                                  --
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--  Mailing Address:                                                         --
--                                                                           --
--             Texas Instruments                                             --
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--             Copyright (c) 2012, Texas Instruments Incorporated            --
-------------------------------------------------------------------


 entity TMS470MF066PZ is
   
-- This section identifies the default device package selected.
   
   generic (PHYSICAL_PIN_MAP: string:= "pkg_lead_100PZ2");
   
-- This section declares all the ports in the design.
   
   port ( 
          nTRST         : in       bit;
          TCK           : in       bit;
          ADEVT         : inout    bit;
          CAN1RX        : inout    bit;
          CAN1TX        : inout    bit;
          CAN2RX        : inout    bit;
          CAN2TX        : inout    bit;
          ECLK          : inout    bit;
          GIOA_INT_4    : inout    bit;
          GIOA_INT_5    : inout    bit;
          GIOA_INT_6    : inout    bit;
          GIOA_INT_7    : inout    bit;
          HET_0         : inout    bit;
          HET_1         : inout    bit;
          HET_10        : inout    bit;
          HET_11        : inout    bit;
          HET_12        : inout    bit;
          HET_13        : inout    bit;
          HET_14        : inout    bit;
          HET_15        : inout    bit;
          HET_2         : inout    bit;
          HET_3         : inout    bit;
          HET_4         : inout    bit;
          HET_5         : inout    bit;
          HET_6         : inout    bit;
          HET_7         : inout    bit;
          HET_8         : inout    bit;
          HET_9         : inout    bit;
          LIN_SCI1RX    : inout    bit;
          LIN_SCI1TX    : inout    bit;
          LIN_SCI2RX    : inout    bit;
          LIN_SCI2TX    : inout    bit;
          nRST          : inout    bit;
          SPI1CLK       : inout    bit;
          SPI1SIMO      : inout    bit;
          SPI1SOMI      : inout    bit;
          SPI2CLK       : inout    bit;
          SPI2NENA      : inout    bit;
          SPI2SIMO_0    : inout    bit;
          SPI2SOMI_0    : inout    bit;
          TDI           : in       bit;
          TDO           : out      bit;
          TMS           : in       bit;
          SPI1NCS       : inout    bit_vector (0 to 7);
          SPI2NCS       : inout    bit_vector (0 to 3);
          AD_REFHI      : linkage  bit;
          AD_REFLO      : linkage  bit;
          FLTP1         : linkage  bit;
          nENZ          : in       bit;
          nPORRST       : in       bit;
          OSCIN         : linkage  bit;
          OSCOUT        : linkage  bit;
          TEST          : in       bit;
          VDD3VFL       : linkage  bit;
          VDDA          : linkage  bit;
          VSSA          : linkage  bit;
          VSS           : linkage  bit_vector (0 to 7);
          ADIN          : linkage  bit_vector (0 to 15);
          VCC           : linkage  bit_vector (0 to 3)
        );
   
   use STD_1149_1_2001.all;
   
   attribute COMPONENT_CONFORMANCE of TMS470MF066PZ: entity is "STD_1149_1_2001";
   
   attribute PIN_MAP of TMS470MF066PZ: entity is PHYSICAL_PIN_MAP;
   
-- This section specifies the pin map for each port.
    
     constant pkg_lead_100PZ2: PIN_MAP_STRING := 
        "SPI2NCS       : (1, 2, 3, 4)," &
        "GIOA_INT_4    : 5,"  &
        "GIOA_INT_5    : 6,"  &
        "CAN1TX        : 7,"  &
        "CAN1RX        : 8,"  &
        "OSCIN         : 10," &
        "OSCOUT        : 11," &
        "GIOA_INT_6    : 15," &
        "GIOA_INT_7    : 16," &
        "SPI2CLK       : 17," &
        "SPI2SIMO_0    : 18," &
        "SPI2SOMI_0    : 19," &
        "LIN_SCI1TX    : 22," &
        "LIN_SCI1RX    : 23," &
        "LIN_SCI2TX    : 24," &
        "LIN_SCI2RX    : 25," &
        "SPI1CLK       : 34," &
        "SPI1SIMO      : 35," &
        "SPI1SOMI      : 36," &
        "CAN2TX        : 37," &
        "CAN2RX        : 38," &
        "HET_0         : 39," &
        "HET_1         : 40," &
        "TCK           : 44," &
        "TDO           : 45," &
        "TDI           : 46," &
        "TMS           : 47," &
        "nTRST         : 48," &
        "HET_2         : 49," &
        "HET_3         : 50," &
        "HET_4         : 53," &
        "HET_5         : 54," &
        "HET_6         : 55," &
        "HET_7         : 56," &
        "HET_8         : 57," &
        "HET_9         : 58," &
        "HET_10        : 59," &
        "HET_11        : 60," &
        "HET_12        : 61," &
        "HET_13        : 62," &
        "HET_14        : 63," &
        "HET_15        : 64," &
        "ADEVT         : 68," &
        "AD_REFHI      : 82," &
        "AD_REFLO      : 83," &
        "VSSA          : 84," &
        "VDDA          : 85," &
        "nPORRST       : 89," &
        "SPI2NENA      : 90," &
        "nENZ          : 91," &
        "VDD3VFL       : 95," &
        "ECLK          : 96," &
        "TEST          : 97," &
        "nRST          : 98," &
        "FLTP1         : 99," &
        "SPI1NCS       : (26, 27, 28, 29, 30, 31, 32, 33)," &
        "ADIN          : (69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 86, 87, 88)," &
        "VSS           : (9, 13, 21, 42, 51, 66, 93, 100),"&
        "VCC           : (12, 41, 67, 92)";
   
-- This section specifies the TAP ports. For the TAP TCK port, the parameters in 
-- the brackets are:
--        First Field : Maximum  TCK frequency.
--        Second Field: Allowable states TCK may be stopped in.
   
   attribute TAP_SCAN_CLOCK of TCK  : signal is (10.0e6, BOTH);
   attribute TAP_SCAN_IN    of TDI  : signal is true;
   attribute TAP_SCAN_MODE  of TMS  : signal is true;
   attribute TAP_SCAN_OUT   of TDO  : signal is true;
   attribute TAP_SCAN_RESET of nTRST: signal is true;
   
-- Specifies the compliance enable patterns for the design. It lists a set of 
-- design ports and the values that they should be set to, in order to enable 
-- compliance to IEEE Std 1149.1
   
   attribute COMPLIANCE_PATTERNS of TMS470MF066PZ: entity is 
        "(nENZ, nPORRST, TEST) (110)";
   
-- Specifies the number of bits in the instruction register.
   
   attribute INSTRUCTION_LENGTH of TMS470MF066PZ: entity is 6;
   
-- Specifies the boundary-scan instructions implemented in the design and their 
-- opcodes.
   
   attribute INSTRUCTION_OPCODE of TMS470MF066PZ: entity is 
     "IDCODE  (000100),"&
     "BYPASS  (111111)," &
     "EXTEST  (011000)," &
     "SAMPLE  (011011)," &
     "PRELOAD (011011)";
   
-- Specifies the bit pattern that is loaded into the instruction register when 
-- the TAP controller passes through the Capture-IR state. The standard mandates 
-- that the two LSBs must be "01". The remaining bits are design specific.
   
   attribute INSTRUCTION_CAPTURE of TMS470MF066PZ: entity is "000001";
   attribute IDCODE_REGISTER     of TMS470MF066PZ : entity is
      "XXXX" &                  -- Version   
      "1011011111100010" &      -- Part Number
      "00000010111" &           -- Manufacturer ID
      "1";                      -- Required by the IEEE Std 1149.1 - 1990
	  
-- This section specifies the test data register placed between TDI and TDO for 
-- each implemented instruction.
   
   attribute REGISTER_ACCESS of TMS470MF066PZ: entity is 
        "BYPASS   (BYPASS)," &
        "DEVICE_ID (IDCODE),       " &
        "BOUNDARY (EXTEST, SAMPLE, PRELOAD)";
   
-- Specifies the length of the boundary scan register.
   
   attribute BOUNDARY_LENGTH of TMS470MF066PZ: entity is 187;
   
-- The following list specifies the characteristics of each cell in the boundary 
-- scan register from TDI to TDO. The following is a description of the label 
-- fields:
--      num     : Is the cell number.
--      cell    : Is the cell type as defined by the standard.
--      port    : Is the design port name. Control cells do not have a port 
--                name.
--      function: Is the function of the cell as defined by the standard. Is one 
--                of input, output2, output3, bidir, control or controlr.
--      safe    : Specifies the value that the BSR cell should be loaded with 
--                for safe operation when the software might otherwise choose a 
--                random value.
--      ccell   : The control cell number. Specifies the control cell that 
--                drives the output enable for this port.
--      disval  : Specifies the value that is loaded into the control cell to 
--                disable the output enable for the corresponding port.
--      rslt    : Resulting state. Shows the state of the driver when it is 
--                disabled.
   
   attribute BOUNDARY_REGISTER of TMS470MF066PZ: entity is 
--     
--    num   cell   port           function      safe  [ccell  disval  rslt]
--     
     "186  (BC_2,  *,             internal,     X),                        " &
     "185  (BC_2,  *,             internal,     X),                        " &
     "184  (BC_2,  *,             control,      1),                        " &
     "183  (BC_7,  SPI2NCS(0),    bidir,        X,    184,    1,      Z),  " &
     "182  (BC_2,  *,             internal,     X),                        " &
     "181  (BC_2,  *,             internal,     X),                        " &
     "180  (BC_2,  *,             control,      1),                        " &
     "179  (BC_7,  SPI2NCS(1),    bidir,        X,    180,    1,      Z),  " &
     "178  (BC_2,  *,             internal,     X),                        " &
     "177  (BC_2,  *,             internal,     X),                        " &
     "176  (BC_2,  *,             control,      1),                        " &
     "175  (BC_7,  SPI2NCS(2),    bidir,        X,    176,    1,      Z),  " &
     "174  (BC_2,  *,             internal,     X),                        " &
     "173  (BC_2,  *,             internal,     X),                        " &
     "172  (BC_2,  *,             control,      1),                        " &
     "171  (BC_7,  SPI2NCS(3),    bidir,        X,    172,    1,      Z),  " &
     "170  (BC_2,  *,             control,      1),                        " &
     "169  (BC_7,  GIOA_INT_4,    bidir,        X,    170,    1,      Z),  " &
     "168  (BC_2,  *,             control,      1),                        " &
     "167  (BC_7,  GIOA_INT_5,    bidir,        X,    168,    1,      Z),  " &
     "166  (BC_2,  *,             control,      1),                        " &
     "165  (BC_7,  CAN1TX,        bidir,        X,    166,    1,      Z),  " &
     "164  (BC_2,  *,             control,      1),                        " &
     "163  (BC_7,  CAN1RX,        bidir,        X,    164,    1,      Z),  " &
     "162  (BC_2,  *,             control,      1),                        " &
     "161  (BC_7,  GIOA_INT_6,    bidir,        X,    162,    1,      Z),  " &
     "160  (BC_2,  *,             control,      1),                        " &
     "159  (BC_7,  GIOA_INT_7,    bidir,        X,    160,    1,      Z),  " &
     "158  (BC_2,  *,             control,      1),                        " &
     "157  (BC_7,  SPI2CLK,       bidir,        X,    158,    1,      Z),  " &
     "156  (BC_2,  *,             control,      1),                        " &
     "155  (BC_7,  SPI2SIMO_0,    bidir,        X,    156,    1,      Z),  " &
     "154  (BC_2,  *,             control,      1),                        " &
     "153  (BC_7,  SPI2SOMI_0,    bidir,        X,    154,    1,      Z),  " &
     "152  (BC_1,  *,             internal,     X),                        " &
     "151  (BC_2,  *,             internal,     X),                        " &
     "150  (BC_1,  *,             internal,     X),                        " &
     "149  (BC_1,  *,             internal,     X),                        " &
     "148  (BC_1,  *,             internal,     X),                        " &
     "147  (BC_1,  *,             internal,     X),                        " &
     "146  (BC_2,  *,             control,      1),                        " &
     "145  (BC_7,  LIN_SCI1TX,    bidir,        X,    146,    1,      Z),  " &
     "144  (BC_2,  *,             control,      1),                        " &
     "143  (BC_7,  LIN_SCI1RX,    bidir,        X,    144,    1,      Z),  " &
     "142  (BC_1,  *,             internal,     X),                        " &
     "141  (BC_1,  *,             internal,     X),                        " &
     "140  (BC_1,  *,             internal,     X),                        " &
     "139  (BC_1,  *,             internal,     X),                        " &
     "138  (BC_2,  *,             control,      1),                        " &
     "137  (BC_7,  LIN_SCI2TX,    bidir,        X,    138,    1,      Z),  " &
     "136  (BC_2,  *,             control,      1),                        " &
     "135  (BC_7,  LIN_SCI2RX,    bidir,        X,    136,    1,      Z),  " &
     "134  (BC_2,  *,             internal,     X),                        " &
     "133  (BC_2,  *,             internal,     X),                        " &
     "132  (BC_2,  *,             internal,     X),                        " &
     "131  (BC_2,  *,             internal,     X),                        " &
     "130  (BC_2,  *,             internal,     X),                        " &
     "129  (BC_2,  *,             internal,     X),                        " &
     "128  (BC_2,  *,             internal,     X),                        " &
     "127  (BC_2,  *,             internal,     X),                        " &
     "126  (BC_1,  *,             internal,     X),                        " &
     "125  (BC_1,  *,             internal,     X),                        " &
     "124  (BC_2,  *,             control,      1),                        " &
     "123  (BC_7,  SPI1NCS(7),    bidir,        X,    124,    1,      Z),  " &
     "122  (BC_2,  *,             control,      1),                        " &
     "121  (BC_7,  SPI1NCS(6),    bidir,        X,    122,    1,      Z),  " &
     "120  (BC_1,  *,             internal,     X),                        " &
     "119  (BC_1,  *,             internal,     X),                        " &
     "118  (BC_2,  *,             control,      1),                        " &
     "117  (BC_7,  SPI1NCS(5),    bidir,        X,    118,    1,      Z),  " &
     "116  (BC_2,  *,             control,      1),                        " &
     "115  (BC_7,  SPI1NCS(4),    bidir,        X,    116,    1,      Z),  " &
     "114  (BC_1,  *,             internal,     X),                        " &
     "113  (BC_1,  *,             internal,     X),                        " &
     "112  (BC_2,  *,             control,      1),                        " &
     "111  (BC_7,  SPI1NCS(3),    bidir,        X,    112,    1,      Z),  " &
     "110  (BC_2,  *,             control,      1),                        " &
     "109  (BC_7,  SPI1NCS(2),    bidir,        X,    110,    1,      Z),  " &
     "108  (BC_1,  *,             internal,     X),                        " &
     "107  (BC_1,  *,             internal,     X),                        " &
     "106  (BC_2,  *,             control,      1),                        " &
     "105  (BC_7,  SPI1NCS(1),    bidir,        X,    106,    1,      Z),  " &
     "104  (BC_2,  *,             control,      1),                        " &
     "103  (BC_7,  SPI1NCS(0),    bidir,        X,    104,    1,      Z),  " &
     "102  (BC_1,  *,             internal,     X),                        " &
     "101  (BC_1,  *,             internal,     X),                        " &
     "100  (BC_2,  *,             control,      1),                        " &
     "99   (BC_7,  SPI1CLK,       bidir,        X,    100,    1,      Z),  " &
     "98   (BC_1,  *,             internal,     X),                        " &
     "97   (BC_1,  *,             internal,     X),                        " &
     "96   (BC_2,  *,             control,      1),                        " &
     "95   (BC_7,  SPI1SIMO,      bidir,        X,    96,     1,      Z),  " &
     "94   (BC_2,  *,             control,      1),                        " &
     "93   (BC_7,  SPI1SOMI,      bidir,        X,    94,     1,      Z),  " &
     "92   (BC_1,  *,             internal,     X),                        " &
     "91   (BC_1,  *,             internal,     X),                        " &
     "90   (BC_2,  *,             control,      1),                        " &
     "89   (BC_7,  CAN2RX,        bidir,        X,    90,     1,      Z),  " &
     "88   (BC_2,  *,             control,      1),                        " &
     "87   (BC_7,  CAN2TX,        bidir,        X,    88,     1,      Z),  " &
     "86   (BC_2,  *,             control,      1),                        " &
     "85   (BC_7,  HET_0,         bidir,        X,    86,     1,      Z),  " &
     "84   (BC_2,  *,             control,      1),                        " &
     "83   (BC_7,  HET_1,         bidir,        X,    84,     1,      Z),  " &
     "82   (BC_2,  *,             internal,     X),                        " &
     "81   (BC_2,  *,             internal,     X),                        " &
     "80   (BC_2,  *,             internal,     X),                        " &
     "79   (BC_2,  *,             internal,     X),                        " &
     "78   (BC_2,  *,             internal,     X),                        " &
     "77   (BC_2,  *,             internal,     X),                        " &
     "76   (BC_2,  *,             control,      1),                        " &
     "75   (BC_7,  HET_2,         bidir,        X,    76,     1,      Z),  " &
     "74   (BC_2,  *,             control,      1),                        " &
     "73   (BC_7,  HET_3,         bidir,        X,    74,     1,      Z),  " &
     "72   (BC_2,  *,             internal,     X),                        " &
     "71   (BC_2,  *,             internal,     X),                        " &
     "70   (BC_1,  *,             internal,     X),                        " &
     "69   (BC_1,  *,             internal,     X),                        " &
     "68   (BC_1,  *,             internal,     X),                        " &
     "67   (BC_1,  *,             internal,     X),                        " &
     "66   (BC_2,  *,             control,      1),                        " &
     "65   (BC_7,  HET_4,         bidir,        X,    66,     1,      Z),  " &
     "64   (BC_2,  *,             control,      1),                        " &
     "63   (BC_7,  HET_5,         bidir,        X,    64,     1,      Z),  " &
     "62   (BC_1,  *,             internal,     X),                        " &
     "61   (BC_1,  *,             internal,     X),                        " &
     "60   (BC_1,  *,             internal,     X),                        " &
     "59   (BC_1,  *,             internal,     X),                        " &
     "58   (BC_2,  *,             control,      1),                        " &
     "57   (BC_7,  HET_6,         bidir,        X,    58,     1,      Z),  " &
     "56   (BC_2,  *,             control,      1),                        " &
     "55   (BC_7,  HET_7,         bidir,        X,    56,     1,      Z),  " &
     "54   (BC_1,  *,             internal,     X),                        " &
     "53   (BC_1,  *,             internal,     X),                        " &
     "52   (BC_1,  *,             internal,     X),                        " &
     "51   (BC_2,  *,             internal,     X),                        " &
     "50   (BC_2,  *,             internal,     X),                        " &
     "49   (BC_2,  *,             internal,     X),                        " &
     "48   (BC_2,  *,             internal,     X),                        " &
     "47   (BC_2,  *,             control,      1),                        " &
     "46   (BC_7,  HET_8,         bidir,        X,    47,     1,      Z),  " &
     "45   (BC_2,  *,             control,      1),                        " &
     "44   (BC_7,  HET_9,         bidir,        X,    45,     1,      Z),  " &
     "43   (BC_2,  *,             internal,     X),                        " &
     "42   (BC_2,  *,             internal,     X),                        " &
     "41   (BC_2,  *,             internal,     X),                        " &
     "40   (BC_2,  *,             internal,     X),                        " &
     "39   (BC_2,  *,             control,      1),                        " &
     "38   (BC_7,  HET_10,        bidir,        X,    39,     1,      Z),  " &
     "37   (BC_2,  *,             control,      1),                        " &
     "36   (BC_7,  HET_11,        bidir,        X,    37,     1,      Z),  " &
     "35   (BC_2,  *,             internal,     X),                        " &
     "34   (BC_2,  *,             internal,     X),                        " &
     "33   (BC_2,  *,             internal,     X),                        " &
     "32   (BC_2,  *,             internal,     X),                        " &
     "31   (BC_2,  *,             control,      1),                        " &
     "30   (BC_7,  HET_12,        bidir,        X,    31,     1,      Z),  " &
     "29   (BC_2,  *,             control,      1),                        " &
     "28   (BC_7,  HET_13,        bidir,        X,    29,     1,      Z),  " &
     "27   (BC_2,  *,             control,      1),                        " &
     "26   (BC_7,  HET_14,        bidir,        X,    27,     1,      Z),  " &
     "25   (BC_2,  *,             control,      1),                        " &
     "24   (BC_7,  HET_15,        bidir,        X,    25,     1,      Z),  " &
     "23   (BC_2,  *,             control,      1),                        " &
     "22   (BC_7,  ADEVT,         bidir,        X,    23,     1,      Z),  " &
     "21   (BC_2,  *,             control,      1),                        " &
     "20   (BC_7,  SPI2NENA,      bidir,        X,    21,     1,      Z),  " &
     "19   (BC_2,  *,             internal,     X),                        " &
     "18   (BC_2,  *,             internal,     X),                        " &
     "17   (BC_2,  *,             internal,     X),                        " &
     "16   (BC_2,  *,             internal,     X),                        " &
     "15   (BC_2,  *,             internal,     X),                        " &
     "14   (BC_2,  *,             internal,     X),                        " &
     "13   (BC_2,  *,             internal,     X),                        " &
     "12   (BC_2,  *,             internal,     X),                        " &
     "11   (BC_2,  *,             control,      1),                        " &
     "10   (BC_7,  ECLK,          bidir,        X,    11,     1,      Z),  " &
     "9    (BC_2,  *,             control,      1),                        " &
     "8    (BC_7,  nRST,          bidir,        X,    9,      1,      Z),  " &
     "7    (BC_2,  *,             internal,     X),                        " &
     "6    (BC_2,  *,             internal,     X),                        " &
     "5    (BC_2,  *,             internal,     X),                        " &
     "4    (BC_2,  *,             internal,     X),                        " &
     "3    (BC_2,  *,             internal,     X),                        " &
     "2    (BC_2,  *,             internal,     X),                        " &
     "1    (BC_2,  *,             internal,     X),                        " &
     "0    (BC_2,  *,             internal,     X)                         ";

 attribute DESIGN_WARNING of TMS470MF066PZ : entity is
      "According to simulation, BSD JTAG TAP may not work correctly unless  "&
      " device has completed RESET sequence first.                          "&
      "Forcing PORz low then release (no clock pulses required) would meet  "&
      " the requirement.                                                    "&
      "                                                                     "&
      "In order to enter bscan mode correctly, TMS must be low at the       "&
      "rising edge of TRSTz and at least one cycle after TRSTz is high.     ";

 end TMS470MF066PZ;