This BSDL contains syntax errors!
-- Copyright Intel Corporation 1998
--****************************************************************************
-- Intel Corporation makes no warranty for the use of its products
-- and assumes no responsibility for any errors which may appear in
-- this document nor does it make a commitment to update the information
-- contained herein.
--****************************************************************************
-- Boundary-Scan Description Language (BSDL Version 0.0) is a de-facto
-- standard means of describing essential features of ANSI/IEEE 1149.1-1990
-- compliant devices. Documentation of the format, history, and syntax can
-- be found in IEEE Std 1149.1b-1994, the supplement to the IEEE 1149.1-1990
-- and IEEE 1149.1a-1993.
--****************************************************************************
-- i960 (TM) Processor BSDL Model
-- Project code RP2
-- File **NOT** verified electrically
--****************************************************************************
entity RP2_Processor is
generic(PHYSICAL_PIN_MAP : string:= "BGA");
port (DCLKIN : in bit;
DCLKOUT : out bit;
DQ : inout bit_vector(0 to 63);
FAILZ : out bit;
I_RSTZ : out bit;
LCDINITZ : in bit;
NC1 : in bit;
NC : inout bit_vector(0 to 77);
NC_P : linkage bit_vector(0 to 3);
ONCEZ : in bit;
NMIZ : in bit;
P_AD : inout bit_vector(0 to 31);
P_CBEZ : inout bit_vector(0 to 3);
P_CCLK : in bit;
P_CLK : in bit;
P_DEVSELZ : inout bit;
P_FRAMEZ : inout bit;
P_GNTZ : in bit;
P_IDSEL : in bit;
P_INTZ : out bit_vector(0 to 3);
P_IRDYZ : inout bit;
P_LOCKZ : in bit;
P_PAR : inout bit;
P_PERRZ : inout bit;
P_REQZ : out bit;
P_RSTZ : in bit;
P_SERRZ : out bit;
P_STOPZ : inout bit;
P_TRDYZ : inout bit;
RAD : inout bit_vector(0 to 16);
RALE : out bit;
RCEZ : inout bit_vector(0 to 1);
ROEZ : out bit;
RWEZ : out bit;
S_AD : inout bit_vector(0 to 31);
S_CBEZ : inout bit_vector(0 to 3);
S_DEVSELZ : inout bit;
S_FRAMEZ : inout bit;
S_GNTZ : inout bit_vector(0 to 5);
S_INTZ_XINTZ : in bit_vector(0 to 3);
S_IRDYZ : inout bit;
S_LOCKZ : inout bit;
S_PAR : inout bit;
S_PERRZ : inout bit;
S_REQZ : in bit_vector(0 to 5);
S_RSTZ : out bit;
S_SERRZ : inout bit;
S_STOPZ : inout bit;
S_TRDYZ : inout bit;
SA : out bit_vector(0 to 11);
SBA : out bit_vector(0 to 1);
SCASZ : out bit;
SCB : inout bit_vector(0 to 7);
SCBODZ : in bit;
SCEZ : out bit_vector(0 to 1);
SCKE : out bit_vector(0 to 1);
SCL : inout bit;
SCNMODEZ : in bit;
SDA : inout bit;
SDQM : inout bit_vector(0 to 7);
SRASZ : out bit;
SWEZ : out bit;
TCK : in bit;
TDI : in bit;
TDO : out bit;
TMS : in bit;
TRSTZ : in bit;
VCC5REF : in bit;
VCC : linkage bit_vector(0 to 93);
VCCPLL : linkage bit_vector(0 to 2);
VSS : linkage bit_vector(0 to 102);
XINT4Z : in bit;
XINT5Z : in bit
);
use STD_1149_1_1990.all;
use i960RP2_a.all;
attribute PIN_MAP of RP2_Processor : entity is PHYSICAL_PIN_MAP;
constant BGA:PIN_MAP_STRING :=
"DCLKIN:E21,"&
"DCLKOUT:A22,"&
"DQ: (D22,A23,C23,A24,D24,A25,C25,A26,E26,B27,E27,C28,"&
" H32,H30,J32,J29,W29,Y32,Y30,AA32,AA29,AB32,AB30,"&
" AC32,AC29,AD32,AD30,AE32,AE29,AF32,AF30,AG32,E22,"&
" B23,E23,C24,E24,B25,E25,C26,A27,C27,A28,G32,H31,"&
" H28,J30,J28,W28,Y31,Y28,AA30,AA28,AB31,AB28,AC30,"&
" AC28,AD31,AD28,AE30,AE28,AF31,AF28,AH32),"&
"FAILZ:E12,"&
"I_RSTZ:A11,"&
"LCDINITZ:A21,"&
"NMIZ:A9,"&
"NC1:AG1,"&
"NC: (V5, U5, W3, W5,V1,V3,V4,AG2,AG3,AF1,AF3,AF4,AF5,"&
" AE1,AE2,AE3,AE5,AD1,AD3,AD4,AD5,AC1,AC2,AC3,AC5,"&
" AB1,AB3,AB4,AB5,AA1,AA2,AA3,AA5,Y1,Y3,Y4,Y5,W1,W2,"&
" AM13,AH1,AH3,AH4,AJ2,AJ5,AK5,AM5,AH6,AK6,AL6,AM6,"&
" AH7,AJ7,AK7,AM7,AH8,AK8,AL8,AM8,AH9,AJ9,AK9,AM9,"&
" AH10,AK10,AL10,AM10,AH11,AJ11,AK11,AM11,AH12,AL12,"&
" AM12,AH13,AJ13,AK12,AK13),"&
"NC_P: (A16,G5,V28,AL16),"&
"ONCEZ:C21,"&
"P_AD:(U1,U2,U3,T1,T3,T4,T5,R1,R3,R5,P1,P3,P4,P5,N1,N2,"&
" K3,K4,K5,J1,J2,J3,J5,H1,H5,G1,G2,G3,E5,A6,C6,D6),"&
"P_CBEZ:(R2,N5,K1,H4),"&
"P_CCLK:B21,"&
"P_CLK:C20,"&
"P_DEVSELZ:L1,"&
"P_FRAMEZ:L5,"&
"P_GNTZ:A7,"&
"P_IDSEL:H3,"&
"P_INTZ:(E8,D8,E7,C7),"&
"P_IRDYZ:L3,"&
"P_LOCKZ:M4,"&
"P_PAR:N3,"&
"P_PERRZ:M3,"&
"P_REQZ:E6,"&
"P_RSTZ:B7,"&
"P_SERRZ:M1,"&
"P_STOPZ:M5,"&
"P_TRDYZ:L2,"&
"RAD:(A13,B13,C13,E13,A14,C14,D14,E14,A15,C15,E15,E17,"&
" A18,C18,D18,E18,A19),"&
"RALE:B19,"&
"RCEZ:(C19,E19),"&
"ROEZ:D20,"&
"RWEZ:A20,"&
"S_AD:(AH14,AK14,AL14,AM14,AH15,AJ15,AK15,AM15,AJ17,AK17,"&
" AM17,AH18,AK18,AL18,AM18,AH19,AH22,AK22,AL22,AM22,"&
" AH23,AJ23,AK23,AM23,AK24,AL24,AM24,AH25,AJ25,AK25,"&
" AM25,AH26),"&
"S_CBEZ:(AH17,AJ19,AM21,AH24),"&
"S_DEVSELZ:AM20,"&
"S_FRAMEZ:AK21,"&
"S_GNTZ:(AM26,AJ27,AM27,AK28,AM28,AK29),"&
"S_INTZ_XINTZ:(B9,C9,E9,A10),"&
"S_IRDYZ:AJ21,"&
"S_LOCKZ:AK20,"&
"S_PAR:AK19,"&
"S_PERRZ:AH20,"&
"S_REQZ:(AL26,AH27,AK27,AH28,AL28,AJ29),"&
"S_RSTZ:AK26,"&
"S_SERRZ:AM19,"&
"S_STOPZ:AL20,"&
"S_TRDYZ:AH21,"&
"SA:(N30,N29,N28,P32,P31,P30,P28,R32,R30,R29,R28,T32),"&
"SBA:(T31,T30),"&
"SCASZ:L30,"&
"SCB:(K32,K30,V31,W32,K31,K28,V30,W30),"&
"SCBODZ:D12,"&
"SCEZ:(M30,M28),"&
"SCKE:(T28,U32),"&
"SCL:A8,"&
"SCNMODEZ:E10,"&
"SDA:C8,"&
"SDQM:(L29,M32,U30,U28,L28,M31,U29,V32),"&
"SRASZ:N32,"&
"SWEZ:L32,"&
"TCK:C12,"&
"TDI:A12,"&
"TDO:E11,"&
"TMS:B11,"&
"TRSTZ:C11,"&
"VCC5REF:E20,"&
"VSS: (A1, A2, A3, A4, A5, B1, C1, C4, D1, D3, D4, D5, E1, E4, F1, F5,"&
" G4, J4, D7, D9, D11,D13,D15,D16,E16,C17,D17,D19,D21,"&
" D23,D25,D27,A30,A31,A32,B32,C32,D28,D29,E28,E29,"&
" E30,E32,F28,F29,F30,F31,F32,G28,G29,H29,K29,M29,"&
" P29,T29,V29,Y29,AB29,AD29,AF29,AG28,AG29,AH29,"&
" AJ28,AJ32,AK32,AL32,AM29,AM30,AM31,AM32,AJ26,"&
" AJ24,AJ22,AJ20, AJ18,AH16,AJ16,AK16,AJ14,AJ12,"&
" AJ10,AJ8,AJ6,AM1,AM2,AM3,AL1,AK1,AK4,AJ3,AJ4,"&
" AH5,AG4,AG5,AE4,AC4,AA4,W4,U4,R4,N4,L4),"&
"VCC: (B2,B3,B4,B5,B6,C2,C3,C5,D2,E2,E3,F2,F3,F4,H2,K2,M2,"&
" P2,T2,V2,Y2,AB2,AD2,AF2,AH2,AJ1,AK2,AK3, AL2,AL3,"&
" AL4,AL5,AM4,AL7,AL9,AL11,AL13,AL15,AL17,AL19,"&
" AM16,AL21,AL23,AL25,AL27,AL29,AL30,AL31,AK30,"&
" AK31,AJ30,AJ31,AH30,AH31,AG30,AG31,AE31,AC31,"&
" AA31,W31,U31,R31,N31,L31,J31,G30,G31,E31,"&
" D30,D31,D32,C29,C30,C31,B28,B29,B30,B31,A29,B26,"&
" B24,B22,B20,B18,A17,B17,B16,C16,B14,B12,B10,B8),"&
"VCCPLL:(C22,B15,D26),"&
"XINT4Z:C10,"&
"XINT5Z:D10";
attribute Tap_Scan_In of TDI : signal is true;
attribute Tap_Scan_Mode of TMS : signal is true;
attribute Tap_Scan_Out of TDO : signal is true;
attribute Tap_Scan_Reset of TRSTZ : signal is true;
attribute Tap_Scan_Clock of TCK : signal is (16.0e6, BOTH);
attribute Instruction_Length of RP2_Processor: entity is 4;
attribute Instruction_Opcode of RP2_Processor: entity is
"BYPASS (1111)," &
"EXTEST (0000)," &
"SAMPLE (0001)," &
"IDCODE (0010)," &
"RUBIST (0111)," &
"CLAMP (0100)," &
"HIGHZ (1000)," &
"Reserved (0110,1011,1100,1110,0101)";
attribute Instruction_Capture of RP2_Processor: entity is "0001";
attribute Instruction_Private of RP2_Processor: entity is "Reserved" ;
attribute Idcode_Register of RP2_Processor: entity is
--****************************************************************************
-- 80960RM A-0 step
--***************************************************************************
-- Processor Device ID register - PDIDR (spec update) 0x08863013 A-step
-- "0000" & --version,
-- "1000100001100011" & --part number
-- "00000001001" & --manufacturers identity
-- "1"; --required by the standard
--****************************************************************************
-- 80960RM B-0 step
--***************************************************************************
-- Processor Device ID register - PDIDR (spec update) 0x18863013 B-step
-- "0001" & --version,
-- "1000100001100011" & --part number
-- "00000001001" & --manufacturers identity
-- "1"; --required by the standard
--****************************************************************************
-- 80960RM C-0 step DEFAULT
--***************************************************************************
-- Processor Device ID register - PDIDR (spec update) 0x28863013 C-step
"0010" & --version,
"1000100001100011" & --part number
"00000001001" & --manufacturers identity
"1"; --required by the standard
attribute Register_Access of RP2_Processor: entity is
"Runbist[1] (RUBIST)," &
"Bypass (CLAMP, HIGHZ)";
--{*******************************************************************}
--{ The first cell, cell 0, is closest to TDO }
--{ BC_1:Control, Output3 CBSC_1:Bidir BC_4: Input, Clock }
--{*******************************************************************}
attribute Boundary_Cells of RP2_Processor: entity is "BC_4, BC_1, CBSC_1";
attribute Boundary_Length of RP2_Processor: entity is 404;
attribute Boundary_Register of RP2_Processor: entity is
"0 (CBSC_1, dq(44), bidir, X, 85, 1, Z),"&
"1 (CBSC_1, dq(45), bidir, X, 89, 1, Z),"&
"2 (CBSC_1, dq(43), bidir, X, 85, 1, Z),"&
"3 (CBSC_1, dq(13), bidir, X, 78, 1, Z),"&
"4 (CBSC_1, dq(46), bidir, X, 89, 1, Z),"&
"5 (CBSC_1, dq(15), bidir, X, 78, 1, Z),"&
"6 (CBSC_1, dq(14), bidir, X, 78, 1, Z),"&
"7 (CBSC_1, dq(12), bidir, X, 78, 1, Z),"&
"8 (CBSC_1, dq(47), bidir, X, 89, 1, Z),"&
"9 (CBSC_1, scb(5), bidir, X, 83, 1, Z),"&
"10 (CBSC_1, scb(1), bidir, X, 80, 1, Z),"&
"11 (CBSC_1, scb(0), bidir, X, 79, 1, Z),"&
"12 (CBSC_1, scb(4), bidir, X, 83, 1, Z),"&
"13 (BC_1, scasz, output3, X, 90, 1, Z),"&
"14 (CBSC_1, sdqm(0), bidir, X, 84, 1, Z),"&
"15 (CBSC_1, sdqm(4), bidir, X, 84, 1, Z),"&
"16 (BC_1, scez(1), output3, X, 90, 1, Z),"&
"17 (BC_1, swez, output3, X, 90, 1, Z),"&
"18 (CBSC_1, sdqm(5), bidir, X, 84, 1, Z),"&
"19 (BC_1, scez(0), output3, X, 90, 1, Z),"&
"20 (BC_1, sa(1), output3, X, 90, 1, Z),"&
"21 (CBSC_1, sdqm(1), bidir, X, 84, 1, Z),"&
"22 (BC_1, sa(2), output3, X, 90, 1, Z),"&
"23 (BC_1, srasz, output3, X, 90, 1, Z),"&
"24 (BC_1, sa(0), output3, X, 90, 1, Z),"&
"25 (BC_1, sa(4), output3, X, 90, 1, Z),"&
"26 (BC_1, sa(6), output3, X, 90, 1, Z),"&
"27 (BC_1, sa(8), output3, X, 90, 1, Z),"&
"28 (BC_1, sa(5), output3, X, 90, 1, Z),"&
"29 (BC_1, scke(0), output3, X, 90, 1, Z),"&
"30 (BC_1, sa(3), output3, X, 90, 1, Z),"&
"31 (BC_1, sa(10), output3, X, 90, 1, Z),"&
"32 (BC_1, sba(1), output3, X, 90, 1, Z),"&
"33 (BC_1, sa(9), output3, X, 90, 1, Z),"&
"34 (BC_1, scke(1), output3, X, 90, 1, Z),"&
"35 (BC_1, sa(7), output3, X, 90, 1, Z),"&
"36 (CBSC_1, sdqm(6), bidir, X, 84, 1, Z),"&
"37 (BC_1, sba(0), output3, X, 90, 1, Z),"&
"38 (CBSC_1, scb(2), bidir, X, 81, 1, Z),"&
"39 (BC_1, sa(11), output3, X, 90, 1, Z),"&
"40 (CBSC_1, sdqm(2), bidir, X, 84, 1, Z),"&
"41 (CBSC_1, sdqm(3), bidir, X, 84, 1, Z),"&
"42 (CBSC_1, scb(3), bidir, X, 82, 1, Z),"&
"43 (CBSC_1, sdqm(7), bidir, X, 84, 1, Z),"&
"44 (CBSC_1, scb(7), bidir, X, 87, 1, Z),"&
"45 (CBSC_1, scb(6), bidir, X, 86, 1, Z),"&
"46 (CBSC_1, dq(48), bidir, X, 89, 1, Z),"&
"47 (CBSC_1, dq(17), bidir, X, 78, 1, Z),"&
"48 (CBSC_1, dq(16), bidir, X, 78, 1, Z),"&
"49 (CBSC_1, dq(18), bidir, X, 78, 1, Z),"&
"50 (CBSC_1, dq(49), bidir, X, 89, 1, Z),"&
"51 (CBSC_1, dq(50), bidir, X, 89, 1, Z),"&
"52 (CBSC_1, dq(19), bidir, X, 78, 1, Z),"&
"53 (CBSC_1, dq(52), bidir, X, 89, 1, Z),"&
"54 (CBSC_1, dq(51), bidir, X, 89, 1, Z),"&
"55 (CBSC_1, dq(20), bidir, X, 78, 1, Z),"&
"56 (CBSC_1, dq(53), bidir, X, 88, 1, Z),"&
"57 (CBSC_1, dq(21), bidir, X, 78, 1, Z),"&
"58 (CBSC_1, dq(23), bidir, X, 78, 1, Z),"&
"59 (CBSC_1, dq(22), bidir, X, 78, 1, Z),"&
"60 (CBSC_1, dq(24), bidir, X, 78, 1, Z),"&
"61 (CBSC_1, dq(54), bidir, X, 88, 1, Z),"&
"62 (CBSC_1, dq(56), bidir, X, 88, 1, Z),"&
"63 (CBSC_1, dq(57), bidir, X, 85, 1, Z),"&
"64 (CBSC_1, dq(55), bidir, X, 88, 1, Z),"&
"65 (CBSC_1, dq(58), bidir, X, 85, 1, Z),"&
"66 (CBSC_1, dq(25), bidir, X, 78, 1, Z),"&
"67 (CBSC_1, dq(27), bidir, X, 78, 1, Z),"&
"68 (CBSC_1, dq(26), bidir, X, 78, 1, Z),"&
"69 (CBSC_1, dq(60), bidir, X, 85, 1, Z),"&
"70 (CBSC_1, dq(59), bidir, X, 85, 1, Z),"&
"71 (CBSC_1, dq(28), bidir, X, 78, 1, Z),"&
"72 (CBSC_1, dq(29), bidir, X, 78, 1, Z),"&
"73 (CBSC_1, dq(31), bidir, X, 78, 1, Z),"&
"74 (CBSC_1, dq(30), bidir, X, 78, 1, Z),"&
"75 (CBSC_1, dq(61), bidir, X, 85, 1, Z),"&
"76 (CBSC_1, dq(62), bidir, X, 85, 1, Z),"&
"77 (CBSC_1, dq(63), bidir, X, 85, 1, Z),"&
"78 (BC_1, *, control, 1)," &
"79 (BC_1, *, control, 1)," &
"80 (BC_1, *, control, 1)," &
"81 (BC_1, *, control, 1)," &
"82 (BC_1, *, control, 1)," &
"83 (BC_1, *, control, 1)," &
"84 (BC_1, *, control, 1)," &
"85 (BC_1, *, control, 1)," &
"86 (BC_1, *, control, 1)," &
"87 (BC_1, *, control, 1)," &
"88 (BC_1, *, control, 1)," &
"89 (BC_1, *, control, 1)," &
"90 (BC_1, *, control, 1)," &
"91 (BC_4, s_reqz(3), input, X),"&
"92 (BC_4, s_reqz(5), input, X),"&
"93 (CBSC_1, s_gntz(3), bidir, X, 184, 1, Z),"&
"94 (CBSC_1, s_gntz(5), bidir, X, 184, 1, Z),"&
"95 (BC_4, s_reqz(1), input, X),"&
"96 (BC_4, s_reqz(4), input, X),"&
"97 (CBSC_1, s_gntz(4), bidir, X, 184, 1, Z),"&
"98 (BC_4, s_reqz(2), input, X),"&
"99 (CBSC_1, s_gntz(1), bidir, X, 184, 1, Z),"&
"100 (CBSC_1, s_ad(31), bidir, X, 189, 1, Z),"&
"101 (CBSC_1, s_gntz(2), bidir, X, 184, 1, Z),"&
"102 (CBSC_1, s_gntz(0), bidir, X, 184, 1, Z),"&
"103 (BC_1, s_rstz, output3, X, 205, 1, Z),"&
"104 (CBSC_1, s_ad(27), bidir, X, 189, 1, Z),"&
"105 (CBSC_1, s_ad(28), bidir, X, 189, 1, Z),"&
"106 (BC_4, s_reqz(0), input, X),"&
"107 (CBSC_1, s_ad(30), bidir, X, 189, 1, Z),"&
"108 (CBSC_1, s_ad(29), bidir, X, 189, 1, Z),"&
"109 (CBSC_1, s_cbez(3), bidir, X, 193, 1, Z),"&
"110 (CBSC_1, s_ad(24), bidir, X, 189, 1, Z),"&
"111 (CBSC_1, s_ad(25), bidir, X, 189, 1, Z),"&
"112 (CBSC_1, s_ad(26), bidir, X, 189, 1, Z),"&
"113 (CBSC_1, s_ad(20), bidir, X, 190, 1, Z),"&
"114 (CBSC_1, s_ad(23), bidir, X, 190, 1, Z),"&
"115 (CBSC_1, s_ad(21), bidir, X, 190, 1, Z),"&
"116 (CBSC_1, s_ad(17), bidir, X, 190, 1, Z),"&
"117 (CBSC_1, s_ad(22), bidir, X, 190, 1, Z),"&
"118 (CBSC_1, s_ad(18), bidir, X, 190, 1, Z),"&
"119 (CBSC_1, s_ad(16), bidir, X, 190, 1, Z),"&
"120 (CBSC_1, s_framez, bidir, X, 204, 1, Z),"&
"121 (CBSC_1, s_ad(19), bidir, X, 190, 1, Z),"&
"122 (CBSC_1, s_trdyz, bidir, X, 202, 1, Z),"&
"123 (CBSC_1, s_perrz, bidir, X, 200, 1, Z),"&
"124 (CBSC_1, s_irdyz, bidir, X, 203, 1, Z),"&
"125 (CBSC_1, s_lockz, bidir, X, 201, 1, Z),"&
"126 (CBSC_1, s_cbez(2), bidir, X, 193, 1, Z),"&
"127 (CBSC_1, s_par, bidir, X, 198, 1, Z),"&
"128 (CBSC_1, s_stopz, bidir, X, 202, 1, Z),"&
"129 (CBSC_1, s_ad(15), bidir, X, 191, 1, Z),"&
"130 (CBSC_1, s_serrz, bidir, X, 199, 1, Z),"&
"131 (CBSC_1, s_devselz, bidir, X, 202, 1, Z),"&
"132 (CBSC_1, s_ad(11), bidir, X, 191, 1, Z),"&
"133 (CBSC_1, s_cbez(1), bidir, X, 193, 1, Z),"&
"134 (CBSC_1, s_cbez(0), bidir, X, 193, 1, Z),"&
"135 (CBSC_1, s_ad(14), bidir, X, 191, 1, Z),"&
"136 (CBSC_1, s_ad(12), bidir, X, 191, 1, Z),"&
"137 (CBSC_1, s_ad(9), bidir, X, 191, 1, Z),"&
"138 (CBSC_1, s_ad(13), bidir, X, 191, 1, Z),"&
"139 (CBSC_1, s_ad(4), bidir, X, 192, 1, Z),"&
"140 (CBSC_1, s_ad(10), bidir, X, 191, 1, Z),"&
"141 (CBSC_1, s_ad(8), bidir, X, 191, 1, Z),"&
"142 (CBSC_1, s_ad(7), bidir, X, 192, 1, Z),"&
"143 (CBSC_1, s_ad(5), bidir, X, 192, 1, Z),"&
"144 (CBSC_1, s_ad(6), bidir, X, 192, 1, Z),"&
"145 (CBSC_1, s_ad(3), bidir, X, 192, 1, Z),"&
"146 (CBSC_1, nc(1), bidir, X, 194, 1, Z),"&
"147 (CBSC_1, s_ad(1), bidir, X, 192, 1, Z),"&
"148 (CBSC_1, s_ad(2), bidir, X, 192, 1, Z),"&
"149 (CBSC_1, nc(2), bidir, X, 185, 1, Z),"&
"150 (CBSC_1, s_ad(0), bidir, X, 192, 1, Z),"&
"151 (CBSC_1, nc(3), bidir, X, 195, 1, Z),"&
"152 (CBSC_1, nc(4), bidir, X, 196, 1, Z),"&
"153 (CBSC_1, nc(5), bidir, X, 194, 1, Z),"&
"154 (CBSC_1, nc(6), bidir, X, 194, 1, Z),"&
"155 (CBSC_1, nc(7), bidir, X, 194, 1, Z),"&
"156 (CBSC_1, nc(8), bidir, X, 197, 1, Z),"&
"157 (CBSC_1, nc(9), bidir, X, 185, 1, Z),"&
"158 (CBSC_1, nc(10), bidir, X, 186, 1, Z),"&
"159 (CBSC_1, nc(11), bidir, X, 185, 1, Z),"&
"160 (CBSC_1, nc(12), bidir, X, 185, 1, Z),"&
"161 (CBSC_1, nc(13), bidir, X, 185, 1, Z),"&
"162 (CBSC_1, nc(14), bidir, X, 185, 1, Z),"&
"163 (CBSC_1, nc(15), bidir, X, 186, 1, Z),"&
"164 (CBSC_1, nc(16), bidir, X, 185, 1, Z),"&
"165 (CBSC_1, nc(17), bidir, X, 186, 1, Z),"&
"166 (CBSC_1, nc(18), bidir, X, 185, 1, Z),"&
"167 (CBSC_1, nc(19), bidir, X, 186, 1, Z),"&
"168 (CBSC_1, nc(20), bidir, X, 186, 1, Z),"&
"169 (CBSC_1, nc(21), bidir, X, 187, 1, Z),"&
"170 (CBSC_1, nc(22), bidir, X, 186, 1, Z),"&
"171 (CBSC_1, nc(23), bidir, X, 187, 1, Z),"&
"172 (CBSC_1, nc(24), bidir, X, 186, 1, Z),"&
"173 (CBSC_1, nc(25), bidir, X, 187, 1, Z),"&
"174 (CBSC_1, nc(26), bidir, X, 186, 1, Z),"&
"175 (CBSC_1, nc(27), bidir, X, 187, 1, Z),"&
"176 (CBSC_1, nc(28), bidir, X, 187, 1, Z),"&
"177 (CBSC_1, nc(29), bidir, X, 187, 1, Z),"&
"178 (CBSC_1, nc(30), bidir, X, 188, 1, Z),"&
"179 (CBSC_1, nc(31), bidir, X, 187, 1, Z),"&
"180 (CBSC_1, nc(32), bidir, X, 188, 1, Z),"&
"181 (CBSC_1, nc(33), bidir, X, 187, 1, Z),"&
"182 (CBSC_1, nc(34), bidir, X, 188, 1, Z),"&
"183 (CBSC_1, nc(35), bidir, X, 188, 1, Z),"&
"184 (BC_1, *, control, 1)," &
"185 (BC_1, *, control, 1)," &
"186 (BC_1, *, control, 1)," &
"187 (BC_1, *, control, 1)," &
"188 (BC_1, *, control, 1)," &
"189 (BC_1, *, control, 1)," &
"190 (BC_1, *, control, 1)," &
"191 (BC_1, *, control, 1)," &
"192 (BC_1, *, control, 1)," &
"193 (BC_1, *, control, 1)," &
"194 (BC_1, *, control, 1)," &
"195 (BC_1, *, control, 1)," &
"196 (BC_1, *, control, 1)," &
"197 (BC_1, *, control, 1)," &
"198 (BC_1, *, control, 1)," &
"199 (BC_1, *, control, 1)," &
"200 (BC_1, *, control, 1)," &
"201 (BC_1, *, control, 1)," &
"202 (BC_1, *, control, 1)," &
"203 (BC_1, *, control, 1)," &
"204 (BC_1, *, control, 1)," &
"205 (BC_1, *, control, 1)," &
"206 (CBSC_1, nc(36), bidir, X, 292, 1, Z),"&
"207 (CBSC_1, nc(37), bidir, X, 292, 1, Z),"&
"208 (CBSC_1, nc(38), bidir, X, 292, 1, Z),"&
"209 (CBSC_1, nc(39), bidir, X, 292, 1, Z),"&
"210 (BC_4, nc1, input, X),"&
"211 (CBSC_1, nc(40), bidir, X, 293, 1, Z),"&
"212 (CBSC_1, nc(41), bidir, X, 293, 1, Z),"&
"213 (CBSC_1, nc(42), bidir, X, 293, 1, Z),"&
"214 (CBSC_1, nc(43), bidir, X, 294, 1, Z),"&
"215 (CBSC_1, nc(44), bidir, X, 293, 1, Z),"&
"216 (CBSC_1, nc(45), bidir, X, 293, 1, Z),"&
"217 (CBSC_1, nc(46), bidir, X, 293, 1, Z),"&
"218 (CBSC_1, nc(47), bidir, X, 293, 1, Z),"&
"219 (CBSC_1, nc(48), bidir, X, 294, 1, Z),"&
"220 (CBSC_1, nc(49), bidir, X, 294, 1, Z),"&
"221 (CBSC_1, nc(50), bidir, X, 295, 1, Z),"&
"222 (CBSC_1, nc(51), bidir, X, 293, 1, Z),"&
"223 (CBSC_1, nc(52), bidir, X, 294, 1, Z),"&
"224 (CBSC_1, nc(53), bidir, X, 295, 1, Z),"&
"225 (CBSC_1, nc(54), bidir, X, 294, 1, Z),"&
"226 (CBSC_1, nc(55), bidir, X, 294, 1, Z),"&
"227 (CBSC_1, nc(56), bidir, X, 294, 1, Z),"&
"228 (CBSC_1, nc(57), bidir, X, 295, 1, Z),"&
"229 (CBSC_1, nc(58), bidir, X, 294, 1, Z),"&
"230 (CBSC_1, nc(59), bidir, X, 295, 1, Z),"&
"231 (CBSC_1, nc(60), bidir, X, 295, 1, Z),"&
"232 (CBSC_1, nc(61), bidir, X, 295, 1, Z),"&
"233 (CBSC_1, nc(62), bidir, X, 296, 1, Z),"&
"234 (CBSC_1, nc(63), bidir, X, 296, 1, Z),"&
"235 (CBSC_1, nc(64), bidir, X, 295, 1, Z),"&
"236 (CBSC_1, nc(65), bidir, X, 295, 1, Z),"&
"237 (CBSC_1, nc(66), bidir, X, 296, 1, Z),"&
"238 (CBSC_1, nc(67), bidir, X, 296, 1, Z),"&
"239 (CBSC_1, nc(68), bidir, X, 296, 1, Z),"&
"240 (CBSC_1, nc(69), bidir, X, 306, 1, Z),"&
"241 (CBSC_1, nc(70), bidir, X, 296, 1, Z),"&
"242 (CBSC_1, nc(71), bidir, X, 296, 1, Z),"&
"243 (CBSC_1, nc(72), bidir, X, 310, 1, Z),"&
"244 (CBSC_1, nc(73), bidir, X, 310, 1, Z),"&
"245 (CBSC_1, nc(74), bidir, X, 296, 1, Z),"&
"246 (CBSC_1, nc(75), bidir, X, 311, 1, Z),"&
"247 (CBSC_1, nc(76), bidir, X, 303, 1, Z),"&
"248 (CBSC_1, nc(77), bidir, X, 310, 1, Z),"&
"249 (CBSC_1, p_ad(2), bidir, X, 297, 1, Z),"&
"250 (CBSC_1, nc(0), bidir, X, 310, 1, Z),"&
"251 (CBSC_1, p_ad(3), bidir, X, 297, 1, Z),"&
"252 (CBSC_1, p_ad(1), bidir, X, 297, 1, Z),"&
"253 (CBSC_1, p_ad(7), bidir, X, 297, 1, Z),"&
"254 (CBSC_1, p_ad(0), bidir, X, 297, 1, Z),"&
"255 (CBSC_1, p_cbez(0), bidir, X, 309, 1, Z),"&
"256 (CBSC_1, p_ad(4), bidir, X, 297, 1, Z),"&
"257 (CBSC_1, p_ad(6), bidir, X, 297, 1, Z),"&
"258 (CBSC_1, p_ad(9), bidir, X, 298, 1, Z),"&
"259 (CBSC_1, p_ad(5), bidir, X, 297, 1, Z),"&
"260 (CBSC_1, p_ad(10), bidir, X, 298, 1, Z),"&
"261 (CBSC_1, p_ad(8), bidir, X, 298, 1, Z),"&
"262 (CBSC_1, p_ad(13), bidir, X, 298, 1, Z),"&
"263 (CBSC_1, p_ad(11), bidir, X, 298, 1, Z),"&
"264 (CBSC_1, p_ad(12), bidir, X, 298, 1, Z),"&
"265 (CBSC_1, p_ad(14), bidir, X, 298, 1, Z),"&
"266 (CBSC_1, p_ad(15), bidir, X, 298, 1, Z),"&
"267 (CBSC_1, p_cbez(1), bidir, X, 309, 1, Z),"&
"268 (CBSC_1, p_par, bidir, X, 305, 1, Z),"&
"269 (CBSC_1, p_perrz, bidir, X, 304, 1, Z),"&
"270 (CBSC_1, p_serrz, bidir, X, 302, 1, Z),"&
"271 (CBSC_1, p_stopz, bidir, X, 301, 1, Z),"&
"272 (CBSC_1, p_devselz, bidir, X, 301, 1, Z),"&
"273 (BC_4, p_lockz, input, X),"&
"274 (CBSC_1, p_trdyz, bidir, X, 301, 1, Z),"&
"275 (CBSC_1, p_irdyz, bidir, X, 307, 1, Z),"&
"276 (CBSC_1, p_cbez(2), bidir, X, 309, 1, Z),"&
"277 (CBSC_1, p_framez, bidir, X, 308, 1, Z),"&
"278 (CBSC_1, p_ad(18), bidir, X, 299, 1, Z),"&
"279 (CBSC_1, p_ad(17), bidir, X, 299, 1, Z),"&
"280 (CBSC_1, p_ad(16), bidir, X, 299, 1, Z),"&
"281 (CBSC_1, p_ad(20), bidir, X, 299, 1, Z),"&
"282 (CBSC_1, p_ad(19), bidir, X, 299, 1, Z),"&
"283 (CBSC_1, p_ad(22), bidir, X, 299, 1, Z),"&
"284 (CBSC_1, p_ad(21), bidir, X, 299, 1, Z),"&
"285 (CBSC_1, p_ad(23), bidir, X, 299, 1, Z),"&
"286 (CBSC_1, p_cbez(3), bidir, X, 309, 1, Z),"&
"287 (CBSC_1, p_ad(24), bidir, X, 300, 1, Z),"&
"288 (BC_4, p_idsel, input, X),"&
"289 (CBSC_1, p_ad(26), bidir, X, 300, 1, Z),"&
"290 (CBSC_1, p_ad(25), bidir, X, 300, 1, Z),"&
"291 (CBSC_1, p_ad(27), bidir, X, 300, 1, Z),"&
"292 (BC_1, *, control, 1)," &
"293 (BC_1, *, control, 1)," &
"294 (BC_1, *, control, 1)," &
"295 (BC_1, *, control, 1)," &
"296 (BC_1, *, control, 1)," &
"297 (BC_1, *, control, 1)," &
"298 (BC_1, *, control, 1)," &
"299 (BC_1, *, control, 1)," &
"300 (BC_1, *, control, 1)," &
"301 (BC_1, *, control, 1)," &
"302 (BC_1, *, control, 1)," &
"303 (BC_1, *, control, 1)," &
"304 (BC_1, *, control, 1)," &
"305 (BC_1, *, control, 1)," &
"306 (BC_1, *, control, 1)," &
"307 (BC_1, *, control, 1)," &
"308 (BC_1, *, control, 1)," &
"309 (BC_1, *, control, 1)," &
"310 (BC_1, *, control, 1)," &
"311 (BC_1, *, control, 1)," &
"312 (BC_1, *, control, 1)," &
"313 (CBSC_1, p_ad(28), bidir, X, 401, 1, Z),"&
"314 (CBSC_1, p_ad(30), bidir, X, 401, 1, Z),"&
"315 (CBSC_1, p_ad(31), bidir, X, 401, 1, Z),"&
"316 (CBSC_1, p_reqz, bidir, X, 402, 1, Z),"&
"317 (BC_1, p_intz(2), output3, X, 398, 1, Z),"&
"318 (BC_1, p_intz(3), output3, X, 397, 1, Z),"&
"319 (CBSC_1, p_ad(29), bidir, X, 401, 1, Z),"&
"320 (BC_4, p_rstz, input, X),"&
"321 (BC_4, p_gntz, input, X),"&
"322 (BC_1, p_intz(1), output3, X, 399, 1, Z),"&
"323 (BC_1, p_intz(0), output3, X, 400, 1, Z),"&
"324 (CBSC_1, sda, bidir, X, 388, 1, Z),"&
"325 (CBSC_1, scl, bidir, X, 389, 1, Z),"&
"326 (BC_4, s_intz_xintz(2), input, X),"&
"327 (BC_4, s_intz_xintz(1), input, X),"&
"328 (BC_4, scnmodez, input, X),"&
"329 (BC_4, s_intz_xintz(0), input, X),"&
"330 (BC_4, nmiz, input, X),"&
"331 (BC_4, xint5z, input, X),"&
"332 (BC_4, xint4z, input, X),"&
"333 (BC_4, s_intz_xintz(3), input, X),"&
"334 (BC_1, i_rstz, output3, X, 403, 1, Z),"&
"335 (BC_4, scbodz, input, X),"&
"336 (BC_1, failz, output3, X, 403, 1, Z),"&
"337 (CBSC_1, rad(3), bidir, X, 390, 1, Z),"&
"338 (CBSC_1, rad(0), bidir, X, 390, 1, Z),"&
"339 (CBSC_1, rad(2), bidir, X, 390, 1, Z),"&
"340 (CBSC_1, rad(7), bidir, X, 390, 1, Z),"&
"341 (CBSC_1, rad(5), bidir, X, 390, 1, Z),"&
"342 (CBSC_1, rad(1), bidir, X, 390, 1, Z),"&
"343 (CBSC_1, rad(4), bidir, X, 390, 1, Z),"&
"344 (CBSC_1, rad(6), bidir, X, 390, 1, Z),"&
"345 (CBSC_1, rad(15), bidir, X, 391, 1, Z),"&
"346 (CBSC_1, rad(10), bidir, X, 391, 1, Z),"&
"347 (CBSC_1, rad(9), bidir, X, 391, 1, Z),"&
"348 (CBSC_1, rad(11), bidir, X, 391, 1, Z),"&
"349 (CBSC_1, rad(12), bidir, X, 391, 1, Z),"&
"350 (CBSC_1, rad(8), bidir, X, 390, 1, Z),"&
"351 (CBSC_1, rad(13), bidir, X, 391, 1, Z),"&
"352 (CBSC_1, rad(14), bidir, X, 391, 1, Z),"&
"353 (CBSC_1, rad(16), bidir, X, 391, 1, Z),"&
"354 (BC_1, rale, output3, X, 403, 1, Z),"&
"355 (CBSC_1, rcez(1), bidir, X, 395, 1, Z),"&
"356 (CBSC_1, rcez(0), bidir, X, 394, 1, Z),"&
"357 (BC_4, p_clk, input, X),"&
"358 (BC_1, rwez, output3, X, 403, 1, Z),"&
"359 (BC_4, lcdinitz, input, X),"&
"360 (BC_1, roez, output3, X, 403, 1, Z),"&
"361 (BC_4, p_cclk, input, X),"&
"362 (BC_4, oncez, input, X),"&
"363 (CBSC_1, dq(32), bidir, X, 396, 1, Z),"&
"364 (BC_1, dclkout, output3, X, 403, 1, Z),"&
"365 (BC_4, dclkin, input, X),"&
"366 (CBSC_1, dq(36), bidir, X, 396, 1, Z),"&
"367 (CBSC_1, dq(0), bidir, X, 396, 1, Z),"&
"368 (CBSC_1, dq(33), bidir, X, 396, 1, Z),"&
"369 (CBSC_1, dq(1), bidir, X, 396, 1, Z),"&
"370 (CBSC_1, dq(34), bidir, X, 396, 1, Z),"&
"371 (CBSC_1, dq(2), bidir, X, 396, 1, Z),"&
"372 (CBSC_1, dq(35), bidir, X, 396, 1, Z),"&
"373 (CBSC_1, dq(3), bidir, X, 396, 1, Z),"&
"374 (CBSC_1, dq(6), bidir, X, 396, 1, Z),"&
"375 (CBSC_1, dq(4), bidir, X, 396, 1, Z),"&
"376 (CBSC_1, dq(38), bidir, X, 392, 1, Z),"&
"377 (CBSC_1, dq(5), bidir, X, 396, 1, Z),"&
"378 (CBSC_1, dq(8), bidir, X, 396, 1, Z),"&
"379 (CBSC_1, dq(40), bidir, X, 392, 1, Z),"&
"380 (CBSC_1, dq(37), bidir, X, 396, 1, Z),"&
"381 (CBSC_1, dq(39), bidir, X, 392, 1, Z),"&
"382 (CBSC_1, dq(7), bidir, X, 396, 1, Z),"&
"383 (CBSC_1, dq(9), bidir, X, 396, 1, Z),"&
"384 (CBSC_1, dq(10), bidir, X, 396, 1, Z),"&
"385 (CBSC_1, dq(41), bidir, X, 392, 1, Z),"&
"386 (CBSC_1, dq(11), bidir, X, 396, 1, Z),"&
"387 (CBSC_1, dq(42), bidir, X, 393, 1, Z),"&
"388 (BC_1, *, control, 1)," &
"389 (BC_1, *, control, 1)," &
"390 (BC_1, *, control, 1)," &
"391 (BC_1, *, control, 1)," &
"392 (BC_1, *, control, 1)," &
"393 (BC_1, *, control, 1)," &
"394 (BC_1, *, control, 1)," &
"395 (BC_1, *, control, 1)," &
"396 (BC_1, *, control, 1)," &
"397 (BC_1, *, control, 1)," &
"398 (BC_1, *, control, 1)," &
"399 (BC_1, *, control, 1)," &
"400 (BC_1, *, control, 1)," &
"401 (BC_1, *, control, 1)," &
"402 (BC_1, *, control, 1)," &
"403 (BC_1, *, control, 1)";
end RP2_Processor;