--
-- Boundary Scan Description Language (BSDL) File
-- Generated by: Viper version: 1.6.0 at: Tuesday, August 16, 2005 5:03:09 PM IST
--
-- Device: io_top
-- File Name: /project/835xbe/usr/vinodj/VIPER/Final_viper/JUL_15/JUL_20_probe/AUG_10/io_top_final.bsdl
-- File Created: August 16, 2005
-- Package Type: PBGA
--
entity io_top is
generic (PHYSICAL_PIN_MAP : string := "PBGA");
-- PORT DESCRIPTION TERMS
-- in = input only
-- out = three-state output (0, Z, 1)
-- buffer = two-state output (0, 1)
-- inout = bidirectional
-- linkage = OTHER (vdd, vss, analog)
--
-- bit = single pin
-- bit_vector = group of pins with suffix 0 to n
port (
AVDD1: linkage bit;
AVDD2: linkage bit;
AVDD3: linkage bit;
AVDD4: linkage bit;
CE_PA0: inout bit;
CE_PA1: inout bit;
CE_PA2: inout bit;
CE_PA3: inout bit;
CE_PA4: inout bit;
CE_PA5: inout bit;
CE_PA6: inout bit;
CE_PA7: inout bit;
CE_PA8: inout bit;
CE_PA9: inout bit;
CE_PA10: inout bit;
CE_PA11: inout bit;
CE_PA12: inout bit;
CE_PA13: inout bit;
CE_PA14: inout bit;
CE_PA15: inout bit;
CE_PA16: inout bit;
CE_PA17: inout bit;
CE_PA18: inout bit;
CE_PA19: inout bit;
CE_PA20: inout bit;
CE_PA21: inout bit;
CE_PA22: inout bit;
CE_PA23: inout bit;
CE_PA24: inout bit;
CE_PA25: inout bit;
CE_PA26: inout bit;
CE_PA27: inout bit;
CE_PA28: inout bit;
CE_PA29: inout bit;
CE_PA30: inout bit;
CE_PA31: inout bit;
CE_PB0: inout bit;
CE_PB1: inout bit;
CE_PB2: inout bit;
CE_PB3: inout bit;
CE_PB4: inout bit;
CE_PB5: inout bit;
CE_PB6: inout bit;
CE_PB7: inout bit;
CE_PB8: inout bit;
CE_PB9: inout bit;
CE_PB10: inout bit;
CE_PB11: inout bit;
CE_PB12: inout bit;
CE_PB13: inout bit;
CE_PB14: inout bit;
CE_PB15: inout bit;
CE_PB16: inout bit;
CE_PB17: inout bit;
CE_PB18: inout bit;
CE_PB19: inout bit;
CE_PB20: inout bit;
CE_PB21: inout bit;
CE_PB22: inout bit;
CE_PB23: inout bit;
CE_PB24: inout bit;
CE_PB25: inout bit;
CE_PB26: inout bit;
CE_PB27: inout bit;
CE_PB28: inout bit;
CE_PB29: inout bit;
CE_PB30: inout bit;
CE_PB31: inout bit;
CE_PC0: inout bit;
CE_PC1: inout bit;
CE_PC2: inout bit;
CE_PC3: inout bit;
CE_PC4: inout bit;
CE_PC5: inout bit;
CE_PC6: inout bit;
CE_PC7: inout bit;
CE_PC8: inout bit;
CE_PC9: inout bit;
CE_PC10: inout bit;
CE_PC11: inout bit;
CE_PC12: inout bit;
CE_PC13: inout bit;
CE_PC14: inout bit;
CE_PC15: inout bit;
CE_PC16: inout bit;
CE_PC17: inout bit;
CE_PC18: inout bit;
CE_PC19: inout bit;
CE_PC20: inout bit;
CE_PC21: inout bit;
CE_PC22: inout bit;
CE_PC23: inout bit;
CE_PC24: inout bit;
CE_PC25: inout bit;
CE_PC26: inout bit;
CE_PC27: inout bit;
CE_PC28: inout bit;
CE_PC29: inout bit;
CE_PC30: inout bit;
CE_PC31: inout bit;
CE_PD0: inout bit;
CE_PD1: inout bit;
CE_PD2: inout bit;
CE_PD3: inout bit;
CE_PD4: inout bit;
CE_PD5: inout bit;
CE_PD6: inout bit;
CE_PD7: inout bit;
CE_PD8: inout bit;
CE_PD9: inout bit;
CE_PD10: inout bit;
CE_PD11: inout bit;
CE_PD12: inout bit;
CE_PD13: inout bit;
CE_PD14: inout bit;
CE_PD15: inout bit;
CE_PD16: inout bit;
CE_PD17: inout bit;
CE_PD18: inout bit;
CE_PD19: inout bit;
CE_PD20: inout bit;
CE_PD21: inout bit;
CE_PD22: inout bit;
CE_PD23: inout bit;
CE_PD24: inout bit;
CE_PD25: inout bit;
CE_PD26: inout bit;
CE_PD27: inout bit;
CE_PD28: inout bit;
CE_PD29: inout bit;
CE_PD30: inout bit;
CE_PD31: inout bit;
CFG_CLKIN_DIV_B: in bit;
CFG_LBIU_MUX_EN: in bit;
CLKIN: in bit;
CLKIN_B: linkage bit;
GVDD: linkage bit_vector(0 to 20);
HRESET_B: inout bit;
IIC_SCL: inout bit;
IIC_SDA: inout bit;
IRQ_B0_MCP_IN_B: in bit;
IRQ_B1: inout bit;
IRQ_B2: in bit;
IRQ_B3: in bit;
IRQ_B4: in bit;
IRQ_B5: in bit;
IRQ_B6: inout bit;
IRQ_B7: in bit;
LA16: out bit;
LA17: out bit;
LA18: out bit;
LA19: out bit;
LA20: out bit;
LA21: out bit;
LA22: out bit;
LA23: out bit;
LA24: out bit;
LA25: out bit;
LAD0: inout bit;
LAD1: inout bit;
LAD2: inout bit;
LAD3: inout bit;
LAD4: inout bit;
LAD5: inout bit;
LAD6: inout bit;
LAD7: inout bit;
LAD8: inout bit;
LAD9: inout bit;
LAD10: inout bit;
LAD11: inout bit;
LAD12: inout bit;
LAD13: inout bit;
LAD14: inout bit;
LAD15: inout bit;
LALE: out bit;
LBCTL: out bit;
LCLK0: out bit;
LCLK1: out bit;
LCS_B0: out bit;
LCS_B1: out bit;
LCS_B2: out bit;
LCS_B3: out bit;
LGPL0: inout bit;
LGPL1: inout bit;
LGPL2: out bit;
LGPL3: inout bit;
LGPL4: inout bit;
LGPL5: out bit;
LWE_B0: out bit;
LWE_B1: out bit;
M66EN: in bit;
MCP_OUT_B: out bit;
MEMC_MA0: out bit;
MEMC_MA1: out bit;
MEMC_MA2: out bit;
MEMC_MA3: out bit;
MEMC_MA4: out bit;
MEMC_MA5: out bit;
MEMC_MA6: out bit;
MEMC_MA7: out bit;
MEMC_MA8: out bit;
MEMC_MA9: out bit;
MEMC_MA10: out bit;
MEMC_MA11: out bit;
MEMC_MA12: out bit;
MEMC_MA13: out bit;
MEMC_MBA0: out bit;
MEMC_MBA1: out bit;
MEMC_MBA2: out bit;
MEMC_MCAS_B: out bit;
MEMC_MCK: buffer bit;
MEMC_MCKE: buffer bit;
MEMC_MCK_B: buffer bit;
MEMC_MCS_B: out bit;
MEMC_MDM0: out bit;
MEMC_MDM1: out bit;
MEMC_MDM2: out bit;
MEMC_MDM3: out bit;
MEMC_MDQ0: inout bit;
MEMC_MDQ1: inout bit;
MEMC_MDQ2: inout bit;
MEMC_MDQ3: inout bit;
MEMC_MDQ4: inout bit;
MEMC_MDQ5: inout bit;
MEMC_MDQ6: inout bit;
MEMC_MDQ7: inout bit;
MEMC_MDQ8: inout bit;
MEMC_MDQ9: inout bit;
MEMC_MDQ10: inout bit;
MEMC_MDQ11: inout bit;
MEMC_MDQ12: inout bit;
MEMC_MDQ13: inout bit;
MEMC_MDQ14: inout bit;
MEMC_MDQ15: inout bit;
MEMC_MDQ16: inout bit;
MEMC_MDQ17: inout bit;
MEMC_MDQ18: inout bit;
MEMC_MDQ19: inout bit;
MEMC_MDQ20: inout bit;
MEMC_MDQ21: inout bit;
MEMC_MDQ22: inout bit;
MEMC_MDQ23: inout bit;
MEMC_MDQ24: inout bit;
MEMC_MDQ25: inout bit;
MEMC_MDQ26: inout bit;
MEMC_MDQ27: inout bit;
MEMC_MDQ28: inout bit;
MEMC_MDQ29: inout bit;
MEMC_MDQ30: inout bit;
MEMC_MDQ31: inout bit;
MEMC_MDQS0: inout bit;
MEMC_MDQS1: inout bit;
MEMC_MDQS2: inout bit;
MEMC_MDQS3: inout bit;
MEMC_MODT: buffer bit;
MEMC_MRAS_B: out bit;
MEMC_MWE_B: out bit;
MVREF1: linkage bit;
MVREF2: linkage bit;
NVDD: linkage bit_vector(0 to 53);
PCI_AD0: inout bit;
PCI_AD1: inout bit;
PCI_AD2: inout bit;
PCI_AD3: inout bit;
PCI_AD4: inout bit;
PCI_AD5: inout bit;
PCI_AD6: inout bit;
PCI_AD7: inout bit;
PCI_AD8: inout bit;
PCI_AD9: inout bit;
PCI_AD10: inout bit;
PCI_AD11: inout bit;
PCI_AD12: inout bit;
PCI_AD13: inout bit;
PCI_AD14: inout bit;
PCI_AD15: inout bit;
PCI_AD16: inout bit;
PCI_AD17: inout bit;
PCI_AD18: inout bit;
PCI_AD19: inout bit;
PCI_AD20: inout bit;
PCI_AD21: inout bit;
PCI_AD22: inout bit;
PCI_AD23: inout bit;
PCI_AD24: inout bit;
PCI_AD25: inout bit;
PCI_AD26: inout bit;
PCI_AD27: inout bit;
PCI_AD28: inout bit;
PCI_AD29: inout bit;
PCI_AD30: inout bit;
PCI_AD31: inout bit;
PCI_CLK0: out bit;
PCI_CLK1: out bit;
PCI_CLK2: out bit;
PCI_C_BE_B0: inout bit;
PCI_C_BE_B1: inout bit;
PCI_C_BE_B2: inout bit;
PCI_C_BE_B3: inout bit;
PCI_DEVSEL_B: inout bit;
PCI_FRAME_B: inout bit;
PCI_GNT_B0: inout bit;
PCI_GNT_B1: out bit;
PCI_GNT_B2: out bit;
PCI_IDSEL: in bit;
PCI_INTA: out bit;
PCI_IRDY_B: inout bit;
PCI_PAR: inout bit;
PCI_PERR_B: inout bit;
PCI_REQ_B0: inout bit;
PCI_REQ_B1: in bit;
PCI_REQ_B2: in bit;
PCI_RESET_OUT_B: buffer bit;
PCI_SERR_B: inout bit;
PCI_STOP_B: inout bit;
PCI_SYNC_IN: in bit;
PCI_SYNC_OUT: buffer bit;
PCI_TRDY_B: inout bit;
PORESET_B: in bit;
QUIESCE_B: buffer bit;
RTC_PIT_CLOCK: in bit;
SRESET_B: inout bit;
TCK: in bit;
TDI: in bit;
TDO: out bit;
TEST_MODE: in bit;
THERM0: linkage bit;
THERM1: linkage bit;
TMS: in bit;
TRST_B: in bit;
UART_CTS_B1: inout bit;
UART_CTS_B2: inout bit;
UART_RTS_B1: inout bit;
UART_RTS_B2: inout bit;
UART_SIN1: inout bit;
UART_SIN2: inout bit;
UART_SOUT1: inout bit;
UART_SOUT2: inout bit;
VDD: linkage bit_vector(0 to 27);
VSS: linkage bit_vector(0 to 74));
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of io_top: entity is "STD_1149_1_2001";
attribute PIN_MAP of io_top : entity is PHYSICAL_PIN_MAP;
constant PBGA : PIN_MAP_STRING :=
"AVDD1: P3," &
"AVDD2: AA1," &
"AVDD3: AB15," &
"AVDD4: C24," &
"CE_PA0: G3," &
"CE_PA1: F3," &
"CE_PA2: F2," &
"CE_PA3: E3," &
"CE_PA4: E2," &
"CE_PA5: E1," &
"CE_PA6: D3," &
"CE_PA7: D2," &
"CE_PA8: D1," &
"CE_PA9: C3," &
"CE_PA10: C2," &
"CE_PA11: C1," &
"CE_PA12: B1," &
"CE_PA13: H4," &
"CE_PA14: G4," &
"CE_PA15: J4," &
"CE_PA16: K24," &
"CE_PA17: K26," &
"CE_PA18: G25," &
"CE_PA19: G26," &
"CE_PA20: H25," &
"CE_PA21: H26," &
"CE_PA22: C25," &
"CE_PA23: C26," &
"CE_PA24: D25," &
"CE_PA25: D26," &
"CE_PA26: E26," &
"CE_PA27: F25," &
"CE_PA28: E25," &
"CE_PA29: J25," &
"CE_PA30: F26," &
"CE_PA31: J26," &
"CE_PB0: A13," &
"CE_PB1: B13," &
"CE_PB2: A14," &
"CE_PB3: B14," &
"CE_PB4: B8," &
"CE_PB5: A8," &
"CE_PB6: A9," &
"CE_PB7: B9," &
"CE_PB8: A11," &
"CE_PB9: B11," &
"CE_PB10: A10," &
"CE_PB11: A15," &
"CE_PB12: B12," &
"CE_PB13: B15," &
"CE_PB14: D9," &
"CE_PB15: D14," &
"CE_PB16: B16," &
"CE_PB17: D10," &
"CE_PB18: C10," &
"CE_PB19: C9," &
"CE_PB20: D8," &
"CE_PB21: C8," &
"CE_PB22: C15," &
"CE_PB23: C14," &
"CE_PB24: D13," &
"CE_PB25: C13," &
"CE_PB26: C12," &
"CE_PB27: D11," &
"CE_PB28: D12," &
"CE_PB29: D7," &
"CE_PB30: C11," &
"CE_PB31: C7," &
"CE_PC0: A18," &
"CE_PC1: A19," &
"CE_PC2: B18," &
"CE_PC3: B19," &
"CE_PC4: A24," &
"CE_PC5: B24," &
"CE_PC6: A23," &
"CE_PC7: B26," &
"CE_PC8: A21," &
"CE_PC9: B20," &
"CE_PC10: B21," &
"CE_PC11: A20," &
"CE_PC12: D19," &
"CE_PC13: C18," &
"CE_PC14: D18," &
"CE_PC15: A25," &
"CE_PC16: C21," &
"CE_PC17: D22," &
"CE_PC18: C23," &
"CE_PC19: D23," &
"CE_PC20: C17," &
"CE_PC21: D17," &
"CE_PC22: C16," &
"CE_PC23: D16," &
"CE_PC24: A16," &
"CE_PC25: D20," &
"CE_PC26: E23," &
"CE_PC27: B17," &
"CE_PC28: B22," &
"CE_PC29: A17," &
"CE_PC30: A22," &
"CE_PC31: C20," &
"CE_PD0: A2," &
"CE_PD1: B2," &
"CE_PD2: B3," &
"CE_PD3: A3," &
"CE_PD4: A4," &
"CE_PD5: B4," &
"CE_PD6: F24," &
"CE_PD7: G24," &
"CE_PD8: H24," &
"CE_PD9: D24," &
"CE_PD10: J24," &
"CE_PD11: B25," &
"CE_PD12: C4," &
"CE_PD13: D4," &
"CE_PD14: D5," &
"CE_PD15: A5," &
"CE_PD16: B5," &
"CE_PD17: C5," &
"CE_PD18: A6," &
"CE_PD19: B6," &
"CE_PD20: D21," &
"CE_PD21: C19," &
"CE_PD22: A7," &
"CE_PD23: B7," &
"CE_PD24: A12," &
"CE_PD25: B10," &
"CE_PD26: E4," &
"CE_PD27: F4," &
"CE_PD28: D15," &
"CE_PD29: C6," &
"CE_PD30: D6," &
"CE_PD31: E24," &
"CFG_CLKIN_DIV_B: F1," &
"CFG_LBIU_MUX_EN: M23," &
"CLKIN: R3," &
"CLKIN_B: P4," &
"GVDD: (AA8, AA10, AA11, AA13, AA14, AA16," &
"AA17, AA19, AA21, AC8, AB9, AB10," &
"AB11, AB12, AB14, AC18, AB18, AB20," &
"AB21, AC6, AC14)," &
"HRESET_B: AC23," &
"IIC_SCL: AF24," &
"IIC_SDA: AE24," &
"IRQ_B0_MCP_IN_B: AD26," &
"IRQ_B1: K1," &
"IRQ_B2: K2," &
"IRQ_B3: J2," &
"IRQ_B4: J1," &
"IRQ_B5: AE26," &
"IRQ_B6: AE25," &
"IRQ_B7: AF25," &
"LA16: K25," &
"LA17: L25," &
"LA18: L26," &
"LA19: L24," &
"LA20: M26," &
"LA21: M25," &
"LA22: N26," &
"LA23: AC24," &
"LA24: AC25," &
"LA25: AB23," &
"LAD0: N25," &
"LAD1: P26," &
"LAD2: P25," &
"LAD3: R26," &
"LAD4: R25," &
"LAD5: T26," &
"LAD6: T25," &
"LAD7: U25," &
"LAD8: M24," &
"LAD9: N24," &
"LAD10: P24," &
"LAD11: R24," &
"LAD12: T24," &
"LAD13: U24," &
"LAD14: U26," &
"LAD15: V26," &
"LALE: V24," &
"LBCTL: V25," &
"LCLK0: Y24," &
"LCLK1: Y25," &
"LCS_B0: AB24," &
"LCS_B1: AB25," &
"LCS_B2: AA23," &
"LCS_B3: AA24," &
"LGPL0: L23," &
"LGPL1: K23," &
"LGPL2: J23," &
"LGPL3: H23," &
"LGPL4: G23," &
"LGPL5: AC22," &
"LWE_B0: Y23," &
"LWE_B1: W25," &
"M66EN: L4," &
"MCP_OUT_B: AD25," &
"MEMC_MA0: AD12," &
"MEMC_MA1: AE12," &
"MEMC_MA2: AF12," &
"MEMC_MA3: AC13," &
"MEMC_MA4: AD13," &
"MEMC_MA5: AE13," &
"MEMC_MA6: AF13," &
"MEMC_MA7: AC15," &
"MEMC_MA8: AD15," &
"MEMC_MA9: AE15," &
"MEMC_MA10: AF15," &
"MEMC_MA11: AE16," &
"MEMC_MA12: AF16," &
"MEMC_MA13: AB16," &
"MEMC_MBA0: AD16," &
"MEMC_MBA1: AD17," &
"MEMC_MBA2: AE17," &
"MEMC_MCAS_B: AD11," &
"MEMC_MCK: AF14," &
"MEMC_MCKE: AD14," &
"MEMC_MCK_B: AE14," &
"MEMC_MCS_B: AC11," &
"MEMC_MDM0: AC9," &
"MEMC_MDM1: AD5," &
"MEMC_MDM2: AE20," &
"MEMC_MDM3: AE22," &
"MEMC_MDQ0: AE9," &
"MEMC_MDQ1: AD10," &
"MEMC_MDQ2: AF10," &
"MEMC_MDQ3: AF9," &
"MEMC_MDQ4: AF7," &
"MEMC_MDQ5: AE10," &
"MEMC_MDQ6: AD9," &
"MEMC_MDQ7: AF8," &
"MEMC_MDQ8: AE6," &
"MEMC_MDQ9: AD7," &
"MEMC_MDQ10: AF6," &
"MEMC_MDQ11: AC7," &
"MEMC_MDQ12: AD8," &
"MEMC_MDQ13: AE7," &
"MEMC_MDQ14: AD6," &
"MEMC_MDQ15: AF5," &
"MEMC_MDQ16: AD18," &
"MEMC_MDQ17: AE19," &
"MEMC_MDQ18: AF17," &
"MEMC_MDQ19: AF19," &
"MEMC_MDQ20: AF18," &
"MEMC_MDQ21: AE18," &
"MEMC_MDQ22: AF20," &
"MEMC_MDQ23: AD19," &
"MEMC_MDQ24: AD21," &
"MEMC_MDQ25: AF22," &
"MEMC_MDQ26: AC21," &
"MEMC_MDQ27: AF21," &
"MEMC_MDQ28: AE21," &
"MEMC_MDQ29: AD20," &
"MEMC_MDQ30: AF23," &
"MEMC_MDQ31: AD22," &
"MEMC_MDQS0: AE8," &
"MEMC_MDQS1: AE5," &
"MEMC_MDQS2: AC19," &
"MEMC_MDQS3: AE23," &
"MEMC_MODT: AF11," &
"MEMC_MRAS_B: AE11," &
"MEMC_MWE_B: AC17," &
"MVREF1: AB8," &
"MVREF2: AB17," &
"NVDD: (AB5, AB6, AC5, E5, E6, E8, E9, E10," &
"E12, E14, E15, E16, E18, E19, E20," &
"E22, F5, F6, F8, F10, F14, F16, F19," &
"F22, G22, H5, H6, H21, J5, J22, K21," &
"K22, L5, L6, L22, M5, M22, N5, N21," &
"N22, P6, P22, P23, R5, R23, T5, T21," &
"T22, U6, U22, V5, V22, W22, Y5)," &
"PCI_AD0: L1," &
"PCI_AD1: L2," &
"PCI_AD2: M1," &
"PCI_AD3: M2," &
"PCI_AD4: L3," &
"PCI_AD5: N1," &
"PCI_AD6: N2," &
"PCI_AD7: M3," &
"PCI_AD8: P1," &
"PCI_AD9: R1," &
"PCI_AD10: N3," &
"PCI_AD11: N4," &
"PCI_AD12: T1," &
"PCI_AD13: R2," &
"PCI_AD14: T2," &
"PCI_AD15: U1," &
"PCI_AD16: Y2," &
"PCI_AD17: Y1," &
"PCI_AD18: AA2," &
"PCI_AD19: AB1," &
"PCI_AD20: AB2," &
"PCI_AD21: Y4," &
"PCI_AD22: AC1," &
"PCI_AD23: AA3," &
"PCI_AD24: AA4," &
"PCI_AD25: AD1," &
"PCI_AD26: AD2," &
"PCI_AD27: AB3," &
"PCI_AD28: AB4," &
"PCI_AD29: AE1," &
"PCI_AD30: AC3," &
"PCI_AD31: AC4," &
"PCI_CLK0: T3," &
"PCI_CLK1: U2," &
"PCI_CLK2: R4," &
"PCI_C_BE_B0: M4," &
"PCI_C_BE_B1: T4," &
"PCI_C_BE_B2: Y3," &
"PCI_C_BE_B3: AC2," &
"PCI_DEVSEL_B: W3," &
"PCI_FRAME_B: W1," &
"PCI_GNT_B0: AD3," &
"PCI_GNT_B1: AE4," &
"PCI_GNT_B2: AF4," &
"PCI_IDSEL: P2," &
"PCI_INTA: AF2," &
"PCI_IRDY_B: W2," &
"PCI_PAR: U3," &
"PCI_PERR_B: V3," &
"PCI_REQ_B0: AD4," &
"PCI_REQ_B1: AE3," &
"PCI_REQ_B2: AF3," &
"PCI_RESET_OUT_B: AE2," &
"PCI_SERR_B: U4," &
"PCI_STOP_B: V4," &
"PCI_SYNC_IN: V2," &
"PCI_SYNC_OUT: V1," &
"PCI_TRDY_B: W4," &
"PORESET_B: AD23," &
"QUIESCE_B: T23," &
"RTC_PIT_CLOCK: U23," &
"SRESET_B: AD24," &
"TCK: W26," &
"TDI: Y26," &
"TDO: AA26," &
"TEST_MODE: N23," &
"THERM0: W23," &
"THERM1: W24," &
"TMS: AB26," &
"TRST_B: AC26," &
"UART_CTS_B1: H3," &
"UART_CTS_B2: J3," &
"UART_RTS_B1: K3," &
"UART_RTS_B2: K4," &
"UART_SIN1: G2," &
"UART_SIN2: H1," &
"UART_SOUT1: G1," &
"UART_SOUT2: H2," &
"VDD: (K10, K11, K12, K13, K14, K15, K16," &
"K17, L10, L17, M10, M17, N10, N17," &
"P10, P17, R10, R17, T10, T17, U10," &
"U11, U12, U13, U14, U15, U16, U17)," &
"VSS: (AA6, AA22, AA25, AB19, AB22, AC10," &
"F11, F13, F17, F21, F23, K6, L11," &
"L12, L13, L14, L15, L16, L21, M11," &
"M12, M13, M14, M15, M16, N6, N11," &
"N12, N13, N14, N15, N16, P11, P12," &
"P13, P14, P15, P16, P21, R11, R12," &
"R13, R14, R15, R16, T6, T11, T12," &
"T13, T14, T15, T16, U21, W6, W21," &
"E7, E11, E13, E17, E21, G5, H22," &
"K5, P5, R22, U5, V23, W5, AA5, AB7," &
"AB13, AC16, AC12, Y22, AC20)" ;
attribute TAP_SCAN_OUT of TDO: signal is true;
attribute TAP_SCAN_CLOCK of TCK: signal is (50.0e6, BOTH);
attribute TAP_SCAN_RESET of TRST_B: signal is true;
attribute TAP_SCAN_MODE of TMS: signal is true;
attribute TAP_SCAN_IN of TDI: signal is true;
attribute COMPLIANCE_PATTERNS of io_top: entity is
"(TEST_MODE) (0)";
attribute INSTRUCTION_LENGTH of io_top: entity is 8;
attribute INSTRUCTION_OPCODE of io_top: entity is
"HIGHZ (11110010)," &
"PRIVATE009 (11111010)," &
"PRIVATE008 (00000011)," &
"PRIVATE007 (00001001)," &
"PRIVATE006 (10010011)," &
"PRIVATE049 (01110011)," &
"PRIVATE005 (10010010)," &
"PRIVATE048 (01110010)," &
"PRIVATE004 (10010001)," &
"PRIVATE047 (01110001)," &
"PRIVATE003 (10010000)," &
"PRIVATE046 (01110000)," &
"PRIVATE002 (00000101)," &
"PRIVATE045 (00010100)," &
"PRIVATE001 (11111110)," &
"PRIVATE044 (00010011)," &
"PRIVATE043 (00010010)," &
"PRIVATE042 (00010001)," &
"PRIVATE041 (00010000)," &
"PRELOAD (11110000)," &
"PRIVATE040 (01101011)," &
"BYPASS (11111111)," &
"PRIVATE039 (01101010)," &
"PRIVATE038 (01101001)," &
"PRIVATE037 (01101000)," &
"PRIVATE036 (01100111)," &
"PRIVATE035 (01100110)," &
"PRIVATE034 (01100101)," &
"PRIVATE033 (01100100)," &
"PRIVATE032 (01100011)," &
"PRIVATE031 (01100010)," &
"PRIVATE030 (01100001)," &
"EXTEST (00000000)," &
"PRIVATE029 (01100000)," &
"PRIVATE028 (01001111)," &
"PRIVATE027 (01001110)," &
"PRIVATE026 (01001101)," &
"PRIVATE025 (01001100)," &
"PRIVATE024 (01001011)," &
"PRIVATE023 (01001010)," &
"PRIVATE022 (01001001)," &
"PRIVATE021 (01001000)," &
"PRIVATE020 (01000111)," &
"SAMPLE (11110000)," &
"PRIVATE062 (11110100)," &
"PRIVATE061 (00110000)," &
"PRIVATE060 (10000011)," &
"CLAMP (11110001)," &
"PRIVATE019 (01000110)," &
"PRIVATE018 (01000101)," &
"PRIVATE017 (01000100)," &
"PRIVATE016 (00110110)," &
"PRIVATE059 (10000010)," &
"PRIVATE015 (00110101)," &
"PRIVATE058 (10000001)," &
"PRIVATE014 (00110100)," &
"PRIVATE057 (10000000)," &
"PRIVATE013 (00110011)," &
"PRIVATE056 (01111010)," &
"PRIVATE012 (00110001)," &
"PRIVATE055 (01111001)," &
"PRIVATE011 (00001010)," &
"PRIVATE054 (01111000)," &
"PRIVATE010 (00000100)," &
"PRIVATE053 (01110111)," &
"PRIVATE052 (01110110)," &
"PRIVATE051 (01110101)," &
"PRIVATE050 (01110100)," &
"IDCODE (11110011)";
attribute INSTRUCTION_CAPTURE of io_top : entity is
"00100001 ";
attribute INSTRUCTION_PRIVATE of io_top : entity is
"PRIVATE001 ," &
"PRIVATE002 ," &
"PRIVATE003 ," &
"PRIVATE004 ," &
"PRIVATE005 ," &
"PRIVATE006 ," &
"PRIVATE007 ," &
"PRIVATE008 ," &
"PRIVATE009 ," &
"PRIVATE010 ," &
"PRIVATE011 ," &
"PRIVATE012 ," &
"PRIVATE013 ," &
"PRIVATE014 ," &
"PRIVATE015 ," &
"PRIVATE016 ," &
"PRIVATE017 ," &
"PRIVATE018 ," &
"PRIVATE019 ," &
"PRIVATE020 ," &
"PRIVATE021 ," &
"PRIVATE022 ," &
"PRIVATE023 ," &
"PRIVATE024 ," &
"PRIVATE025 ," &
"PRIVATE026 ," &
"PRIVATE027 ," &
"PRIVATE028 ," &
"PRIVATE029 ," &
"PRIVATE030 ," &
"PRIVATE031 ," &
"PRIVATE032 ," &
"PRIVATE033 ," &
"PRIVATE034 ," &
"PRIVATE035 ," &
"PRIVATE036 ," &
"PRIVATE037 ," &
"PRIVATE038 ," &
"PRIVATE039 ," &
"PRIVATE040 ," &
"PRIVATE041 ," &
"PRIVATE042 ," &
"PRIVATE043 ," &
"PRIVATE044 ," &
"PRIVATE045 ," &
"PRIVATE046 ," &
"PRIVATE047 ," &
"PRIVATE048 ," &
"PRIVATE049 ," &
"PRIVATE050 ," &
"PRIVATE051 ," &
"PRIVATE052 ," &
"PRIVATE053 ," &
"PRIVATE054 ," &
"PRIVATE055 ," &
"PRIVATE056 ," &
"PRIVATE057 ," &
"PRIVATE058 ," &
"PRIVATE059 ," &
"PRIVATE060 ," &
"PRIVATE061 ," &
"PRIVATE062 ";
attribute IDCODE_REGISTER of io_top : entity is
"0000" & -- Version
"011010" & -- Design Center Number
"0110000010" & -- Sequence Number
"00000001110" & -- Manufacturer Identity
"1"; -- IEEE 1149.1 Requirement
attribute BOUNDARY_LENGTH of io_top : entity is 644;
attribute BOUNDARY_REGISTER of io_top : entity is
-- BSR DESCRIPTION TERMS
-- cell type = BC_0 - BC_99
-- port = port name
-- function
-- input = input only
-- bidir = bidirectional
-- output2 = two state ouput
-- output3 = three state ouput
-- control = control cell
-- controlr = control cell
-- internal = placeholder cell
-- safe = value that turns off drivers in control cells
-- ccell = controlling cell number for I/O direction
-- dsval = disabling (input) value
-- rslt = result if disabled (input = Z)
--
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: iod_1; Pad Name: memc_mdqs3
"0 (BC_2, *, control, 0)," &
"1 (BC_7, MEMC_MDQS3, bidir, X, 0, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_2; Pad Name: memc_mdq30
"2 (BC_2, *, control, 0)," &
"3 (BC_7, MEMC_MDQ30, bidir, X, 2, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_3; Pad Name: memc_mdq31
"4 (BC_2, *, control, 0)," &
"5 (BC_7, MEMC_MDQ31, bidir, X, 4, 0, Z)," &
-- output3 Buffer; Netlist Instance: iod_4; Pad Name: memc_mdm3
"6 (BC_2, *, control, 0)," &
"7 (BC_1, MEMC_MDM3, output3, X, 6, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_5; Pad Name: memc_mdq25
"8 (BC_2, *, control, 0)," &
"9 (BC_7, MEMC_MDQ25, bidir, X, 8, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_7; Pad Name: memc_mdq24
"10 (BC_2, *, control, 0)," &
"11 (BC_7, MEMC_MDQ24, bidir, X, 10, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_8; Pad Name: memc_mdq26
"12 (BC_2, *, control, 0)," &
"13 (BC_7, MEMC_MDQ26, bidir, X, 12, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_9; Pad Name: memc_mdq28
"14 (BC_2, *, control, 0)," &
"15 (BC_7, MEMC_MDQ28, bidir, X, 14, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_10; Pad Name: memc_mdq27
"16 (BC_2, *, control, 0)," &
"17 (BC_7, MEMC_MDQ27, bidir, X, 16, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_11; Pad Name: memc_mdq29
"18 (BC_2, *, control, 0)," &
"19 (BC_7, MEMC_MDQ29, bidir, X, 18, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- output3 Buffer; Netlist Instance: iod_13; Pad Name: memc_mdm2
"20 (BC_2, *, control, 0)," &
"21 (BC_1, MEMC_MDM2, output3, X, 20, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_14; Pad Name: memc_mdq22
"22 (BC_2, *, control, 0)," &
"23 (BC_7, MEMC_MDQ22, bidir, X, 22, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_15; Pad Name: memc_mdq23
"24 (BC_2, *, control, 0)," &
"25 (BC_7, MEMC_MDQ23, bidir, X, 24, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_17; Pad Name: memc_mdqs2
"26 (BC_2, *, control, 0)," &
"27 (BC_7, MEMC_MDQS2, bidir, X, 26, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_18; Pad Name: memc_mdq17
"28 (BC_2, *, control, 0)," &
"29 (BC_7, MEMC_MDQ17, bidir, X, 28, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_19; Pad Name: memc_mdq19
"30 (BC_2, *, control, 0)," &
"31 (BC_7, MEMC_MDQ19, bidir, X, 30, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_21; Pad Name: memc_mdq16
"32 (BC_2, *, control, 0)," &
"33 (BC_7, MEMC_MDQ16, bidir, X, 32, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_23; Pad Name: memc_mdq21
"34 (BC_2, *, control, 0)," &
"35 (BC_7, MEMC_MDQ21, bidir, X, 34, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_24; Pad Name: memc_mdq20
"36 (BC_2, *, control, 0)," &
"37 (BC_7, MEMC_MDQ20, bidir, X, 36, 0, Z)," &
-- output3 Buffer; Netlist Instance: iod_26; Pad Name: memc_mwe_b
"38 (BC_2, *, control, 0)," &
"39 (BC_1, MEMC_MWE_B, output3, X, 38, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- output3 Buffer; Netlist Instance: iod_27; Pad Name: memc_mba1
"40 (BC_2, *, control, 0)," &
"41 (BC_1, MEMC_MBA1, output3, X, 40, 0, Z)," &
-- output3 Buffer; Netlist Instance: iod_28; Pad Name: memc_mba2
"42 (BC_2, *, control, 0)," &
"43 (BC_1, MEMC_MBA2, output3, X, 42, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_29; Pad Name: memc_mdq18
"44 (BC_2, *, control, 0)," &
"45 (BC_7, MEMC_MDQ18, bidir, X, 44, 0, Z)," &
-- output3 Buffer; Netlist Instance: iod_30; Pad Name: memc_ma13
"46 (BC_2, *, control, 0)," &
"47 (BC_1, MEMC_MA13, output3, X, 46, 0, Z)," &
-- output3 Buffer; Netlist Instance: iod_32; Pad Name: memc_mba0
"48 (BC_2, *, control, 0)," &
"49 (BC_1, MEMC_MBA0, output3, X, 48, 0, Z)," &
-- output3 Buffer; Netlist Instance: iod_34; Pad Name: memc_ma11
"50 (BC_2, *, control, 0)," &
"51 (BC_1, MEMC_MA11, output3, X, 50, 0, Z)," &
-- output3 Buffer; Netlist Instance: iod_35; Pad Name: memc_ma12
"52 (BC_2, *, control, 0)," &
"53 (BC_1, MEMC_MA12, output3, X, 52, 0, Z)," &
-- output3 Buffer; Netlist Instance: iod_36; Pad Name: memc_ma7
"54 (BC_2, *, control, 0)," &
"55 (BC_1, MEMC_MA7, output3, X, 54, 0, Z)," &
-- output3 Buffer; Netlist Instance: iod_38; Pad Name: memc_ma8
"56 (BC_2, *, control, 0)," &
"57 (BC_1, MEMC_MA8, output3, X, 56, 0, Z)," &
-- output3 Buffer; Netlist Instance: iod_39; Pad Name: memc_ma9
"58 (BC_2, *, control, 0)," &
"59 (BC_1, MEMC_MA9, output3, X, 58, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- output3 Buffer; Netlist Instance: iod_40; Pad Name: memc_ma10
"60 (BC_2, *, control, 0)," &
"61 (BC_1, MEMC_MA10, output3, X, 60, 0, Z)," &
-- output2 Buffer; Netlist Instance: iod_41; Pad Name: memc_mcke
"62 (BC_2, *, internal, X)," &
"63 (BC_1, MEMC_MCKE, output2, X)," &
-- output2 Buffer; Netlist Instance: iod_42; Pad Name: memc_mck_b
"64 (BC_2, *, internal, X)," &
"65 (BC_1, MEMC_MCK_B, output2, X)," &
-- output2 Buffer; Netlist Instance: iod_44; Pad Name: memc_mck
"66 (BC_2, *, internal, X)," &
"67 (BC_1, MEMC_MCK, output2, X)," &
-- output3 Buffer; Netlist Instance: iod_45; Pad Name: memc_ma6
"68 (BC_2, *, control, 0)," &
"69 (BC_1, MEMC_MA6, output3, X, 68, 0, Z)," &
-- output3 Buffer; Netlist Instance: iod_46; Pad Name: memc_ma5
"70 (BC_2, *, control, 0)," &
"71 (BC_1, MEMC_MA5, output3, X, 70, 0, Z)," &
-- output3 Buffer; Netlist Instance: iod_48; Pad Name: memc_ma4
"72 (BC_2, *, control, 0)," &
"73 (BC_1, MEMC_MA4, output3, X, 72, 0, Z)," &
-- output3 Buffer; Netlist Instance: iod_49; Pad Name: memc_ma3
"74 (BC_2, *, control, 0)," &
"75 (BC_1, MEMC_MA3, output3, X, 74, 0, Z)," &
-- output3 Buffer; Netlist Instance: iod_50; Pad Name: memc_ma2
"76 (BC_2, *, control, 0)," &
"77 (BC_1, MEMC_MA2, output3, X, 76, 0, Z)," &
-- output3 Buffer; Netlist Instance: iod_51; Pad Name: memc_ma1
"78 (BC_2, *, control, 0)," &
"79 (BC_1, MEMC_MA1, output3, X, 78, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- output3 Buffer; Netlist Instance: iod_52; Pad Name: memc_ma0
"80 (BC_2, *, control, 0)," &
"81 (BC_1, MEMC_MA0, output3, X, 80, 0, Z)," &
-- output2 Buffer; Netlist Instance: iod_54; Pad Name: memc_modt
"82 (BC_2, *, internal, X)," &
"83 (BC_1, MEMC_MODT, output2, X)," &
-- output3 Buffer; Netlist Instance: iod_55; Pad Name: memc_mras_b
"84 (BC_2, *, control, 0)," &
"85 (BC_1, MEMC_MRAS_B, output3, X, 84, 0, Z)," &
-- output3 Buffer; Netlist Instance: iod_56; Pad Name: memc_mcas_b
"86 (BC_2, *, control, 0)," &
"87 (BC_1, MEMC_MCAS_B, output3, X, 86, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_58; Pad Name: memc_mdq2
"88 (BC_2, *, control, 0)," &
"89 (BC_7, MEMC_MDQ2, bidir, X, 88, 0, Z)," &
-- output3 Buffer; Netlist Instance: iod_59; Pad Name: memc_mcs_b
"90 (BC_2, *, control, 0)," &
"91 (BC_1, MEMC_MCS_B, output3, X, 90, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_60; Pad Name: memc_mdq5
"92 (BC_2, *, control, 0)," &
"93 (BC_7, MEMC_MDQ5, bidir, X, 92, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_61; Pad Name: memc_mdq1
"94 (BC_2, *, control, 0)," &
"95 (BC_7, MEMC_MDQ1, bidir, X, 94, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_62; Pad Name: memc_mdq3
"96 (BC_2, *, control, 0)," &
"97 (BC_7, MEMC_MDQ3, bidir, X, 96, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_64; Pad Name: memc_mdq0
"98 (BC_2, *, control, 0)," &
"99 (BC_7, MEMC_MDQ0, bidir, X, 98, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: iod_65; Pad Name: memc_mdq6
"100 (BC_2, *, control, 0)," &
"101 (BC_7, MEMC_MDQ6, bidir, X, 100, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_66; Pad Name: memc_mdq7
"102 (BC_2, *, control, 0)," &
"103 (BC_7, MEMC_MDQ7, bidir, X, 102, 0, Z)," &
-- output3 Buffer; Netlist Instance: iod_68; Pad Name: memc_mdm0
"104 (BC_2, *, control, 0)," &
"105 (BC_1, MEMC_MDM0, output3, X, 104, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_69; Pad Name: memc_mdqs0
"106 (BC_2, *, control, 0)," &
"107 (BC_7, MEMC_MDQS0, bidir, X, 106, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_70; Pad Name: memc_mdq12
"108 (BC_2, *, control, 0)," &
"109 (BC_7, MEMC_MDQ12, bidir, X, 108, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_71; Pad Name: memc_mdq4
"110 (BC_2, *, control, 0)," &
"111 (BC_7, MEMC_MDQ4, bidir, X, 110, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_73; Pad Name: memc_mdq13
"112 (BC_2, *, control, 0)," &
"113 (BC_7, MEMC_MDQ13, bidir, X, 112, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_74; Pad Name: memc_mdq9
"114 (BC_2, *, control, 0)," &
"115 (BC_7, MEMC_MDQ9, bidir, X, 114, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_75; Pad Name: memc_mdq10
"116 (BC_2, *, control, 0)," &
"117 (BC_7, MEMC_MDQ10, bidir, X, 116, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_77; Pad Name: memc_mdq8
"118 (BC_2, *, control, 0)," &
"119 (BC_7, MEMC_MDQ8, bidir, X, 118, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: iod_78; Pad Name: memc_mdq11
"120 (BC_2, *, control, 0)," &
"121 (BC_7, MEMC_MDQ11, bidir, X, 120, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_79; Pad Name: memc_mdq14
"122 (BC_2, *, control, 0)," &
"123 (BC_7, MEMC_MDQ14, bidir, X, 122, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_80; Pad Name: memc_mdq15
"124 (BC_2, *, control, 0)," &
"125 (BC_7, MEMC_MDQ15, bidir, X, 124, 0, Z)," &
-- bidir Buffer; Netlist Instance: iod_81; Pad Name: memc_mdqs1
"126 (BC_2, *, control, 0)," &
"127 (BC_7, MEMC_MDQS1, bidir, X, 126, 0, Z)," &
-- output3 Buffer; Netlist Instance: iod_82; Pad Name: memc_mdm1
"128 (BC_2, *, control, 0)," &
"129 (BC_1, MEMC_MDM1, output3, X, 128, 0, Z)," &
-- output3 Buffer; Netlist Instance: iol_2; Pad Name: pci_gnt_b2
"130 (BC_2, *, control, 0)," &
"131 (BC_1, PCI_GNT_B2, output3, X, 130, 0, Z)," &
-- output3 Buffer; Netlist Instance: iol_3; Pad Name: pci_gnt_b1
"132 (BC_2, *, control, 0)," &
"133 (BC_1, PCI_GNT_B1, output3, X, 132, 0, Z)," &
-- input Buffer; Netlist Instance: iol_4; Pad Name: pci_req_b2
"134 (BC_2, *, internal, X)," &
"135 (BC_2, PCI_REQ_B2, input, X)," &
-- output3 Buffer; Netlist Instance: iol_5; Pad Name: pci_inta
"136 (BC_2, *, control, 0)," &
"137 (BC_1, PCI_INTA, output3, X, 136, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_6; Pad Name: pci_req_b0
"138 (BC_2, *, control, 0)," &
"139 (BC_7, PCI_REQ_B0, bidir, X, 138, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- input Buffer; Netlist Instance: iol_7; Pad Name: pci_req_b1
"140 (BC_2, *, internal, X)," &
"141 (BC_2, PCI_REQ_B1, input, X)," &
-- bidir Buffer; Netlist Instance: iol_8; Pad Name: pci_ad29
"142 (BC_2, *, control, 0)," &
"143 (BC_7, PCI_AD29, bidir, X, 142, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_9; Pad Name: pci_ad31
"144 (BC_2, *, control, 0)," &
"145 (BC_7, PCI_AD31, bidir, X, 144, 0, Z)," &
-- output2 Buffer; Netlist Instance: iol_10; Pad Name: pci_reset_out_b
"146 (BC_2, *, internal, X)," &
"147 (BC_1, PCI_RESET_OUT_B, output2, X)," &
-- bidir Buffer; Netlist Instance: iol_11; Pad Name: pci_ad28
"148 (BC_2, *, control, 0)," &
"149 (BC_7, PCI_AD28, bidir, X, 148, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_12; Pad Name: pci_gnt_b0
"150 (BC_2, *, control, 0)," &
"151 (BC_7, PCI_GNT_B0, bidir, X, 150, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_13; Pad Name: pci_ad26
"152 (BC_2, *, control, 0)," &
"153 (BC_7, PCI_AD26, bidir, X, 152, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_14; Pad Name: pci_ad24
"154 (BC_2, *, control, 0)," &
"155 (BC_7, PCI_AD24, bidir, X, 154, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_15; Pad Name: pci_ad30
"156 (BC_2, *, control, 0)," &
"157 (BC_7, PCI_AD30, bidir, X, 156, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_16; Pad Name: pci_ad27
"158 (BC_2, *, control, 0)," &
"159 (BC_7, PCI_AD27, bidir, X, 158, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: iol_17; Pad Name: pci_ad25
"160 (BC_2, *, control, 0)," &
"161 (BC_7, PCI_AD25, bidir, X, 160, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_18; Pad Name: pci_ad21
"162 (BC_2, *, control, 0)," &
"163 (BC_7, PCI_AD21, bidir, X, 162, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_19; Pad Name: pci_c_be_b3
"164 (BC_2, *, control, 0)," &
"165 (BC_7, PCI_C_BE_B3, bidir, X, 164, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_20; Pad Name: pci_ad23
"166 (BC_2, *, control, 0)," &
"167 (BC_7, PCI_AD23, bidir, X, 166, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_21; Pad Name: pci_ad22
"168 (BC_2, *, control, 0)," &
"169 (BC_7, PCI_AD22, bidir, X, 168, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_22; Pad Name: pci_trdy_b
"170 (BC_2, *, control, 0)," &
"171 (BC_7, PCI_TRDY_B, bidir, X, 170, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_23; Pad Name: pci_ad20
"172 (BC_2, *, control, 0)," &
"173 (BC_7, PCI_AD20, bidir, X, 172, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_24; Pad Name: pci_stop_b
"174 (BC_2, *, control, 0)," &
"175 (BC_7, PCI_STOP_B, bidir, X, 174, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_25; Pad Name: pci_c_be_b2
"176 (BC_2, *, control, 0)," &
"177 (BC_7, PCI_C_BE_B2, bidir, X, 176, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_26; Pad Name: pci_ad19
"178 (BC_2, *, control, 0)," &
"179 (BC_7, PCI_AD19, bidir, X, 178, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: iol_27; Pad Name: pci_ad18
"180 (BC_2, *, control, 0)," &
"181 (BC_7, PCI_AD18, bidir, X, 180, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_28; Pad Name: pci_devsel_b
"182 (BC_2, *, control, 0)," &
"183 (BC_7, PCI_DEVSEL_B, bidir, X, 182, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_30; Pad Name: pci_ad16
"184 (BC_2, *, control, 0)," &
"185 (BC_7, PCI_AD16, bidir, X, 184, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_31; Pad Name: pci_ad17
"186 (BC_2, *, control, 0)," &
"187 (BC_7, PCI_AD17, bidir, X, 186, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_32; Pad Name: pci_serr_b
"188 (BC_2, *, control, 0)," &
"189 (BC_7, PCI_SERR_B, bidir, X, 188, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_33; Pad Name: pci_perr_b
"190 (BC_2, *, control, 0)," &
"191 (BC_7, PCI_PERR_B, bidir, X, 190, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_34; Pad Name: pci_irdy_b
"192 (BC_2, *, control, 0)," &
"193 (BC_7, PCI_IRDY_B, bidir, X, 192, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_35; Pad Name: pci_c_be_b1
"194 (BC_2, *, control, 0)," &
"195 (BC_7, PCI_C_BE_B1, bidir, X, 194, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_36; Pad Name: pci_frame_b
"196 (BC_2, *, control, 0)," &
"197 (BC_7, PCI_FRAME_B, bidir, X, 196, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_37; Pad Name: pci_par
"198 (BC_2, *, control, 0)," &
"199 (BC_7, PCI_PAR, bidir, X, 198, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- input Buffer; Netlist Instance: iol_38; Pad Name: pci_sync_in
"200 (BC_2, *, internal, X)," &
"201 (BC_2, PCI_SYNC_IN, input, X)," &
-- output3 Buffer; Netlist Instance: iol_39; Pad Name: pci_clk0
"202 (BC_2, *, control, 0)," &
"203 (BC_1, PCI_CLK0, output3, X, 202, 0, Z)," &
-- output3 Buffer; Netlist Instance: iol_40; Pad Name: pci_clk2
"204 (BC_2, *, control, 0)," &
"205 (BC_1, PCI_CLK2, output3, X, 204, 0, Z)," &
-- output3 Buffer; Netlist Instance: iol_41; Pad Name: pci_clk1
"206 (BC_2, *, control, 0)," &
"207 (BC_1, PCI_CLK1, output3, X, 206, 0, Z)," &
-- output2 Buffer; Netlist Instance: iol_42; Pad Name: pci_sync_out
"208 (BC_2, *, internal, X)," &
"209 (BC_1, PCI_SYNC_OUT, output2, X)," &
-- input Buffer; Netlist Instance: iol_43; Pad Name: clkin
"210 (BC_2, *, internal, X)," &
"211 (BC_2, CLKIN, input, X)," &
-- bidir Buffer; Netlist Instance: iol_45; Pad Name: pci_ad14
"212 (BC_2, *, control, 0)," &
"213 (BC_7, PCI_AD14, bidir, X, 212, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_46; Pad Name: pci_ad15
"214 (BC_2, *, control, 0)," &
"215 (BC_7, PCI_AD15, bidir, X, 214, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_48; Pad Name: pci_ad13
"216 (BC_2, *, control, 0)," &
"217 (BC_7, PCI_AD13, bidir, X, 216, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_49; Pad Name: pci_ad12
"218 (BC_2, *, control, 0)," &
"219 (BC_7, PCI_AD12, bidir, X, 218, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: iol_50; Pad Name: pci_ad9
"220 (BC_2, *, control, 0)," &
"221 (BC_7, PCI_AD9, bidir, X, 220, 0, Z)," &
-- input Buffer; Netlist Instance: iol_51; Pad Name: pci_idsel
"222 (BC_2, *, internal, X)," &
"223 (BC_2, PCI_IDSEL, input, X)," &
-- bidir Buffer; Netlist Instance: iol_52; Pad Name: pci_ad8
"224 (BC_2, *, control, 0)," &
"225 (BC_7, PCI_AD8, bidir, X, 224, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_53; Pad Name: pci_ad11
"226 (BC_2, *, control, 0)," &
"227 (BC_7, PCI_AD11, bidir, X, 226, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_54; Pad Name: pci_ad10
"228 (BC_2, *, control, 0)," &
"229 (BC_7, PCI_AD10, bidir, X, 228, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_55; Pad Name: pci_ad6
"230 (BC_2, *, control, 0)," &
"231 (BC_7, PCI_AD6, bidir, X, 230, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_56; Pad Name: pci_ad5
"232 (BC_2, *, control, 0)," &
"233 (BC_7, PCI_AD5, bidir, X, 232, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_57; Pad Name: pci_c_be_b0
"234 (BC_2, *, control, 0)," &
"235 (BC_7, PCI_C_BE_B0, bidir, X, 234, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_58; Pad Name: pci_ad7
"236 (BC_2, *, control, 0)," &
"237 (BC_7, PCI_AD7, bidir, X, 236, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_59; Pad Name: pci_ad3
"238 (BC_2, *, control, 0)," &
"239 (BC_7, PCI_AD3, bidir, X, 238, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: iol_60; Pad Name: pci_ad2
"240 (BC_2, *, control, 0)," &
"241 (BC_7, PCI_AD2, bidir, X, 240, 0, Z)," &
-- input Buffer; Netlist Instance: iol_61; Pad Name: m66en
"242 (BC_2, *, internal, X)," &
"243 (BC_2, M66EN, input, X)," &
-- bidir Buffer; Netlist Instance: iol_62; Pad Name: pci_ad4
"244 (BC_2, *, control, 0)," &
"245 (BC_7, PCI_AD4, bidir, X, 244, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_63; Pad Name: pci_ad1
"246 (BC_2, *, control, 0)," &
"247 (BC_7, PCI_AD1, bidir, X, 246, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_64; Pad Name: pci_ad0
"248 (BC_2, *, control, 0)," &
"249 (BC_7, PCI_AD0, bidir, X, 248, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_65; Pad Name: uart_rts_b1
"250 (BC_2, *, control, 0)," &
"251 (BC_7, UART_RTS_B1, bidir, X, 250, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_66; Pad Name: uart_rts_b2
"252 (BC_2, *, control, 0)," &
"253 (BC_7, UART_RTS_B2, bidir, X, 252, 0, Z)," &
-- input Buffer; Netlist Instance: iol_67; Pad Name: irq_b2
"254 (BC_2, *, internal, X)," &
"255 (BC_2, IRQ_B2, input, X)," &
-- bidir Buffer; Netlist Instance: iol_68; Pad Name: irq_b1
"256 (BC_2, *, control, 0)," &
"257 (BC_7, IRQ_B1, bidir, X, 256, 0, Z)," &
-- input Buffer; Netlist Instance: iol_69; Pad Name: irq_b3
"258 (BC_2, *, internal, X)," &
"259 (BC_2, IRQ_B3, input, X)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: iol_70; Pad Name: uart_cts_b2
"260 (BC_2, *, control, 0)," &
"261 (BC_7, UART_CTS_B2, bidir, X, 260, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_71; Pad Name: ce_pa15
"262 (BC_2, *, control, 0)," &
"263 (BC_7, CE_PA15, bidir, X, 262, 0, Z)," &
-- input Buffer; Netlist Instance: iol_72; Pad Name: irq_b4
"264 (BC_2, *, internal, X)," &
"265 (BC_2, IRQ_B4, input, X)," &
-- bidir Buffer; Netlist Instance: iol_73; Pad Name: uart_sin2
"266 (BC_2, *, control, 0)," &
"267 (BC_7, UART_SIN2, bidir, X, 266, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_74; Pad Name: uart_sout2
"268 (BC_2, *, control, 0)," &
"269 (BC_7, UART_SOUT2, bidir, X, 268, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_75; Pad Name: uart_cts_b1
"270 (BC_2, *, control, 0)," &
"271 (BC_7, UART_CTS_B1, bidir, X, 270, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_76; Pad Name: ce_pa13
"272 (BC_2, *, control, 0)," &
"273 (BC_7, CE_PA13, bidir, X, 272, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_77; Pad Name: uart_sout1
"274 (BC_2, *, control, 0)," &
"275 (BC_7, UART_SOUT1, bidir, X, 274, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_78; Pad Name: uart_sin1
"276 (BC_2, *, control, 0)," &
"277 (BC_7, UART_SIN1, bidir, X, 276, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_79; Pad Name: ce_pa0
"278 (BC_2, *, control, 0)," &
"279 (BC_7, CE_PA0, bidir, X, 278, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: iol_80; Pad Name: ce_pa14
"280 (BC_2, *, control, 0)," &
"281 (BC_7, CE_PA14, bidir, X, 280, 0, Z)," &
-- input Buffer; Netlist Instance: iol_81; Pad Name: cfg_clkin_div_b
"282 (BC_2, *, internal, X)," &
"283 (BC_2, CFG_CLKIN_DIV_B, input, X)," &
-- bidir Buffer; Netlist Instance: iol_82; Pad Name: ce_pa2
"284 (BC_2, *, control, 0)," &
"285 (BC_7, CE_PA2, bidir, X, 284, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_83; Pad Name: ce_pa1
"286 (BC_2, *, control, 0)," &
"287 (BC_7, CE_PA1, bidir, X, 286, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_84; Pad Name: ce_pd27
"288 (BC_2, *, control, 0)," &
"289 (BC_7, CE_PD27, bidir, X, 288, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_85; Pad Name: ce_pa5
"290 (BC_2, *, control, 0)," &
"291 (BC_7, CE_PA5, bidir, X, 290, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_86; Pad Name: ce_pa4
"292 (BC_2, *, control, 0)," &
"293 (BC_7, CE_PA4, bidir, X, 292, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_87; Pad Name: ce_pa3
"294 (BC_2, *, control, 0)," &
"295 (BC_7, CE_PA3, bidir, X, 294, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_88; Pad Name: ce_pa8
"296 (BC_2, *, control, 0)," &
"297 (BC_7, CE_PA8, bidir, X, 296, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_89; Pad Name: ce_pd26
"298 (BC_2, *, control, 0)," &
"299 (BC_7, CE_PD26, bidir, X, 298, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: iol_90; Pad Name: ce_pa7
"300 (BC_2, *, control, 0)," &
"301 (BC_7, CE_PA7, bidir, X, 300, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_91; Pad Name: ce_pa6
"302 (BC_2, *, control, 0)," &
"303 (BC_7, CE_PA6, bidir, X, 302, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_92; Pad Name: ce_pa11
"304 (BC_2, *, control, 0)," &
"305 (BC_7, CE_PA11, bidir, X, 304, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_93; Pad Name: ce_pa10
"306 (BC_2, *, control, 0)," &
"307 (BC_7, CE_PA10, bidir, X, 306, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_94; Pad Name: ce_pd13
"308 (BC_2, *, control, 0)," &
"309 (BC_7, CE_PD13, bidir, X, 308, 0, Z)," &
-- bidir Buffer; Netlist Instance: iol_95; Pad Name: ce_pa12
"310 (BC_2, *, control, 0)," &
"311 (BC_7, CE_PA12, bidir, X, 310, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_1; Pad Name: ce_pa9
"312 (BC_2, *, control, 0)," &
"313 (BC_7, CE_PA9, bidir, X, 312, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_2; Pad Name: ce_pd1
"314 (BC_2, *, control, 0)," &
"315 (BC_7, CE_PD1, bidir, X, 314, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_3; Pad Name: ce_pd0
"316 (BC_2, *, control, 0)," &
"317 (BC_7, CE_PD0, bidir, X, 316, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_4; Pad Name: ce_pd14
"318 (BC_2, *, control, 0)," &
"319 (BC_7, CE_PD14, bidir, X, 318, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: iou_5; Pad Name: ce_pd12
"320 (BC_2, *, control, 0)," &
"321 (BC_7, CE_PD12, bidir, X, 320, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_6; Pad Name: ce_pd2
"322 (BC_2, *, control, 0)," &
"323 (BC_7, CE_PD2, bidir, X, 322, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_7; Pad Name: ce_pd3
"324 (BC_2, *, control, 0)," &
"325 (BC_7, CE_PD3, bidir, X, 324, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_8; Pad Name: ce_pd17
"326 (BC_2, *, control, 0)," &
"327 (BC_7, CE_PD17, bidir, X, 326, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_9; Pad Name: ce_pd30
"328 (BC_2, *, control, 0)," &
"329 (BC_7, CE_PD30, bidir, X, 328, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_10; Pad Name: ce_pd5
"330 (BC_2, *, control, 0)," &
"331 (BC_7, CE_PD5, bidir, X, 330, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_11; Pad Name: ce_pd4
"332 (BC_2, *, control, 0)," &
"333 (BC_7, CE_PD4, bidir, X, 332, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_12; Pad Name: ce_pd29
"334 (BC_2, *, control, 0)," &
"335 (BC_7, CE_PD29, bidir, X, 334, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_13; Pad Name: ce_pd16
"336 (BC_2, *, control, 0)," &
"337 (BC_7, CE_PD16, bidir, X, 336, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_14; Pad Name: ce_pb29
"338 (BC_2, *, control, 0)," &
"339 (BC_7, CE_PB29, bidir, X, 338, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: iou_15; Pad Name: ce_pd15
"340 (BC_2, *, control, 0)," &
"341 (BC_7, CE_PD15, bidir, X, 340, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_16; Pad Name: ce_pd19
"342 (BC_2, *, control, 0)," &
"343 (BC_7, CE_PD19, bidir, X, 342, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_17; Pad Name: ce_pb31
"344 (BC_2, *, control, 0)," &
"345 (BC_7, CE_PB31, bidir, X, 344, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_18; Pad Name: ce_pb20
"346 (BC_2, *, control, 0)," &
"347 (BC_7, CE_PB20, bidir, X, 346, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_19; Pad Name: ce_pd18
"348 (BC_2, *, control, 0)," &
"349 (BC_7, CE_PD18, bidir, X, 348, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_20; Pad Name: ce_pd23
"350 (BC_2, *, control, 0)," &
"351 (BC_7, CE_PD23, bidir, X, 350, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_21; Pad Name: ce_pb21
"352 (BC_2, *, control, 0)," &
"353 (BC_7, CE_PB21, bidir, X, 352, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_22; Pad Name: ce_pd22
"354 (BC_2, *, control, 0)," &
"355 (BC_7, CE_PD22, bidir, X, 354, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_23; Pad Name: ce_pb14
"356 (BC_2, *, control, 0)," &
"357 (BC_7, CE_PB14, bidir, X, 356, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_24; Pad Name: ce_pb4
"358 (BC_2, *, control, 0)," &
"359 (BC_7, CE_PB4, bidir, X, 358, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: iou_25; Pad Name: ce_pb19
"360 (BC_2, *, control, 0)," &
"361 (BC_7, CE_PB19, bidir, X, 360, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_26; Pad Name: ce_pb5
"362 (BC_2, *, control, 0)," &
"363 (BC_7, CE_PB5, bidir, X, 362, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_27; Pad Name: ce_pb7
"364 (BC_2, *, control, 0)," &
"365 (BC_7, CE_PB7, bidir, X, 364, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_28; Pad Name: ce_pb17
"366 (BC_2, *, control, 0)," &
"367 (BC_7, CE_PB17, bidir, X, 366, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_29; Pad Name: ce_pb6
"368 (BC_2, *, control, 0)," &
"369 (BC_7, CE_PB6, bidir, X, 368, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_30; Pad Name: ce_pb18
"370 (BC_2, *, control, 0)," &
"371 (BC_7, CE_PB18, bidir, X, 370, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_31; Pad Name: ce_pd25
"372 (BC_2, *, control, 0)," &
"373 (BC_7, CE_PD25, bidir, X, 372, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_32; Pad Name: ce_pb10
"374 (BC_2, *, control, 0)," &
"375 (BC_7, CE_PB10, bidir, X, 374, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_33; Pad Name: ce_pb27
"376 (BC_2, *, control, 0)," &
"377 (BC_7, CE_PB27, bidir, X, 376, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_34; Pad Name: ce_pb30
"378 (BC_2, *, control, 0)," &
"379 (BC_7, CE_PB30, bidir, X, 378, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: iou_35; Pad Name: ce_pb9
"380 (BC_2, *, control, 0)," &
"381 (BC_7, CE_PB9, bidir, X, 380, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_36; Pad Name: ce_pb8
"382 (BC_2, *, control, 0)," &
"383 (BC_7, CE_PB8, bidir, X, 382, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_37; Pad Name: ce_pb28
"384 (BC_2, *, control, 0)," &
"385 (BC_7, CE_PB28, bidir, X, 384, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_38; Pad Name: ce_pb26
"386 (BC_2, *, control, 0)," &
"387 (BC_7, CE_PB26, bidir, X, 386, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_39; Pad Name: ce_pb12
"388 (BC_2, *, control, 0)," &
"389 (BC_7, CE_PB12, bidir, X, 388, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_40; Pad Name: ce_pd24
"390 (BC_2, *, control, 0)," &
"391 (BC_7, CE_PD24, bidir, X, 390, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_41; Pad Name: ce_pb24
"392 (BC_2, *, control, 0)," &
"393 (BC_7, CE_PB24, bidir, X, 392, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_42; Pad Name: ce_pb25
"394 (BC_2, *, control, 0)," &
"395 (BC_7, CE_PB25, bidir, X, 394, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_43; Pad Name: ce_pb1
"396 (BC_2, *, control, 0)," &
"397 (BC_7, CE_PB1, bidir, X, 396, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_44; Pad Name: ce_pb0
"398 (BC_2, *, control, 0)," &
"399 (BC_7, CE_PB0, bidir, X, 398, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: iou_45; Pad Name: ce_pb2
"400 (BC_2, *, control, 0)," &
"401 (BC_7, CE_PB2, bidir, X, 400, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_46; Pad Name: ce_pb3
"402 (BC_2, *, control, 0)," &
"403 (BC_7, CE_PB3, bidir, X, 402, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_47; Pad Name: ce_pb23
"404 (BC_2, *, control, 0)," &
"405 (BC_7, CE_PB23, bidir, X, 404, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_48; Pad Name: ce_pb15
"406 (BC_2, *, control, 0)," &
"407 (BC_7, CE_PB15, bidir, X, 406, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_49; Pad Name: ce_pb11
"408 (BC_2, *, control, 0)," &
"409 (BC_7, CE_PB11, bidir, X, 408, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_50; Pad Name: ce_pb13
"410 (BC_2, *, control, 0)," &
"411 (BC_7, CE_PB13, bidir, X, 410, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_51; Pad Name: ce_pb22
"412 (BC_2, *, control, 0)," &
"413 (BC_7, CE_PB22, bidir, X, 412, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_52; Pad Name: ce_pc24
"414 (BC_2, *, control, 0)," &
"415 (BC_7, CE_PC24, bidir, X, 414, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_53; Pad Name: ce_pd28
"416 (BC_2, *, control, 0)," &
"417 (BC_7, CE_PD28, bidir, X, 416, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_54; Pad Name: ce_pb16
"418 (BC_2, *, control, 0)," &
"419 (BC_7, CE_PB16, bidir, X, 418, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: iou_55; Pad Name: ce_pc22
"420 (BC_2, *, control, 0)," &
"421 (BC_7, CE_PC22, bidir, X, 420, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_56; Pad Name: ce_pc29
"422 (BC_2, *, control, 0)," &
"423 (BC_7, CE_PC29, bidir, X, 422, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_57; Pad Name: ce_pc27
"424 (BC_2, *, control, 0)," &
"425 (BC_7, CE_PC27, bidir, X, 424, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_58; Pad Name: ce_pc23
"426 (BC_2, *, control, 0)," &
"427 (BC_7, CE_PC23, bidir, X, 426, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_59; Pad Name: ce_pc0
"428 (BC_2, *, control, 0)," &
"429 (BC_7, CE_PC0, bidir, X, 428, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_60; Pad Name: ce_pc20
"430 (BC_2, *, control, 0)," &
"431 (BC_7, CE_PC20, bidir, X, 430, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_61; Pad Name: ce_pc2
"432 (BC_2, *, control, 0)," &
"433 (BC_7, CE_PC2, bidir, X, 432, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_62; Pad Name: ce_pc21
"434 (BC_2, *, control, 0)," &
"435 (BC_7, CE_PC21, bidir, X, 434, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_63; Pad Name: ce_pc1
"436 (BC_2, *, control, 0)," &
"437 (BC_7, CE_PC1, bidir, X, 436, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_64; Pad Name: ce_pc13
"438 (BC_2, *, control, 0)," &
"439 (BC_7, CE_PC13, bidir, X, 438, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: iou_65; Pad Name: ce_pc3
"440 (BC_2, *, control, 0)," &
"441 (BC_7, CE_PC3, bidir, X, 440, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_66; Pad Name: ce_pc11
"442 (BC_2, *, control, 0)," &
"443 (BC_7, CE_PC11, bidir, X, 442, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_67; Pad Name: ce_pc14
"444 (BC_2, *, control, 0)," &
"445 (BC_7, CE_PC14, bidir, X, 444, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_68; Pad Name: ce_pc9
"446 (BC_2, *, control, 0)," &
"447 (BC_7, CE_PC9, bidir, X, 446, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_69; Pad Name: ce_pd21
"448 (BC_2, *, control, 0)," &
"449 (BC_7, CE_PD21, bidir, X, 448, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_70; Pad Name: ce_pc8
"450 (BC_2, *, control, 0)," &
"451 (BC_7, CE_PC8, bidir, X, 450, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_71; Pad Name: ce_pc10
"452 (BC_2, *, control, 0)," &
"453 (BC_7, CE_PC10, bidir, X, 452, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_72; Pad Name: ce_pc12
"454 (BC_2, *, control, 0)," &
"455 (BC_7, CE_PC12, bidir, X, 454, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_73; Pad Name: ce_pc31
"456 (BC_2, *, control, 0)," &
"457 (BC_7, CE_PC31, bidir, X, 456, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_74; Pad Name: ce_pc30
"458 (BC_2, *, control, 0)," &
"459 (BC_7, CE_PC30, bidir, X, 458, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: iou_75; Pad Name: ce_pc28
"460 (BC_2, *, control, 0)," &
"461 (BC_7, CE_PC28, bidir, X, 460, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_76; Pad Name: ce_pc16
"462 (BC_2, *, control, 0)," &
"463 (BC_7, CE_PC16, bidir, X, 462, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_77; Pad Name: ce_pc25
"464 (BC_2, *, control, 0)," &
"465 (BC_7, CE_PC25, bidir, X, 464, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_78; Pad Name: ce_pc6
"466 (BC_2, *, control, 0)," &
"467 (BC_7, CE_PC6, bidir, X, 466, 0, Z)," &
-- input Buffer; Netlist Instance: iou_79; Pad Name: *
"468 (BC_2, *, internal, X)," &
"469 (BC_2, *, internal, X)," &
-- bidir Buffer; Netlist Instance: iou_81; Pad Name: ce_pc4
"470 (BC_2, *, control, 0)," &
"471 (BC_7, CE_PC4, bidir, X, 470, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_82; Pad Name: ce_pd20
"472 (BC_2, *, control, 0)," &
"473 (BC_7, CE_PD20, bidir, X, 472, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_83; Pad Name: ce_pc5
"474 (BC_2, *, control, 0)," &
"475 (BC_7, CE_PC5, bidir, X, 474, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_84; Pad Name: ce_pc15
"476 (BC_2, *, control, 0)," &
"477 (BC_7, CE_PC15, bidir, X, 476, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_85; Pad Name: ce_pc18
"478 (BC_2, *, control, 0)," &
"479 (BC_7, CE_PC18, bidir, X, 478, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: iou_86; Pad Name: ce_pc17
"480 (BC_2, *, control, 0)," &
"481 (BC_7, CE_PC17, bidir, X, 480, 0, Z)," &
-- bidir Buffer; Netlist Instance: iou_87; Pad Name: ce_pd11
"482 (BC_2, *, control, 0)," &
"483 (BC_7, CE_PD11, bidir, X, 482, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_1; Pad Name: ce_pc19
"484 (BC_2, *, control, 0)," &
"485 (BC_7, CE_PC19, bidir, X, 484, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_2; Pad Name: ce_pc7
"486 (BC_2, *, control, 0)," &
"487 (BC_7, CE_PC7, bidir, X, 486, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_3; Pad Name: ce_pa22
"488 (BC_2, *, control, 0)," &
"489 (BC_7, CE_PA22, bidir, X, 488, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_4; Pad Name: ce_pd9
"490 (BC_2, *, control, 0)," &
"491 (BC_7, CE_PD9, bidir, X, 490, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_5; Pad Name: ce_pc26
"492 (BC_2, *, control, 0)," &
"493 (BC_7, CE_PC26, bidir, X, 492, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_6; Pad Name: ce_pa23
"494 (BC_2, *, control, 0)," &
"495 (BC_7, CE_PA23, bidir, X, 494, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_7; Pad Name: ce_pa24
"496 (BC_2, *, control, 0)," &
"497 (BC_7, CE_PA24, bidir, X, 496, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_8; Pad Name: ce_pd31
"498 (BC_2, *, control, 0)," &
"499 (BC_7, CE_PD31, bidir, X, 498, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: ior_10; Pad Name: ce_pa25
"500 (BC_2, *, control, 0)," &
"501 (BC_7, CE_PA25, bidir, X, 500, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_11; Pad Name: ce_pa28
"502 (BC_2, *, control, 0)," &
"503 (BC_7, CE_PA28, bidir, X, 502, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_12; Pad Name: ce_pd6
"504 (BC_2, *, control, 0)," &
"505 (BC_7, CE_PD6, bidir, X, 504, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_13; Pad Name: lgpl4
"506 (BC_2, *, control, 0)," &
"507 (BC_7, LGPL4, bidir, X, 506, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_14; Pad Name: ce_pa26
"508 (BC_2, *, control, 0)," &
"509 (BC_7, CE_PA26, bidir, X, 508, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_15; Pad Name: ce_pa27
"510 (BC_2, *, control, 0)," &
"511 (BC_7, CE_PA27, bidir, X, 510, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_16; Pad Name: lgpl3
"512 (BC_2, *, control, 0)," &
"513 (BC_7, LGPL3, bidir, X, 512, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_17; Pad Name: ce_pd7
"514 (BC_2, *, control, 0)," &
"515 (BC_7, CE_PD7, bidir, X, 514, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_18; Pad Name: ce_pa30
"516 (BC_2, *, control, 0)," &
"517 (BC_7, CE_PA30, bidir, X, 516, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_19; Pad Name: ce_pa18
"518 (BC_2, *, control, 0)," &
"519 (BC_7, CE_PA18, bidir, X, 518, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: ior_20; Pad Name: ce_pd8
"520 (BC_2, *, control, 0)," &
"521 (BC_7, CE_PD8, bidir, X, 520, 0, Z)," &
-- output3 Buffer; Netlist Instance: ior_21; Pad Name: lgpl2
"522 (BC_2, *, control, 0)," &
"523 (BC_1, LGPL2, output3, X, 522, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_22; Pad Name: ce_pa19
"524 (BC_2, *, control, 0)," &
"525 (BC_7, CE_PA19, bidir, X, 524, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_23; Pad Name: ce_pa20
"526 (BC_2, *, control, 0)," &
"527 (BC_7, CE_PA20, bidir, X, 526, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_24; Pad Name: ce_pd10
"528 (BC_2, *, control, 0)," &
"529 (BC_7, CE_PD10, bidir, X, 528, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_25; Pad Name: lgpl1
"530 (BC_2, *, control, 0)," &
"531 (BC_7, LGPL1, bidir, X, 530, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_26; Pad Name: ce_pa21
"532 (BC_2, *, control, 0)," &
"533 (BC_7, CE_PA21, bidir, X, 532, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_27; Pad Name: ce_pa29
"534 (BC_2, *, control, 0)," &
"535 (BC_7, CE_PA29, bidir, X, 534, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_28; Pad Name: ce_pa16
"536 (BC_2, *, control, 0)," &
"537 (BC_7, CE_PA16, bidir, X, 536, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_29; Pad Name: ce_pa31
"538 (BC_2, *, control, 0)," &
"539 (BC_7, CE_PA31, bidir, X, 538, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: ior_30; Pad Name: lgpl0
"540 (BC_2, *, control, 0)," &
"541 (BC_7, LGPL0, bidir, X, 540, 0, Z)," &
-- output3 Buffer; Netlist Instance: ior_31; Pad Name: la16
"542 (BC_2, *, control, 0)," &
"543 (BC_1, LA16, output3, X, 542, 0, Z)," &
-- output3 Buffer; Netlist Instance: ior_32; Pad Name: la19
"544 (BC_2, *, control, 0)," &
"545 (BC_1, LA19, output3, X, 544, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_33; Pad Name: ce_pa17
"546 (BC_2, *, control, 0)," &
"547 (BC_7, CE_PA17, bidir, X, 546, 0, Z)," &
-- output3 Buffer; Netlist Instance: ior_34; Pad Name: la17
"548 (BC_2, *, control, 0)," &
"549 (BC_1, LA17, output3, X, 548, 0, Z)," &
-- input Buffer; Netlist Instance: ior_35; Pad Name: cfg_lbiu_mux_en
"550 (BC_2, *, internal, X)," &
"551 (BC_2, CFG_LBIU_MUX_EN, input, X)," &
-- output3 Buffer; Netlist Instance: ior_36; Pad Name: la18
"552 (BC_2, *, control, 0)," &
"553 (BC_1, LA18, output3, X, 552, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_37; Pad Name: lad8
"554 (BC_2, *, control, 0)," &
"555 (BC_7, LAD8, bidir, X, 554, 0, Z)," &
-- output3 Buffer; Netlist Instance: ior_38; Pad Name: la21
"556 (BC_2, *, control, 0)," &
"557 (BC_1, LA21, output3, X, 556, 0, Z)," &
-- output3 Buffer; Netlist Instance: ior_39; Pad Name: la20
"558 (BC_2, *, control, 0)," &
"559 (BC_1, LA20, output3, X, 558, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- output3 Buffer; Netlist Instance: ior_41; Pad Name: la22
"560 (BC_2, *, control, 0)," &
"561 (BC_1, LA22, output3, X, 560, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_42; Pad Name: lad0
"562 (BC_2, *, control, 0)," &
"563 (BC_7, LAD0, bidir, X, 562, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_43; Pad Name: lad9
"564 (BC_2, *, control, 0)," &
"565 (BC_7, LAD9, bidir, X, 564, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_44; Pad Name: lad1
"566 (BC_2, *, control, 0)," &
"567 (BC_7, LAD1, bidir, X, 566, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_45; Pad Name: lad2
"568 (BC_2, *, control, 0)," &
"569 (BC_7, LAD2, bidir, X, 568, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_46; Pad Name: lad10
"570 (BC_2, *, control, 0)," &
"571 (BC_7, LAD10, bidir, X, 570, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_47; Pad Name: lad3
"572 (BC_2, *, control, 0)," &
"573 (BC_7, LAD3, bidir, X, 572, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_48; Pad Name: lad4
"574 (BC_2, *, control, 0)," &
"575 (BC_7, LAD4, bidir, X, 574, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_49; Pad Name: lad11
"576 (BC_2, *, control, 0)," &
"577 (BC_7, LAD11, bidir, X, 576, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_50; Pad Name: lad5
"578 (BC_2, *, control, 0)," &
"579 (BC_7, LAD5, bidir, X, 578, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- bidir Buffer; Netlist Instance: ior_51; Pad Name: lad6
"580 (BC_2, *, control, 0)," &
"581 (BC_7, LAD6, bidir, X, 580, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_52; Pad Name: lad14
"582 (BC_2, *, control, 0)," &
"583 (BC_7, LAD14, bidir, X, 582, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_53; Pad Name: lad12
"584 (BC_2, *, control, 0)," &
"585 (BC_7, LAD12, bidir, X, 584, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_54; Pad Name: lad7
"586 (BC_2, *, control, 0)," &
"587 (BC_7, LAD7, bidir, X, 586, 0, Z)," &
-- output2 Buffer; Netlist Instance: ior_55; Pad Name: quiesce_b
"588 (BC_2, *, internal, X)," &
"589 (BC_1, QUIESCE_B, output2, X)," &
-- bidir Buffer; Netlist Instance: ior_56; Pad Name: lad13
"590 (BC_2, *, control, 0)," &
"591 (BC_7, LAD13, bidir, X, 590, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_57; Pad Name: lad15
"592 (BC_2, *, control, 0)," &
"593 (BC_7, LAD15, bidir, X, 592, 0, Z)," &
-- output3 Buffer; Netlist Instance: ior_58; Pad Name: lbctl
"594 (BC_2, *, control, 0)," &
"595 (BC_1, LBCTL, output3, X, 594, 0, Z)," &
-- input Buffer; Netlist Instance: ior_60; Pad Name: rtc_pit_clock
"596 (BC_2, *, internal, X)," &
"597 (BC_2, RTC_PIT_CLOCK, input, X)," &
-- output3 Buffer; Netlist Instance: ior_61; Pad Name: lale
"598 (BC_2, *, control, 0)," &
"599 (BC_1, LALE, output3, X, 598, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- output3 Buffer; Netlist Instance: ior_62; Pad Name: lwe_b1
"600 (BC_2, *, control, 0)," &
"601 (BC_1, LWE_B1, output3, X, 600, 0, Z)," &
-- output3 Buffer; Netlist Instance: ior_64; Pad Name: lclk1
"602 (BC_2, *, control, 0)," &
"603 (BC_1, LCLK1, output3, X, 602, 0, Z)," &
-- output3 Buffer; Netlist Instance: ior_69; Pad Name: lclk0
"604 (BC_2, *, control, 0)," &
"605 (BC_1, LCLK0, output3, X, 604, 0, Z)," &
-- output3 Buffer; Netlist Instance: ior_71; Pad Name: lcs_b1
"606 (BC_2, *, control, 0)," &
"607 (BC_1, LCS_B1, output3, X, 606, 0, Z)," &
-- output3 Buffer; Netlist Instance: ior_72; Pad Name: lcs_b3
"608 (BC_2, *, control, 0)," &
"609 (BC_1, LCS_B3, output3, X, 608, 0, Z)," &
-- output3 Buffer; Netlist Instance: ior_74; Pad Name: lwe_b0
"610 (BC_2, *, control, 0)," &
"611 (BC_1, LWE_B0, output3, X, 610, 0, Z)," &
-- output3 Buffer; Netlist Instance: ior_75; Pad Name: la24
"612 (BC_2, *, control, 0)," &
"613 (BC_1, LA24, output3, X, 612, 0, Z)," &
-- input Buffer; Netlist Instance: ior_76; Pad Name: irq_b0_mcp_in_b
"614 (BC_2, *, internal, X)," &
"615 (BC_2, IRQ_B0_MCP_IN_B, input, X)," &
-- input Buffer; Netlist Instance: ior_77; Pad Name: irq_b5
"616 (BC_2, *, internal, X)," &
"617 (BC_2, IRQ_B5, input, X)," &
-- output3 Buffer; Netlist Instance: ior_78; Pad Name: mcp_out_b
"618 (BC_2, *, control, 0)," &
"619 (BC_1, MCP_OUT_B, output3, X, 618, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- output3 Buffer; Netlist Instance: ior_79; Pad Name: lcs_b2
"620 (BC_2, *, control, 0)," &
"621 (BC_1, LCS_B2, output3, X, 620, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_80; Pad Name: irq_b6
"622 (BC_2, *, control, 0)," &
"623 (BC_7, IRQ_B6, bidir, X, 622, 0, Z)," &
-- output3 Buffer; Netlist Instance: ior_81; Pad Name: lcs_b0
"624 (BC_2, *, control, 0)," &
"625 (BC_1, LCS_B0, output3, X, 624, 0, Z)," &
-- output3 Buffer; Netlist Instance: ior_82; Pad Name: la23
"626 (BC_2, *, control, 0)," &
"627 (BC_1, LA23, output3, X, 626, 0, Z)," &
-- input Buffer; Netlist Instance: ior_83; Pad Name: irq_b7
"628 (BC_2, *, internal, X)," &
"629 (BC_2, IRQ_B7, input, X)," &
-- bidir Buffer; Netlist Instance: ior_84; Pad Name: sreset_b
"630 (BC_2, *, control, 0)," &
"631 (BC_7, SRESET_B, bidir, X, 630, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_85; Pad Name: iic_sda
"632 (BC_2, *, control, 0)," &
"633 (BC_7, IIC_SDA, bidir, X, 632, 0, Z)," &
-- output3 Buffer; Netlist Instance: ior_86; Pad Name: la25
"634 (BC_2, *, control, 0)," &
"635 (BC_1, LA25, output3, X, 634, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_90; Pad Name: hreset_b
"636 (BC_2, *, control, 0)," &
"637 (BC_7, HRESET_B, bidir, X, 636, 0, Z)," &
-- bidir Buffer; Netlist Instance: ior_91; Pad Name: iic_scl
"638 (BC_2, *, control, 0)," &
"639 (BC_7, IIC_SCL, bidir, X, 638, 0, Z)," &
-- num cell port/* func safe [ccell dis rslt]
-- input Buffer; Netlist Instance: ior_92; Pad Name: poreset_b
"640 (BC_2, *, internal, X)," &
"641 (BC_2, PORESET_B, input, X)," &
-- output3 Buffer; Netlist Instance: ior_93; Pad Name: lgpl5
"642 (BC_2, *, control, 0)," &
"643 (BC_1, LGPL5, output3, X, 642, 0, Z)";
end io_top;