-- *****************************************************************************
--BSDL file for MPC5643 (Leopard)
--******************************************************************************
-- library board_lib;
-- use board_lib.STD_1149_1_2001.all;
entity MPC5643 is
-- This section identifies the default device package selected
generic (PHYSICAL_PIN_MAP: string:= "QFP144");
-- This section declares all the ports in the design.
port (
A_0 : inout bit;
A_1 : inout bit;
A_2 : inout bit;
A_3 : inout bit;
A_4 : inout bit;
A_5 : inout bit;
A_6 : inout bit;
A_7 : inout bit;
A_8 : inout bit;
A_9 : inout bit;
A_10 : inout bit;
A_11 : inout bit;
A_12 : inout bit;
A_13 : inout bit;
A_14 : inout bit;
A_15 : inout bit;
B_0 : inout bit;
B_1 : inout bit;
B_2 : inout bit;
B_3 : inout bit;
B_4 : out bit; -- JTAG TDO
B_5 : in bit; -- JTAG TDI
B_6 : inout bit;
B_7 : in bit;
B_8 : in bit;
B_9 : in bit;
B_10 : in bit;
B_11 : in bit;
B_12 : in bit;
B_13 : in bit;
B_14 : in bit;
B_15 : in bit;
C_0 : in bit;
C_1 : in bit;
C_2 : in bit;
C_4 : inout bit;
C_5 : inout bit;
C_6 : inout bit;
C_7 : inout bit;
C_10 : inout bit;
C_11 : inout bit;
C_12 : inout bit;
C_13 : inout bit;
C_14 : inout bit;
C_15 : inout bit;
D_0 : inout bit;
D_1 : inout bit;
D_2 : inout bit;
D_3 : inout bit;
D_4 : inout bit;
D_5 : inout bit;
D_6 : inout bit;
D_7 : inout bit;
D_8 : inout bit;
D_9 : inout bit;
D_10 : inout bit;
D_11 : inout bit;
D_12 : inout bit;
D_14 : inout bit;
E_0 : in bit;
E_2 : in bit;
E_4 : in bit;
E_5 : in bit;
E_6 : in bit;
E_7 : in bit;
E_9 : in bit;
E_10 : in bit;
E_11 : in bit;
E_12 : in bit;
E_13 : inout bit;
E_14 : inout bit;
E_15 : inout bit;
F_0 : inout bit;
F_3 : inout bit;
F_4 : inout bit;
F_5 : inout bit;
F_6 : inout bit;
F_7 : inout bit;
F_8 : inout bit;
F_9 : inout bit;
F_10 : inout bit;
F_11 : inout bit;
F_12 : inout bit;
F_13 : inout bit;
F_14 : inout bit;
F_15 : inout bit;
G_2 : inout bit;
G_3 : inout bit;
G_4 : inout bit;
G_5 : inout bit;
G_6 : inout bit;
G_7 : inout bit;
G_8 : inout bit;
G_9 : inout bit;
G_10 : inout bit;
G_11 : inout bit;
FCCU_F_0 : inout bit;
FCCU_F_1 : inout bit;
MDO0 : inout bit;
NMI_B : in bit;
JCOMP : in bit; -- JTAG COMPLIANCE
TCK : in bit; -- JTAG TCK
TMS : in bit; -- JTAG TMS
RESET_B : linkage bit;
VPP_TEST : linkage bit;
XTALIN : linkage bit;
XTALOUT : linkage bit;
BCTRL : linkage bit;
VDD_HV_ADR0 : linkage bit;
VDD_HV_ADR1 : linkage bit;
VDD_HV_ADV0 : linkage bit;
VDD_HV_FLA0 : linkage bit;
VDD_HV_IO0_0 : linkage bit;
VDD_HV_IO0_1 : linkage bit;
VDD_HV_IO0_2 : linkage bit;
VDD_HV_IO0_3 : linkage bit;
VDD_HV_IO0_EX0 : linkage bit;
VDD_HV_OSC0 : linkage bit;
VDD_HV_PMU : linkage bit;
VDD_HV_REG_1 : linkage bit;
VDD_HV_REG_2 : linkage bit;
VDD_LV_COR0_0 : linkage bit;
VDD_LV_COR0_2 : linkage bit;
VDD_LV_COR0_4 : linkage bit;
VDD_LV_COR0_5 : linkage bit;
VDD_LV_FLA0 : linkage bit;
VDD_LV_PLL0 : linkage bit;
VDD_LV_REGCOR0 : linkage bit;
VSS_HV_ADR0 : linkage bit;
VSS_HV_ADR1 : linkage bit;
VSS_HV_ADV0 : linkage bit;
VSS_HV_FLA0 : linkage bit;
VSS_HV_IO0_0 : linkage bit;
VSS_HV_IO0_1 : linkage bit;
VSS_HV_IO0_2 : linkage bit;
VSS_HV_IO0_3 : linkage bit;
VSS_HV_OSC0 : linkage bit;
VSS_LV_COR0_0 : linkage bit;
VSS_LV_COR0_2 : linkage bit;
VSS_LV_COR0_4 : linkage bit;
VSS_LV_COR0_5 : linkage bit;
VSS_LV_FLA0 : linkage bit;
VSS_LV_PLL0 : linkage bit;
VSS_LV_REGCOR0 : linkage bit
);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of MPC5643 : entity is
"STD_1149_1_2001"
;
attribute PIN_MAP of MPC5643: entity is
PHYSICAL_PIN_MAP;
-- This section specifies the pin map for each port. This information is
-- extracted from the port-to-pin map file that was read in using the
-- "read_pin_map" command.
constant QFP144: PIN_MAP_STRING :=
"NMI_B : 1," &
"A_6 : 2," &
"D_1 : 3," &
"F_4 : 4," &
"F_5 : 5," &
"VDD_HV_IO0_0 : 6," &
"VSS_HV_IO0_0 : 7," &
"F_6 : 8," &
"MDO0 : 9," &
"A_7 : 10," &
"C_4 : 11," &
"A_8 : 12," &
"C_5 : 13," &
"A_5 : 14," &
"C_7 : 15," &
"VDD_HV_IO0_EX0 : 16," &
"VSS_LV_COR0_0 : 17," &
"VDD_LV_COR0_0 : 18," &
"F_7 : 19," &
"F_8 : 20," &
"VDD_HV_IO0_1 : 21," &
"VSS_HV_IO0_1 : 22," &
"F_9 : 23," &
"F_10 : 24," &
"F_11 : 25," &
"D_9 : 26," &
"VDD_HV_OSC0 : 27," &
"VSS_HV_OSC0 : 28," &
"XTALIN : 29," &
"XTALOUT : 30," &
"RESET_B : 31," &
"D_8 : 32," &
"D_5 : 33," &
"D_6 : 34," &
"VSS_LV_PLL0 : 35," &
"VDD_LV_PLL0 : 36," &
"D_7 : 37," &
"FCCU_F_0 : 38," &
"VDD_LV_COR0_4 : 39," &
"VSS_LV_COR0_4 : 40," &
"C_1 : 41," &
"E_4 : 42," &
"B_7 : 43," &
"E_5 : 44," &
"C_2 : 45," &
"E_6 : 46," &
"B_8 : 47," &
"E_7 : 48," &
"E_2 : 49," &
"VDD_HV_ADR0 : 50," &
"VSS_HV_ADR0 : 51," &
"B_9 : 52," &
"B_10 : 53," &
"B_11 : 54," &
"B_12 : 55," &
"VDD_HV_ADR1 : 56," &
"VSS_HV_ADR1 : 57," &
"VDD_HV_ADV0 : 58," &
"VSS_HV_ADV0 : 59," &
"B_13 : 60," &
"E_9 : 61," &
"B_15 : 62," &
"E_10 : 63," &
"B_14 : 64," &
"E_11 : 65," &
"C_0 : 66," &
"E_12 : 67," &
"E_0 : 68," &
"BCTRL : 69," &
"VDD_LV_REGCOR0 : 70," &
"VSS_LV_REGCOR0 : 71," &
"VDD_HV_PMU : 72," &
"A_0 : 73," &
"A_1 : 74," &
"G_11 : 75," &
"D_10 : 76," &
"G_10 : 77," &
"D_11 : 78," &
"G_9 : 79," &
"C_11 : 80," &
"G_8 : 81," &
"C_12 : 82," &
"G_7 : 83," &
"A_2 : 84," &
"G_5 : 85," &
"B_5 : 86," &
"TMS : 87," &
"TCK : 88," &
"B_4 : 89," &
"VSS_HV_IO0_2 : 90," &
"VDD_HV_IO0_2 : 91," &
"A_3 : 92," &
"VDD_LV_FLA0 : 93," &
"VSS_LV_FLA0 : 94," &
"VDD_HV_REG_1 : 95," &
"VSS_HV_FLA0 : 96," &
"VDD_HV_FLA0 : 97," &
"G_6 : 98," &
"D_12 : 99," &
"G_4 : 100," &
"C_13 : 101," &
"G_2 : 102," &
"C_14 : 103," &
"G_3 : 104," &
"D_14 : 105," &
"F_12 : 106," &
"VPP_TEST : 107," &
"A_4 : 108," &
"B_0 : 109," &
"B_1 : 110," &
"C_10 : 111," &
"F_13 : 112," &
"F_15 : 113," &
"B_2 : 114," &
"F_14 : 115," &
"B_3 : 116," &
"E_13 : 117," &
"A_10 : 118," &
"E_14 : 119," &
"A_11 : 120," &
"E_15 : 121," &
"A_12 : 122," &
"JCOMP : 123," &
"C_15 : 124," &
"D_0 : 125," &
"VDD_HV_IO0_3 : 126," &
"VSS_HV_IO0_3 : 127," &
"D_3 : 128," &
"D_4 : 129," &
"VDD_HV_REG_2 : 130," &
"VDD_LV_COR0_2 : 131," &
"VSS_LV_COR0_2 : 132," &
"F_0 : 133," &
"A_9 : 134," &
"VDD_LV_COR0_5 : 135," &
"A_13 : 136," &
"VSS_LV_COR0_5 : 137," &
"B_6 : 138," &
"F_3 : 139," &
"D_2 : 140," &
"FCCU_F_1 : 141," &
"C_6 : 142," &
"A_14 : 143," &
"A_15 : 144";
-- This section specifies the TAP ports. For the TAP TCK port, the parameters in
-- the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be stopped in.
attribute TAP_SCAN_CLOCK of TCK:signal is (16.0e+06, BOTH);
attribute TAP_SCAN_IN of B_5:signal is true;
attribute TAP_SCAN_MODE of TMS:signal is true;
attribute TAP_SCAN_OUT of B_4:signal is true;
-- Specifies the compliance enable patterns for the design. It lists a set of
-- design ports and the values that they should be set to, in order to enable
-- compliance to IEEE Std 1149.1
attribute COMPLIANCE_PATTERNS of MPC5643: entity is
"(JCOMP) (1)";
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of MPC5643: entity is 5;
-- Specifies the boundary-scan instructions implemented in the design and their
-- opcodes.
attribute INSTRUCTION_OPCODE of MPC5643: entity is
"BYPASS (11111)," &
"EXTEST (00100)," &
"CLAMP (01100)," &
"SAMPLE (00011)," &
"PRELOAD (00010)," &
"IDCODE (00001)," &
"PRIVATE (00101, 00110, 00111, 01001, 01010, 01011," &
"10000, 10001, 10010, 10011, 10100, 10101, 10110," &
"10111, 11000, 11001, 11010, 11011, 11100, 11101," &
"11110)";
-- Specifies the bit pattern that is loaded into the instruction register when
-- the TAP controller passes through the Capture-IR state. The standard mandates
-- that the two LSBs must be "01". The remaining bits are design specific.
attribute INSTRUCTION_CAPTURE of MPC5643: entity is "00001";
-- Specifies the bit pattern that is loaded into the instruction register when
-- the TAP controller passes through the Capture-IR state. The standard mandates
-- that the two LSBs must be "01". The remaining bits are design specific.
attribute INSTRUCTION_PRIVATE of MPC5643: entity is
"PRIVATE";
-- Specifies the bit pattern that is loaded into the DEVICE_ID register during
-- the IDCODE instruction when the TAP controller passes through the Capture-DR
-- state.
attribute IDCODE_REGISTER of MPC5643: entity is
-- 4-bit version number
"0000" &
-- 16-bit part number
"1010111010100010" &
-- 11-bit identity of the manufacturer
"00000001110" &
-- Required by IEEE Std 1149.1
"1";
-- This section specifies the test data register placed between TDI and TDO for
-- each implemented instruction.
attribute REGISTER_ACCESS of MPC5643: entity is
"BYPASS (BYPASS, CLAMP)," &
"BOUNDARY (EXTEST, SAMPLE, PRELOAD)," &
"DEVICE_ID (IDCODE)";
-- Specifies the length of the boundary scan register.
attribute BOUNDARY_LENGTH of MPC5643: entity is 221;
-- The following list specifies the characteristics of each cell in the boundary
-- scan register from TDI to TDO. The following is a description of the label
-- fields:
-- num : Is the cell number.
-- cell : Is the cell type as defined by the standard.
-- port : Is the design port name. Control cells do not have a port
-- name.
-- function: Is the function of the cell as defined by the standard. Is one
-- of input, output2, output3, bidir, control or controlr.
-- safe : Specifies the value that the BSR cell should be loaded with
-- for safe operation when the software might otherwise choose a
-- random value.
-- ccell : The control cell number. Specifies the control cell that
-- drives the output enable for this port.
-- disval : Specifies the value that is loaded into the control cell to
-- disable the output enable for the corresponding port.
-- rslt : Resulting state. Shows the state of the driver when it is
-- disabled.
attribute BOUNDARY_REGISTER of MPC5643: entity is
--
-- num cell port function safe [ccell disval rslt]
--
"220 (BC_3, NMI_B, input, X), " &
"219 (BC_7, A_6, bidir, X, 218, 0, Z), " &
"218 (BC_1, *, control, 0), " &
"217 (BC_7, D_1, bidir, X, 216, 0, Z), " &
"216 (BC_1, *, control, 0), " &
"215 (BC_7, F_4, bidir, X, 214, 0, Z), " &
"214 (BC_1, *, control, 0), " &
"213 (BC_7, F_5, bidir, X, 212, 0, Z), " &
"212 (BC_1, *, control, 0), " &
"211 (BC_7, F_6, bidir, X, 210, 0, Z), " &
"210 (BC_1, *, control, 0), " &
"209 (BC_7, MDO0, bidir, X, 208, 0, Z), " &
"208 (BC_1, *, control, 0), " &
"207 (BC_7, A_7, bidir, X, 206, 0, Z), " &
"206 (BC_1, *, control, 0), " &
"205 (BC_7, C_4, bidir, X, 204, 0, Z), " &
"204 (BC_1, *, control, 0), " &
"203 (BC_7, A_8, bidir, X, 202, 0, Z), " &
"202 (BC_1, *, control, 0), " &
"201 (BC_1, *, internal, X), " &
"200 (BC_1, *, internal, X), " &
"199 (BC_7, C_5, bidir, X, 198, 0, Z), " &
"198 (BC_1, *, control, 0), " &
"197 (BC_1, *, internal, X), " &
"196 (BC_1, *, internal, X), " &
"195 (BC_7, A_5, bidir, X, 194, 0, Z), " &
"194 (BC_1, *, control, 0), " &
"193 (BC_1, *, internal, X), " &
"192 (BC_1, *, internal, X), " &
"191 (BC_7, C_7, bidir, X, 190, 0, Z), " &
"190 (BC_1, *, control, 0), " &
"189 (BC_1, *, internal, X), " &
"188 (BC_1, *, internal, X), " &
"187 (BC_1, *, internal, X), " &
"186 (BC_1, *, internal, X), " &
"185 (BC_7, F_7, bidir, X, 184, 0, Z), " &
"184 (BC_1, *, control, 0), " &
"183 (BC_7, F_8, bidir, X, 182, 0, Z), " &
"182 (BC_1, *, control, 0), " &
"181 (BC_7, F_9, bidir, X, 180, 0, Z), " &
"180 (BC_1, *, control, 0), " &
"179 (BC_7, F_10, bidir, X, 178, 0, Z), " &
"178 (BC_1, *, control, 0), " &
"177 (BC_7, F_11, bidir, X, 176, 0, Z), " &
"176 (BC_1, *, control, 0), " &
"175 (BC_7, D_9, bidir, X, 174, 0, Z), " &
"174 (BC_1, *, control, 0), " &
"173 (BC_7, D_8, bidir, X, 172, 0, Z), " &
"172 (BC_1, *, control, 0), " &
"171 (BC_7, D_5, bidir, X, 170, 0, Z), " &
"170 (BC_1, *, control, 0), " &
"169 (BC_7, D_6, bidir, X, 168, 0, Z), " &
"168 (BC_1, *, control, 0), " &
"167 (BC_7, D_7, bidir, X, 166, 0, Z), " &
"166 (BC_1, *, control, 0), " &
"165 (BC_7, FCCU_F_0,bidir, X, 164, 0, Z), " &
"164 (BC_1, *, control, 0), " &
"163 (BC_3, C_1, input, X), " &
"162 (BC_3, E_4, input, X), " &
"161 (BC_3, B_7, input, X), " &
"160 (BC_3, E_5, input, X), " &
"159 (BC_3, C_2, input, X), " &
"158 (BC_3, E_6, input, X), " &
"157 (BC_3, B_8, input, X), " &
"156 (BC_3, E_7, input, X), " &
"155 (BC_3, E_2, input, X), " &
"154 (BC_3, B_9, input, X), " &
"153 (BC_3, B_10, input, X), " &
"152 (BC_3, B_11, input, X), " &
"151 (BC_3, B_12, input, X), " &
"150 (BC_3, B_13, input, X), " &
"149 (BC_3, E_9, input, X), " &
"148 (BC_3, B_15, input, X), " &
"147 (BC_3, E_10, input, X), " &
"146 (BC_3, B_14, input, X), " &
"145 (BC_3, E_11, input, X), " &
"144 (BC_3, C_0, input, X), " &
"143 (BC_3, E_12, input, X), " &
"142 (BC_3, E_0, input, X), " &
"141 (BC_7, A_0, bidir, X, 140, 0, Z), " &
"140 (BC_1, *, control, 0), " &
"139 (BC_7, A_1, bidir, X, 138, 0, Z), " &
"138 (BC_1, *, control, 0), " &
"137 (BC_7, G_11, bidir, X, 136, 0, Z), " &
"136 (BC_1, *, control, 0), " &
"135 (BC_7, D_10, bidir, X, 134, 0, Z), " &
"134 (BC_1, *, control, 0), " &
"133 (BC_7, G_10, bidir, X, 132, 0, Z), " &
"132 (BC_1, *, control, 0), " &
"131 (BC_7, D_11, bidir, X, 130, 0, Z), " &
"130 (BC_1, *, control, 0), " &
"129 (BC_7, G_9, bidir, X, 128, 0, Z), " &
"128 (BC_1, *, control, 0), " &
"127 (BC_7, C_11, bidir, X, 126, 0, Z), " &
"126 (BC_1, *, control, 0), " &
"125 (BC_7, G_8, bidir, X, 124, 0, Z), " &
"124 (BC_1, *, control, 0), " &
"123 (BC_7, C_12, bidir, X, 122, 0, Z), " &
"122 (BC_1, *, control, 0), " &
"121 (BC_7, G_7, bidir, X, 120, 0, Z), " &
"120 (BC_1, *, control, 0), " &
"119 (BC_7, A_2, bidir, X, 118, 0, Z), " &
"118 (BC_1, *, control, 0), " &
"117 (BC_7, G_5, bidir, X, 116, 0, Z), " &
"116 (BC_1, *, control, 0), " &
"115 (BC_1, *, internal, X), " &
"114 (BC_1, *, internal, X), " &
"113 (BC_1, *, internal, X), " &
"112 (BC_1, *, internal, X), " &
"111 (BC_1, *, internal, X), " &
"110 (BC_1, *, internal, X), " &
"109 (BC_1, *, internal, X), " &
"108 (BC_1, *, internal, X), " &
"107 (BC_7, A_3, bidir, X, 106, 0, Z), " &
"106 (BC_1, *, control, 0), " &
"105 (BC_1, *, internal, X), " &
"104 (BC_1, *, internal, X), " &
"103 (BC_1, *, internal, X), " &
"102 (BC_1, *, internal, X), " &
"101 (BC_7, G_6, bidir, X, 100, 0, Z), " &
"100 (BC_1, *, control, 0), " &
"99 (BC_1, *, internal, X), " &
"98 (BC_1, *, internal, X), " &
"97 (BC_7, D_12, bidir, X, 96, 0, Z), " &
"96 (BC_1, *, control, 0), " &
"95 (BC_1, *, internal, X), " &
"94 (BC_1, *, internal, X), " &
"93 (BC_7, G_4, bidir, X, 92, 0, Z), " &
"92 (BC_1, *, control, 0), " &
"91 (BC_1, *, internal, X), " &
"90 (BC_1, *, internal, X), " &
"89 (BC_7, C_13, bidir, X, 88, 0, Z), " &
"88 (BC_1, *, control, 0), " &
"87 (BC_1, *, internal, X), " &
"86 (BC_1, *, internal, X), " &
"85 (BC_7, G_2, bidir, X, 84, 0, Z), " &
"84 (BC_1, *, control, 0), " &
"83 (BC_7, C_14, bidir, X, 82, 0, Z), " &
"82 (BC_1, *, control, 0), " &
"81 (BC_7, G_3, bidir, X, 80, 0, Z), " &
"80 (BC_1, *, control, 0), " &
"79 (BC_7, D_14, bidir, X, 78, 0, Z), " &
"78 (BC_1, *, control, 0), " &
"77 (BC_7, F_12, bidir, X, 76, 0, Z), " &
"76 (BC_1, *, control, 0), " &
"75 (BC_7, A_4, bidir, X, 74, 0, Z), " &
"74 (BC_1, *, control, 0), " &
"73 (BC_7, B_0, bidir, X, 72, 0, Z), " &
"72 (BC_1, *, control, 0), " &
"71 (BC_7, B_1, bidir, X, 70, 0, Z), " &
"70 (BC_1, *, control, 0), " &
"69 (BC_7, C_10, bidir, X, 68, 0, Z), " &
"68 (BC_1, *, control, 0), " &
"67 (BC_7, F_13, bidir, X, 66, 0, Z), " &
"66 (BC_1, *, control, 0), " &
"65 (BC_7, F_15, bidir, X, 64, 0, Z), " &
"64 (BC_1, *, control, 0), " &
"63 (BC_7, B_2, bidir, X, 62, 0, Z), " &
"62 (BC_1, *, control, 0), " &
"61 (BC_7, F_14, bidir, X, 60, 0, Z), " &
"60 (BC_1, *, control, 0), " &
"59 (BC_7, B_3, bidir, X, 58, 0, Z), " &
"58 (BC_1, *, control, 0), " &
"57 (BC_7, E_13, bidir, X, 56, 0, Z), " &
"56 (BC_1, *, control, 0), " &
"55 (BC_7, A_10, bidir, X, 54, 0, Z), " &
"54 (BC_1, *, control, 0), " &
"53 (BC_1, *, internal, X), " &
"52 (BC_1, *, internal, X), " &
"51 (BC_7, E_14, bidir, X, 50, 0, Z), " &
"50 (BC_1, *, control, 0), " &
"49 (BC_1, *, internal, X), " &
"48 (BC_1, *, internal, X), " &
"47 (BC_7, A_11, bidir, X, 46, 0, Z), " &
"46 (BC_1, *, control, 0), " &
"45 (BC_1, *, internal, X), " &
"44 (BC_1, *, internal, X), " &
"43 (BC_7, E_15, bidir, X, 42, 0, Z), " &
"42 (BC_1, *, control, 0), " &
"41 (BC_1, *, internal, X), " &
"40 (BC_1, *, internal, X), " &
"39 (BC_7, A_12, bidir, X, 38, 0, Z), " &
"38 (BC_1, *, control, 0), " &
"37 (BC_1, *, internal, X), " &
"36 (BC_1, *, internal, X), " &
"35 (BC_1, *, internal, X), " &
"34 (BC_1, *, internal, X), " &
"33 (BC_7, C_15, bidir, X, 32, 0, Z), " &
"32 (BC_1, *, control, 0), " &
"31 (BC_7, D_0, bidir, X, 30, 0, Z), " &
"30 (BC_1, *, control, 0), " &
"29 (BC_7, D_3, bidir, X, 28, 0, Z), " &
"28 (BC_1, *, control, 0), " &
"27 (BC_7, D_4, bidir, X, 26, 0, Z), " &
"26 (BC_1, *, control, 0), " &
"25 (BC_7, F_0, bidir, X, 24, 0, Z), " &
"24 (BC_1, *, control, 0), " &
"23 (BC_1, *, internal, X), " &
"22 (BC_1, *, internal, X), " &
"21 (BC_1, *, internal, X), " &
"20 (BC_1, *, internal, X), " &
"19 (BC_1, *, internal, X), " &
"18 (BC_1, *, internal, X), " &
"17 (BC_7, A_9, bidir, X, 16, 0, Z), " &
"16 (BC_1, *, control, 0), " &
"15 (BC_7, A_13, bidir, X, 14, 0, Z), " &
"14 (BC_1, *, control, 0), " &
"13 (BC_7, B_6, bidir, X, 12, 0, Z), " &
"12 (BC_1, *, control, 0), " &
"11 (BC_7, F_3, bidir, X, 10, 0, Z), " &
"10 (BC_1, *, control, 0), " &
"9 (BC_7, D_2, bidir, X, 8, 0, Z), " &
"8 (BC_1, *, control, 0), " &
"7 (BC_7, FCCU_F_1,bidir, X, 6, 0, Z), " &
"6 (BC_1, *, control, 0), " &
"5 (BC_7, C_6, bidir, X, 4, 0, Z), " &
"4 (BC_1, *, control, 0), " &
"3 (BC_7, A_14, bidir, X, 2, 0, Z), " &
"2 (BC_1, *, control, 0), " &
"1 (BC_7, A_15, bidir, X, 0, 0, Z), " &
"0 (BC_1, *, control, 0) ";
end MPC5643;