-------------------------------------------------------------------------
-- Supported Devices: AM35x_BGA_491_ZCN --
-------------------------------------------------------------------------
-- Created by : Texas Instruments Incorporated --
-- BSDL Revision : --
-- --
-- BSDL Status : Preliminary --
-- Date Created : 11/2/2009 --
-- --
-------------------------------------------------------------------------
-------------------------------------------------------------------------
-- Disclaimer:
-- Please be aware that in the absence of a written agreement --
-- Texas Instruments(TI) assumes no liability for: --
-- (1) The accuracy of the BSDL provided to your company --
-- (2) The proper functioning of the BSDL file in your design --
-- or for any resulting applications;or --
-- (3) Infringement of patents,copyrights or intellectual --
-- property rights resulting from your use of the BSDL file. --
-- TI provides BSDL file as a service to our customers and --
-- therefore reserves the right to limit distribution of the file. --
-------------------------------------------------------------------------
-- Copyright:
-- Property of Texas Instruments Incorporated. --
-- Unauthorised reproduction and/or distribution --
-- is strictly prohibited. --
-- This product is protected under copyright law and trade --
-- secret law as an unpublished work. --
-- Created 2009,(C) Copyright 2009, --
-- Texas Instruments Incorporated., All Rights Reserved. --
-- These commodities are under the U.S. --
-- Government distribution license control.As such,they are --
-- not to be re-exported without the prior approval of the --
-- U.S. Department of Commerce. --
-------------------------------------------------------------------------
entity AM35x_BGA_491_ZCN is
generic(PHYSICAL_PIN_MAP : string := "DW");
PORT (
ccdc_data0: inout bit;
ccdc_data1: inout bit;
ccdc_data2: inout bit;
ccdc_data3: inout bit;
ccdc_data4: inout bit;
ccdc_data5: inout bit;
ccdc_data6: inout bit;
ccdc_data7: inout bit;
ccdc_field: inout bit;
ccdc_hd: inout bit;
ccdc_pclk: inout bit;
ccdc_vd: inout bit;
ccdc_wen: inout bit;
ddr_padref: linkage bit;
dsi_dx0: linkage bit;
dsi_dx1: linkage bit;
dsi_dx2: linkage bit;
dsi_dy0: linkage bit;
dsi_dy1: linkage bit;
dsi_dy2: linkage bit;
dss_acbias: inout bit;
dss_data0: inout bit;
dss_data10: inout bit;
dss_data11: inout bit;
dss_data12: inout bit;
dss_data13: inout bit;
dss_data14: inout bit;
dss_data15: inout bit;
dss_data16: inout bit;
dss_data17: inout bit;
dss_data18: inout bit;
dss_data19: inout bit;
dss_data1: inout bit;
dss_data20: inout bit;
dss_data21: inout bit;
dss_data22: inout bit;
dss_data23: inout bit;
dss_data2: inout bit;
dss_data3: inout bit;
dss_data4: inout bit;
dss_data5: inout bit;
dss_data6: inout bit;
dss_data7: inout bit;
dss_data8: inout bit;
dss_data9: inout bit;
dss_hsync: inout bit;
dss_pclk: inout bit;
dss_vsync: inout bit;
etk_clk: inout bit;
etk_ctl: inout bit;
etk_d0: inout bit;
etk_d10: inout bit;
etk_d11: inout bit;
etk_d12: inout bit;
etk_d13: inout bit;
etk_d14: inout bit;
etk_d15: inout bit;
etk_d1: inout bit;
etk_d2: inout bit;
etk_d3: inout bit;
etk_d4: inout bit;
etk_d5: inout bit;
etk_d6: inout bit;
etk_d7: inout bit;
etk_d8: inout bit;
etk_d9: inout bit;
gpmc_a10: inout bit;
gpmc_a1: inout bit;
gpmc_a2: inout bit;
gpmc_a3: inout bit;
gpmc_a4: inout bit;
gpmc_a5: inout bit;
gpmc_a6: inout bit;
gpmc_a7: inout bit;
gpmc_a8: inout bit;
gpmc_a9: inout bit;
gpmc_clk: inout bit;
gpmc_d0: inout bit;
gpmc_d10: inout bit;
gpmc_d11: inout bit;
gpmc_d12: inout bit;
gpmc_d13: inout bit;
gpmc_d14: inout bit;
gpmc_d15: inout bit;
gpmc_d1: inout bit;
gpmc_d2: inout bit;
gpmc_d3: inout bit;
gpmc_d4: inout bit;
gpmc_d5: inout bit;
gpmc_d6: inout bit;
gpmc_d7: inout bit;
gpmc_d8: inout bit;
gpmc_d9: inout bit;
gpmc_nadv_ale: inout bit;
gpmc_nbe0_cle: inout bit;
gpmc_nbe1: inout bit;
gpmc_ncs0: inout bit;
gpmc_ncs1: inout bit;
gpmc_ncs2: inout bit;
gpmc_ncs3: inout bit;
gpmc_ncs4: inout bit;
gpmc_ncs5: inout bit;
gpmc_ncs6: inout bit;
gpmc_ncs7: inout bit;
gpmc_noe: inout bit;
gpmc_nwe: inout bit;
gpmc_nwp: inout bit;
gpmc_wait0: inout bit;
gpmc_wait1: inout bit;
gpmc_wait2: inout bit;
gpmc_wait3: inout bit;
hdq_sio: inout bit;
hecc1_rxd: inout bit;
hecc1_txd: inout bit;
i2c1_scl: inout bit;
i2c1_sda: inout bit;
i2c2_scl: inout bit;
i2c2_sda: inout bit;
i2c3_scl: inout bit;
i2c3_sda: inout bit;
i2c4_scl: inout bit;
i2c4_sda: inout bit;
jtag_emu0: in bit;
jtag_emu1: in bit;
jtag_ntrst: in bit;
jtag_rtck: linkage bit;
jtag_tck: in bit;
jtag_tdi: in bit;
jtag_tdo: out bit;
jtag_tms_tmsc: in bit;
mcbsp1_clkr: inout bit;
mcbsp1_clkx: inout bit;
mcbsp1_dr: inout bit;
mcbsp1_dx: inout bit;
mcbsp1_fsr: inout bit;
mcbsp1_fsx: inout bit;
mcbsp2_clkx: inout bit;
mcbsp2_dr: inout bit;
mcbsp2_dx: inout bit;
mcbsp2_fsx: inout bit;
mcbsp3_clkx: inout bit;
mcbsp3_dr: inout bit;
mcbsp3_dx: inout bit;
mcbsp3_fsx: inout bit;
mcbsp4_clkx: inout bit;
mcbsp4_dr: inout bit;
mcbsp4_dx: inout bit;
mcbsp4_fsx: inout bit;
mcbsp_clks: inout bit;
mcspi1_clk: inout bit;
mcspi1_cs0: inout bit;
mcspi1_cs1: inout bit;
mcspi1_cs2: inout bit;
mcspi1_cs3: inout bit;
mcspi1_simo: inout bit;
mcspi1_somi: inout bit;
mcspi2_clk: inout bit;
mcspi2_cs0: inout bit;
mcspi2_cs1: inout bit;
mcspi2_simo: inout bit;
mcspi2_somi: inout bit;
mmc1_clk: inout bit;
mmc1_cmd: inout bit;
mmc1_dat0: inout bit;
mmc1_dat1: inout bit;
mmc1_dat2: inout bit;
mmc1_dat3: inout bit;
mmc1_dat4: inout bit;
mmc1_dat5: inout bit;
mmc1_dat6: inout bit;
mmc1_dat7: inout bit;
mmc2_clk: inout bit;
mmc2_cmd: inout bit;
mmc2_dat0: inout bit;
mmc2_dat1: inout bit;
mmc2_dat2: inout bit;
mmc2_dat3: inout bit;
mmc2_dat4: inout bit;
mmc2_dat5: inout bit;
mmc2_dat6: inout bit;
mmc2_dat7: inout bit;
rmii_50mhz_clk: inout bit;
rmii_crs_dv: inout bit;
rmii_mdio_clk: inout bit;
rmii_mdio_data: inout bit;
rmii_rxd0: inout bit;
rmii_rxd1: inout bit;
rmii_rxer: inout bit;
rmii_txd0: inout bit;
rmii_txd1: inout bit;
rmii_txen: inout bit;
sdrc_a0: inout bit;
sdrc_a10: inout bit;
sdrc_a11: inout bit;
sdrc_a12: inout bit;
sdrc_a13: inout bit;
sdrc_a14: inout bit;
sdrc_a1: inout bit;
sdrc_a2: inout bit;
sdrc_a3: inout bit;
sdrc_a4: inout bit;
sdrc_a5: inout bit;
sdrc_a6: inout bit;
sdrc_a7: inout bit;
sdrc_a8: inout bit;
sdrc_a9: inout bit;
sdrc_ba0: inout bit;
sdrc_ba1: inout bit;
sdrc_ba2: inout bit;
sdrc_cke0: inout bit;
sdrc_clk: inout bit;
sdrc_d0: inout bit;
sdrc_d10: inout bit;
sdrc_d11: inout bit;
sdrc_d12: inout bit;
sdrc_d13: inout bit;
sdrc_d14: inout bit;
sdrc_d15: inout bit;
sdrc_d16: inout bit;
sdrc_d17: inout bit;
sdrc_d18: inout bit;
sdrc_d19: inout bit;
sdrc_d1: inout bit;
sdrc_d20: inout bit;
sdrc_d21: inout bit;
sdrc_d22: inout bit;
sdrc_d23: inout bit;
sdrc_d24: inout bit;
sdrc_d25: inout bit;
sdrc_d26: inout bit;
sdrc_d27: inout bit;
sdrc_d28: inout bit;
sdrc_d29: inout bit;
sdrc_d2: inout bit;
sdrc_d30: inout bit;
sdrc_d31: inout bit;
sdrc_d3: inout bit;
sdrc_d4: inout bit;
sdrc_d5: inout bit;
sdrc_d6: inout bit;
sdrc_d7: inout bit;
sdrc_d8: inout bit;
sdrc_d9: inout bit;
sdrc_dm0: inout bit;
sdrc_dm1: inout bit;
sdrc_dm2: inout bit;
sdrc_dm3: inout bit;
sdrc_dqs0n: inout bit;
sdrc_dqs0p: inout bit;
sdrc_dqs1n: inout bit;
sdrc_dqs1p: inout bit;
sdrc_dqs2n: inout bit;
sdrc_dqs2p: inout bit;
sdrc_dqs3n: inout bit;
sdrc_dqs3p: inout bit;
sdrc_ncas: inout bit;
sdrc_nclk: inout bit;
sdrc_ncs0: inout bit;
sdrc_ncs1: inout bit;
sdrc_nras: inout bit;
sdrc_nwe: inout bit;
sdrc_odt0: inout bit;
sdrc_strben0: inout bit;
sdrc_strben1: inout bit;
sdrc_strben_dly0: inout bit;
sdrc_strben_dly1: inout bit;
sys_32k: linkage bit;
sys_boot0: inout bit;
sys_boot1: inout bit;
sys_boot2: inout bit;
sys_boot3: inout bit;
sys_boot4: inout bit;
sys_boot5: inout bit;
sys_boot6: inout bit;
sys_boot7: inout bit;
sys_boot8: inout bit;
sys_clkout1: inout bit;
sys_clkout2: inout bit;
sys_clkreq: inout bit;
sys_nirq: inout bit;
sys_nrespwron: in bit;
sys_nreswarm: linkage bit;
sys_xtalin: linkage bit;
sys_xtalout: linkage bit;
tv_out1: linkage bit;
tv_out2: linkage bit;
tv_vfb1: linkage bit;
tv_vfb2: linkage bit;
tv_vref: linkage bit;
uart1_cts: inout bit;
uart1_rts: inout bit;
uart1_rx: inout bit;
uart1_tx: inout bit;
uart2_cts: inout bit;
uart2_rts: inout bit;
uart2_rx: inout bit;
uart2_tx: inout bit;
uart3_cts_rctx: inout bit;
uart3_rts_sd: inout bit;
uart3_rx_irrx: inout bit;
uart3_tx_irtx: inout bit;
usb0_dm: linkage bit;
usb0_dp: linkage bit;
usb0_drvvbus: inout bit;
usb0_id: linkage bit;
usb0_vbus: linkage bit;
CAP_VDDA1P2LDO_USBPHY: linkage bit;
CAP_VDD_DSI: linkage bit;
CAP_VDD_SRAM_CORE : linkage bit;
CAP_VDD_SRAM_MPU: linkage bit;
VDDA1P8V_USBPHY: linkage bit;
VDDA3P3V_USBPHY: linkage bit;
VDDA_DAC: linkage bit;
VDDS: linkage bit_vector (17 downto 0);
VDDSHV: linkage bit_vector (36 downto 0);
VDDSOSC: linkage bit;
VDDS_DPLL_MPU_USBHOST: linkage bit;
VDDS_DPLL_PER_CORE: linkage bit;
VDDS_DSI : linkage bit;
VDDS_SRAM_CORE_BG: linkage bit;
VDDS_SRAM_MPU: linkage bit;
VDD_CORE: linkage bit_vector (30 downto 0);
VPP: linkage bit;
VREFSSTL: linkage bit;
VSS: linkage bit_vector (77 downto 0);
VSSA_DAC: linkage bit;
VSSOSC: linkage bit;
VSS_DSI: linkage bit;
bg_testout: linkage bit);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of AM35x_BGA_491_ZCN : entity is
"STD_1149_1_2001";
attribute PIN_MAP of AM35x_BGA_491_ZCN : entity is PHYSICAL_PIN_MAP;
constant DW : PIN_MAP_STRING :=
"ccdc_data0: AD4 , " &
"ccdc_data1: AE4 , " &
"ccdc_data2: AC5 , " &
"ccdc_data3: AD5 , " &
"ccdc_data4: AE5 , " &
"ccdc_data5: Y6 , " &
"ccdc_data6: AB6 , " &
"ccdc_data7: AC6 , " &
"ccdc_field: AD1 , " &
"ccdc_hd: AE2 , " &
"ccdc_pclk: AD2 , " &
"ccdc_vd: AD3 , " &
"ccdc_wen: AE3 , " &
"ddr_padref: B12 , " &
"dsi_dx0: K23 , " &
"dsi_dx1: L24 , " &
"dsi_dx2: L21 , " &
"dsi_dy0: K22 , " &
"dsi_dy1: L23 , " &
"dsi_dy2: L22 , " &
"dss_acbias: AE24 , " &
"dss_data0: AD24 , " &
"dss_data10: Y22 , " &
"dss_data11: Y23 , " &
"dss_data12: Y24 , " &
"dss_data13: Y25 , " &
"dss_data14: W21 , " &
"dss_data15: W22 , " &
"dss_data16: W23 , " &
"dss_data17: W24 , " &
"dss_data18: W25 , " &
"dss_data19: V24 , " &
"dss_data1: AD25 , " &
"dss_data20: V25 , " &
"dss_data21: U21 , " &
"dss_data22: U22 , " &
"dss_data23: U23 , " &
"dss_data2: AC23 , " &
"dss_data3: AC24 , " &
"dss_data4: AC25 , " &
"dss_data5: AB24 , " &
"dss_data6: AB25 , " &
"dss_data7: AA23 , " &
"dss_data8: AA24 , " &
"dss_data9: AA25 , " &
"dss_hsync: AD22 , " &
"dss_pclk: AE23 , " &
"dss_vsync: AD23 , " &
"etk_clk: AD17 , " &
"etk_ctl: AE18 , " &
"etk_d0: AD18 , " &
"etk_d10: AC20 , " &
"etk_d11: AB20 , " &
"etk_d12: AE21 , " &
"etk_d13: AD21 , " &
"etk_d14: AC21 , " &
"etk_d15: AE22 , " &
"etk_d1: AC18 , " &
"etk_d2: AB18 , " &
"etk_d3: AA18 , " &
"etk_d4: Y18 , " &
"etk_d5: AE19 , " &
"etk_d6: AD19 , " &
"etk_d7: AB19 , " &
"etk_d8: AE20 , " &
"etk_d9: AD20 , " &
"gpmc_a10: G6 , " &
"gpmc_a1: E3 , " &
"gpmc_a2: E2 , " &
"gpmc_a3: E1 , " &
"gpmc_a4: F7 , " &
"gpmc_a5: F6 , " &
"gpmc_a6: F4 , " &
"gpmc_a7: F3 , " &
"gpmc_a8: F2 , " &
"gpmc_a9: F1 , " &
"gpmc_clk: N1 , " &
"gpmc_d0: G5 , " &
"gpmc_d10: J2 , " &
"gpmc_d11: J1 , " &
"gpmc_d12: K4 , " &
"gpmc_d13: K3 , " &
"gpmc_d14: K2 , " &
"gpmc_d15: K1 , " &
"gpmc_d1: G4 , " &
"gpmc_d2: G3 , " &
"gpmc_d3: G2 , " &
"gpmc_d4: G1 , " &
"gpmc_d5: H2 , " &
"gpmc_d6: H1 , " &
"gpmc_d7: J5 , " &
"gpmc_d8: J4 , " &
"gpmc_d9: J3 , " &
"gpmc_nadv_ale: R1 , " &
"gpmc_nbe0_cle: R4 , " &
"gpmc_nbe1: T1 , " &
"gpmc_ncs0: L2 , " &
"gpmc_ncs1: L1 , " &
"gpmc_ncs2: M4 , " &
"gpmc_ncs3: M3 , " &
"gpmc_ncs4: M2 , " &
"gpmc_ncs5: M1 , " &
"gpmc_ncs6: N5 , " &
"gpmc_ncs7: N4 , " &
"gpmc_noe: R2 , " &
"gpmc_nwe: R3 , " &
"gpmc_nwp: T2 , " &
"gpmc_wait0: T3 , " &
"gpmc_wait1: T4 , " &
"gpmc_wait2: T5 , " &
"gpmc_wait3: U1 , " &
"hdq_sio: L25 , " &
"hecc1_rxd: V3 , " &
"hecc1_txd: V2 , " &
"i2c1_scl: V4 , " &
"i2c1_sda: V5 , " &
"i2c2_scl: W1 , " &
"i2c2_sda: W2 , " &
"i2c3_scl: W4 , " &
"i2c3_sda: W5 , " &
"i2c4_scl: U2 , " &
"i2c4_sda: V1 , " &
"jtag_emu0: T25 , " &
"jtag_emu1: R24 , " &
"jtag_ntrst: U24 , " &
"jtag_rtck: T21 , " &
"jtag_tck: U25 , " &
"jtag_tdi: T23 , " &
"jtag_tdo: T24 , " &
"jtag_tms_tmsc: T22 , " &
"mcbsp1_clkr: R25 , " &
"mcbsp1_clkx: N24 , " &
"mcbsp1_dr: P23 , " &
"mcbsp1_dx: P22 , " &
"mcbsp1_fsr: P21 , " &
"mcbsp1_fsx: P24 , " &
"mcbsp2_clkx: C25 , " &
"mcbsp2_dr: B25 , " &
"mcbsp2_dx: D24 , " &
"mcbsp2_fsx: D25 , " &
"mcbsp3_clkx: A24 , " &
"mcbsp3_dr: C24 , " &
"mcbsp3_dx: B24 , " &
"mcbsp3_fsx: C23 , " &
"mcbsp4_clkx: B23 , " &
"mcbsp4_dr: A23 , " &
"mcbsp4_dx: B22 , " &
"mcbsp4_fsx: A22 , " &
"mcbsp_clks: P25 , " &
"mcspi1_clk: AE14 , " &
"mcspi1_cs0: AB15 , " &
"mcspi1_cs1: AD14 , " &
"mcspi1_cs2: AE15 , " &
"mcspi1_cs3: AE16 , " &
"mcspi1_simo: AD15 , " &
"mcspi1_somi: AC15 , " &
"mcspi2_clk: AD16 , " &
"mcspi2_cs0: AA16 , " &
"mcspi2_cs1: AE17 , " &
"mcspi2_simo: AC16 , " &
"mcspi2_somi: AB16 , " &
"mmc1_clk: AA9 , " &
"mmc1_cmd: AB9 , " &
"mmc1_dat0: AC9 , " &
"mmc1_dat1: AD9 , " &
"mmc1_dat2: AE9 , " &
"mmc1_dat3: AA10 , " &
"mmc1_dat4: AB10 , " &
"mmc1_dat5: AC10 , " &
"mmc1_dat6: AD10 , " &
"mmc1_dat7: AE10 , " &
"mmc2_clk: AD11 , " &
"mmc2_cmd: AE11 , " &
"mmc2_dat0: AB12 , " &
"mmc2_dat1: AC12 , " &
"mmc2_dat2: AD12 , " &
"mmc2_dat3: AE12 , " &
"mmc2_dat4: AB13 , " &
"mmc2_dat5: AC13 , " &
"mmc2_dat6: AD13 , " &
"mmc2_dat7: AE13 , " &
"rmii_50mhz_clk: AE8 , " &
"rmii_crs_dv: AB7 , " &
"rmii_mdio_clk: AD6 , " &
"rmii_mdio_data: AE6 , " &
"rmii_rxd0: Y7 , " &
"rmii_rxd1: AA7 , " &
"rmii_rxer: AC7 , " &
"rmii_txd0: AD7 , " &
"rmii_txd1: AE7 , " &
"rmii_txen: AD8 , " &
"sdrc_a0: A11 , " &
"sdrc_a10: A9 , " &
"sdrc_a11: B9 , " &
"sdrc_a12: A8 , " &
"sdrc_a13: B8 , " &
"sdrc_a14: D8 , " &
"sdrc_a1: B11 , " &
"sdrc_a2: C11 , " &
"sdrc_a3: D11 , " &
"sdrc_a4: E11 , " &
"sdrc_a5: A10 , " &
"sdrc_a6: B10 , " &
"sdrc_a7: C10 , " &
"sdrc_a8: D10 , " &
"sdrc_a9: E10 , " &
"sdrc_ba0: A12 , " &
"sdrc_ba1: C13 , " &
"sdrc_ba2: D13 , " &
"sdrc_cke0: D14 , " &
"sdrc_clk: A13 , " &
"sdrc_d0: B21 , " &
"sdrc_d10: C17 , " &
"sdrc_d11: D16 , " &
"sdrc_d12: C16 , " &
"sdrc_d13: B16 , " &
"sdrc_d14: A16 , " &
"sdrc_d15: A15 , " &
"sdrc_d16: A7 , " &
"sdrc_d17: B7 , " &
"sdrc_d18: D7 , " &
"sdrc_d19: E7 , " &
"sdrc_d1: A21 , " &
"sdrc_d20: C6 , " &
"sdrc_d21: D6 , " &
"sdrc_d22: B5 , " &
"sdrc_d23: C5 , " &
"sdrc_d24: B4 , " &
"sdrc_d25: A3 , " &
"sdrc_d26: B3 , " &
"sdrc_d27: C3 , " &
"sdrc_d28: C2 , " &
"sdrc_d29: D2 , " &
"sdrc_d2: D20 , " &
"sdrc_d30: B1 , " &
"sdrc_d31: C1 , " &
"sdrc_d3: C20 , " &
"sdrc_d4: E19 , " &
"sdrc_d5: D19 , " &
"sdrc_d6: C19 , " &
"sdrc_d7: B19 , " &
"sdrc_d8: B18 , " &
"sdrc_d9: D17 , " &
"sdrc_dm0: C21 , " &
"sdrc_dm1: B15 , " &
"sdrc_dm2: E8 , " &
"sdrc_dm3: D1 , " &
"sdrc_dqs0n: A20 , " &
"sdrc_dqs0p: B20 , " &
"sdrc_dqs1n: A17 , " &
"sdrc_dqs1p: B17 , " &
"sdrc_dqs2n: B6 , " &
"sdrc_dqs2p: A6 , " &
"sdrc_dqs3n: B2 , " &
"sdrc_dqs3p: A2 , " &
"sdrc_ncas: E14 , " &
"sdrc_nclk: B13 , " &
"sdrc_ncs0: E13 , " &
"sdrc_ncs1: A14 , " &
"sdrc_nras: C14 , " &
"sdrc_nwe: B14 , " &
"sdrc_odt0: C8 , " &
"sdrc_strben0: A19 , " &
"sdrc_strben1: A5 , " &
"sdrc_strben_dly0: A18 , " &
"sdrc_strben_dly1: A4 , " &
"sys_32k: K24 , " &
"sys_boot0: Y4 , " &
"sys_boot1: AA1 , " &
"sys_boot2: AA2 , " &
"sys_boot3: AA3 , " &
"sys_boot4: AB1 , " &
"sys_boot5: AB2 , " &
"sys_boot6: AC1 , " &
"sys_boot7: AC2 , " &
"sys_boot8: AC3 , " &
"sys_clkout1: N25 , " &
"sys_clkout2: M25 , " &
"sys_clkreq: M24 , " &
"sys_nirq: Y1 , " &
"sys_nrespwron: Y2 , " &
"sys_nreswarm: Y3 , " &
"sys_xtalin: K25 , " &
"sys_xtalout: H25 , " &
"tv_out1: K21 , " &
"tv_out2: H24 , " &
"tv_vfb1: K20 , " &
"tv_vfb2: H23 , " &
"tv_vref: H20 , " &
"uart1_cts: Y20 , " &
"uart1_rts: Y19 , " &
"uart1_rx: W20 , " &
"uart1_tx: AA19 , " &
"uart2_cts: F20 , " &
"uart2_rts: F19 , " &
"uart2_rx: E23 , " &
"uart2_tx: E24 , " &
"uart3_cts_rctx: N2 , " &
"uart3_rts_sd: N3 , " &
"uart3_rx_irrx: P1 , " &
"uart3_tx_irtx: P2 , " &
"usb0_dm: F24 , " &
"usb0_dp: F25 , " &
"usb0_drvvbus: E25 , " &
"usb0_id: G25 , " &
"usb0_vbus: G24 , " &
"CAP_VDDA1P2LDO_USBPHY: F22 , " &
"CAP_VDD_DSI: N21 , " &
"CAP_VDD_SRAM_CORE : E16 , " &
"CAP_VDD_SRAM_MPU: AA12 , " &
"VDDA1P8V_USBPHY: G22 , " &
"VDDA3P3V_USBPHY: F23 , " &
"VDDA_DAC: H21 , " &
"VDDS: (F10, F11, F13, F16, F8 , G10, G11, G13, G14, G16, G17, G8 , R5 , U20, W18, Y9 , H8 , H16) , " &
"VDDSHV: (K19 , L19, P19, P20, R6 , R7 , T19, T20, T6 , T7 , U19, V6 , V7 , W10, W12, W13, W15, W16, W6 , W9 , Y10, Y12, Y13, Y15, Y16, H17, H18, J7 , K5 , K6 , K7 , M5 , M6 , M7 , N19, N6 , N7) , " &
"VDDSOSC: L20 , " &
"VDDS_DPLL_MPU_USBHOST: AA15 , " &
"VDDS_DPLL_PER_CORE: N20 , " &
"VDDS_DSI : N22 , " &
"VDDS_SRAM_CORE_BG: E17 , " &
"VDDS_SRAM_MPU: AA13 , " &
"VDD_CORE: (H10 , H11, H15, J10, J11, J15, J16, K17, K18, K8 , K9 , L18, L8 , L9 , M18, R17, R18, R8 , R9 , T17, T18, T8 , T9 , U10, U11, U15, U16, V10, V11, V15, V16) , " &
"VPP: F17 , " &
"VREFSSTL: F14 , " &
"VSS: (A1 , A25 , AE1 , AE25, P16 , P17 , P18 , R10 , R11 , R12 , R13 , R14 , R15 , R16 , T12 , T13 , T14 , U12 , U13 , U14 , U17 , U18 , U8 , U9 , V12 , V13 , V14 , V17 , V18 , V8 , V9 , H12 , H13 , H14 , H9 , J12 , J13 , J14 , J17 , J18 , J8 , J9 , L10 , L11 , L12 , L13 , L14 , L15 , L16 , L17 , M10 , M11 , M12 , M13 , M14 , M15 , M16 , M17 , M8 , M9 , N12 , N13 , N14 , N17 , N18 , N8 , N9 , P10 , P11 , P12 , P13 , P14 , P15 , P8 , P9 , K12 , K13 , K14) , " &
"VSSA_DAC: H22 , " &
"VSSOSC: J25 , " &
"VSS_DSI: N23 , " &
"bg_testout: H19 " ;
attribute TAP_SCAN_IN of jtag_tdi : signal is true;
attribute TAP_SCAN_MODE of jtag_tms_tmsc : signal is true;
attribute TAP_SCAN_OUT of jtag_tdo : signal is true;
attribute TAP_SCAN_CLOCK of jtag_tck : signal is (5.00000000e+06, BOTH);
-- attribute TAP_SCAN_RESET of jtag_ntrst : signal is true;
attribute COMPLIANCE_PATTERNS of AM35x_BGA_491_ZCN : entity is
"( " &
" jtag_emu0, " &
" jtag_emu1, " &
" jtag_ntrst, " &
" sys_nrespwron) " &
" (1111)";
attribute INSTRUCTION_LENGTH of AM35x_BGA_491_ZCN : entity is 6;
attribute INSTRUCTION_OPCODE of AM35x_BGA_491_ZCN : entity is
"extest (011000)," &
"idcode (000100)," &
"bypass (111111)," &
"sample (011011)," &
"preload (011100)," &
"extest_nopupd (011001), " &
"extest_pulse_ns(100100)," &
"extest_train_ns(100101)," &
"ir_opc_bypass_rsv01(000001)," &
"ir_opc_router(000010)," &
"ir_opc_bypass_rsv02(000011)," &
"ir_opc_icepidcode(000101)," &
"ir_opc_bypass_rsv03(000110)," &
"ir_opc_conpub(000111)," &
"ir_opc_chipspinid(001000)," &
"ir_opc_condbypass48(001001)," &
"ir_opc_condbypass49(001010)," &
"ir_opc_condbypass50(001011)," &
"ir_opc_condbypass51(001100)," &
"ir_opc_condbypass52(001101)," &
"ir_opc_condbypass53(001110)," &
"ir_opc_condbypass54(001111)," &
"ir_opc_condbypass00(010000)," &
"ir_opc_condbypass01(010001)," &
"ir_opc_condbypass02(010010)," &
"ir_opc_condbypass03(010011)," &
"ir_opc_condbypass04(010100)," &
"ir_opc_condbypass05(010101)," &
"ir_opc_condbypass06(010110)," &
"ir_opc_condbypass07(010111)," &
"ir_opc_condbypass10(011010)," &
"ir_opc_condbypass13(011101)," &
"ir_opc_condbypass14(011110)," &
"ir_opc_condbypass15(011111)," &
"ir_opc_condbypass16(100000)," &
"ir_opc_condbypass17(100001)," &
"ir_opc_condbypass18(100010)," &
"ir_opc_condbypass19(100011)," &
"ir_opc_condbypass22(100110)," &
"ir_opc_condbypass23(100111)," &
"ir_opc_condbypass24(101000)," &
"ir_opc_condbypass25(101001)," &
"ir_opc_condbypass26(101010)," &
"ir_opc_condbypass27(101011)," &
"ir_opc_condbypass28(101100)," &
"ir_opc_condbypass29(101101)," &
"ir_opc_condbypass30(101110)," &
"ir_opc_condbypass31(101111)," &
"ir_opc_condbypass32(110000)," &
"ir_opc_condbypass33(110001)," &
"ir_opc_condbypass34(110010)," &
"ir_opc_condbypass35(110011)," &
"ir_opc_condbypass36(110100)," &
"ir_opc_condbypass37(110101)," &
"ir_opc_condbypass38(110110)," &
"ir_opc_condbypass39(110111)," &
"ir_opc_condbypass40(111000)," &
"ir_opc_condbypass41(111001)," &
"ir_opc_condbypass42(111010)," &
"ir_opc_condbypass43(111011)," &
"ir_opc_condbypass44(111100)," &
"ir_opc_condbypass45(111101)," &
"ir_opc_condbypass46(111110)" ;
attribute INSTRUCTION_CAPTURE of AM35x_BGA_491_ZCN : entity is "000001";
attribute INSTRUCTION_PRIVATE of AM35x_BGA_491_ZCN : entity is
"extest_pulse_ns," &
"extest_train_ns," &
"ir_opc_bypass_rsv01," &
"ir_opc_router," &
"ir_opc_bypass_rsv02," &
"ir_opc_icepidcode," &
"ir_opc_bypass_rsv03," &
"ir_opc_conpub," &
"ir_opc_chipspinid," &
"ir_opc_condbypass48," &
"ir_opc_condbypass49," &
"ir_opc_condbypass50," &
"ir_opc_condbypass51," &
"ir_opc_condbypass52," &
"ir_opc_condbypass53," &
"ir_opc_condbypass54," &
"ir_opc_condbypass00," &
"ir_opc_condbypass01," &
"ir_opc_condbypass02," &
"ir_opc_condbypass03," &
"ir_opc_condbypass04," &
"ir_opc_condbypass05," &
"ir_opc_condbypass06," &
"ir_opc_condbypass07," &
"ir_opc_condbypass10," &
"ir_opc_condbypass13," &
"ir_opc_condbypass14," &
"ir_opc_condbypass15," &
"ir_opc_condbypass16," &
"ir_opc_condbypass17," &
"ir_opc_condbypass18," &
"ir_opc_condbypass19," &
"ir_opc_condbypass22," &
"ir_opc_condbypass23," &
"ir_opc_condbypass24," &
"ir_opc_condbypass25," &
"ir_opc_condbypass26," &
"ir_opc_condbypass27," &
"ir_opc_condbypass28," &
"ir_opc_condbypass29," &
"ir_opc_condbypass30," &
"ir_opc_condbypass31," &
"ir_opc_condbypass32," &
"ir_opc_condbypass33," &
"ir_opc_condbypass34," &
"ir_opc_condbypass35," &
"ir_opc_condbypass36," &
"ir_opc_condbypass37," &
"ir_opc_condbypass38," &
"ir_opc_condbypass39," &
"ir_opc_condbypass40," &
"ir_opc_condbypass41," &
"ir_opc_condbypass42," &
"ir_opc_condbypass43," &
"ir_opc_condbypass44," &
"ir_opc_condbypass45," &
"ir_opc_condbypass46";
-----------------
-- Device ID Code
-----------------
attribute IDCODE_REGISTER of AM35x_BGA_491_ZCN : entity is
-- version, part number, manufacturer code of ti, lsb
"0000" &
"1011100001101000" &
"00000010111" &
"1";
attribute REGISTER_ACCESS of AM35x_BGA_491_ZCN : entity is
"BOUNDARY (extest,sample,preload, extest_nopupd, extest_train_ns, extest_pulse_ns), " &
"BYPASS (bypass)";
attribute BOUNDARY_LENGTH of AM35x_BGA_491_ZCN : entity is 835;
attribute BOUNDARY_REGISTER of AM35x_BGA_491_ZCN : entity is
------------------------------------------------------------------------
-- CELL CELL PIN CELL SAFE CNTRL DIS DIS
-- # NAME , NAME ,TYPE ,VALU ,CELL ,ABLE,VAL
------------------------------------------------------------------------
"0 (bc_1, *, control, 1)," &
"1 (bc_1, sdrc_dm0, output3, X, 0, 1, Z)," &
"2 (bc_4, sdrc_dm0, input, X)," &
"3 (bc_1, *, control, 1)," &
"4 (bc_1, sdrc_d0, output3, X, 3, 1, Z)," &
"5 (bc_4, sdrc_d0, input, X)," &
"6 (bc_1, *, control, 1)," &
"7 (bc_1, sdrc_d1, output3, X, 6, 1, Z)," &
"8 (bc_4, sdrc_d1, input, X)," &
"9 (bc_1, *, control, 1)," &
"10 (bc_1, sdrc_d2, output3, X, 9, 1, Z)," &
"11 (bc_4, sdrc_d2, input, X)," &
"12 (bc_1, *, control, 1)," &
"13 (bc_1, sdrc_d3, output3, X, 12, 1, Z)," &
"14 (bc_4, sdrc_d3, input, X)," &
"15 (bc_1, *, control, 1)," &
"16 (bc_1, sdrc_dqs0p, output3, X, 15, 1, Z)," &
"17 (bc_4, sdrc_dqs0p, input, X)," &
"18 (bc_1, *, control, 1)," &
"19 (bc_1, sdrc_dqs0n, output3, X, 18, 1, Z)," &
"20 (bc_4, sdrc_dqs0n, input, X)," &
"21 (bc_1, *, control, 1)," &
"22 (bc_1, sdrc_d4, output3, X, 21, 1, Z)," &
"23 (bc_4, sdrc_d4, input, X)," &
"24 (bc_1, *, control, 1)," &
"25 (bc_1, sdrc_d5, output3, X, 24, 1, Z)," &
"26 (bc_4, sdrc_d5, input, X)," &
"27 (bc_1, *, control, 1)," &
"28 (bc_1, sdrc_d6, output3, X, 27, 1, Z)," &
"29 (bc_4, sdrc_d6, input, X)," &
"30 (bc_1, *, control, 1)," &
"31 (bc_1, sdrc_d7, output3, X, 30, 1, Z)," &
"32 (bc_4, sdrc_d7, input, X)," &
"33 (bc_1, *, control, 1)," &
"34 (bc_1, sdrc_strben0, output3, X, 33, 1, Z)," &
"35 (bc_4, sdrc_strben0, input, X)," &
"36 (bc_1, *, control, 1)," &
"37 (bc_1, sdrc_strben_dly0, output3, X, 36, 1, Z)," &
"38 (bc_4, sdrc_strben_dly0, input, X)," &
"39 (bc_1, *, control, 1)," &
"40 (bc_1, sdrc_d8, output3, X, 39, 1, Z)," &
"41 (bc_4, sdrc_d8, input, X)," &
"42 (bc_1, *, control, 1)," &
"43 (bc_1, sdrc_d9, output3, X, 42, 1, Z)," &
"44 (bc_4, sdrc_d9, input, X)," &
"45 (bc_1, *, control, 1)," &
"46 (bc_1, sdrc_d10, output3, X, 45, 1, Z)," &
"47 (bc_4, sdrc_d10, input, X)," &
"48 (bc_1, *, control, 1)," &
"49 (bc_1, sdrc_d11, output3, X, 48, 1, Z)," &
"50 (bc_4, sdrc_d11, input, X)," &
"51 (bc_1, *, control, 1)," &
"52 (bc_1, sdrc_dqs1p, output3, X, 51, 1, Z)," &
"53 (bc_4, sdrc_dqs1p, input, X)," &
"54 (bc_1, *, control, 1)," &
"55 (bc_1, sdrc_dqs1n, output3, X, 54, 1, Z)," &
"56 (bc_4, sdrc_dqs1n, input, X)," &
"57 (bc_1, *, control, 1)," &
"58 (bc_1, sdrc_d12, output3, X, 57, 1, Z)," &
"59 (bc_4, sdrc_d12, input, X)," &
"60 (bc_1, *, control, 1)," &
"61 (bc_1, sdrc_d13, output3, X, 60, 1, Z)," &
"62 (bc_4, sdrc_d13, input, X)," &
"63 (bc_1, *, control, 1)," &
"64 (bc_1, sdrc_d14, output3, X, 63, 1, Z)," &
"65 (bc_4, sdrc_d14, input, X)," &
"66 (bc_1, *, control, 1)," &
"67 (bc_1, sdrc_d15, output3, X, 66, 1, Z)," &
"68 (bc_4, sdrc_d15, input, X)," &
"69 (bc_1, *, control, 1)," &
"70 (bc_1, sdrc_dm1, output3, X, 69, 1, Z)," &
"71 (bc_4, sdrc_dm1, input, X)," &
"72 (bc_1, *, control, 1)," &
"73 (bc_1, sdrc_ncs1, output3, X, 72, 1, Z)," &
"74 (bc_4, sdrc_ncs1, input, X)," &
"75 (bc_1, *, control, 1)," &
"76 (bc_1, sdrc_ncs0, output3, X, 75, 1, Z)," &
"77 (bc_4, sdrc_ncs0, input, X)," &
"78 (bc_1, *, control, 1)," &
"79 (bc_1, sdrc_ncas, output3, X, 78, 1, Z)," &
"80 (bc_4, sdrc_ncas, input, X)," &
"81 (bc_1, *, control, 1)," &
"82 (bc_1, sdrc_cke0, output3, X, 81, 1, Z)," &
"83 (bc_4, sdrc_cke0, input, X)," &
"84 (bc_1, *, control, 1)," &
"85 (bc_1, sdrc_nras, output3, X, 84, 1, Z)," &
"86 (bc_4, sdrc_nras, input, X)," &
"87 (bc_1, *, control, 1)," &
"88 (bc_1, sdrc_nwe, output3, X, 87, 1, Z)," &
"89 (bc_4, sdrc_nwe, input, X)," &
"90 (bc_1, *, control, 1)," &
"91 (bc_1, sdrc_clk, output3, X, 90, 1, Z)," &
"92 (bc_4, sdrc_clk, input, X)," &
"93 (bc_1, *, control, 1)," &
"94 (bc_1, sdrc_nclk, output3, X, 93, 1, Z)," &
"95 (bc_4, sdrc_nclk, input, X)," &
"96 (bc_1, *, control, 1)," &
"97 (bc_1, sdrc_ba2, output3, X, 96, 1, Z)," &
"98 (bc_4, sdrc_ba2, input, X)," &
"99 (bc_1, *, control, 1)," &
"100 (bc_1, sdrc_ba1, output3, X, 99, 1, Z)," &
"101 (bc_4, sdrc_ba1, input, X)," &
"102 (bc_1, *, control, 1)," &
"103 (bc_1, sdrc_ba0, output3, X, 102, 1, Z)," &
"104 (bc_4, sdrc_ba0, input, X)," &
"105 (bc_1, *, control, 1)," &
"106 (bc_1, sdrc_a0, output3, X, 105, 1, Z)," &
"107 (bc_4, sdrc_a0, input, X)," &
"108 (bc_1, *, control, 1)," &
"109 (bc_1, sdrc_a1, output3, X, 108, 1, Z)," &
"110 (bc_4, sdrc_a1, input, X)," &
"111 (bc_1, *, control, 1)," &
"112 (bc_1, sdrc_a2, output3, X, 111, 1, Z)," &
"113 (bc_4, sdrc_a2, input, X)," &
"114 (bc_1, *, control, 1)," &
"115 (bc_1, sdrc_a3, output3, X, 114, 1, Z)," &
"116 (bc_4, sdrc_a3, input, X)," &
"117 (bc_1, *, control, 1)," &
"118 (bc_1, sdrc_a4, output3, X, 117, 1, Z)," &
"119 (bc_4, sdrc_a4, input, X)," &
"120 (bc_1, *, control, 1)," &
"121 (bc_1, sdrc_a5, output3, X, 120, 1, Z)," &
"122 (bc_4, sdrc_a5, input, X)," &
"123 (bc_1, *, control, 1)," &
"124 (bc_1, sdrc_a6, output3, X, 123, 1, Z)," &
"125 (bc_4, sdrc_a6, input, X)," &
"126 (bc_1, *, control, 1)," &
"127 (bc_1, sdrc_a7, output3, X, 126, 1, Z)," &
"128 (bc_4, sdrc_a7, input, X)," &
"129 (bc_1, *, control, 1)," &
"130 (bc_1, sdrc_a8, output3, X, 129, 1, Z)," &
"131 (bc_4, sdrc_a8, input, X)," &
"132 (bc_1, *, control, 1)," &
"133 (bc_1, sdrc_a9, output3, X, 132, 1, Z)," &
"134 (bc_4, sdrc_a9, input, X)," &
"135 (bc_1, *, control, 1)," &
"136 (bc_1, sdrc_a10, output3, X, 135, 1, Z)," &
"137 (bc_4, sdrc_a10, input, X)," &
"138 (bc_1, *, control, 1)," &
"139 (bc_1, sdrc_a11, output3, X, 138, 1, Z)," &
"140 (bc_4, sdrc_a11, input, X)," &
"141 (bc_1, *, control, 1)," &
"142 (bc_1, sdrc_a12, output3, X, 141, 1, Z)," &
"143 (bc_4, sdrc_a12, input, X)," &
"144 (bc_1, *, control, 1)," &
"145 (bc_1, sdrc_a13, output3, X, 144, 1, Z)," &
"146 (bc_4, sdrc_a13, input, X)," &
"147 (bc_1, *, control, 1)," &
"148 (bc_1, sdrc_odt0, output3, X, 147, 1, Z)," &
"149 (bc_4, sdrc_odt0, input, X)," &
"150 (bc_1, *, control, 1)," &
"151 (bc_1, sdrc_a14, output3, X, 150, 1, Z)," &
"152 (bc_4, sdrc_a14, input, X)," &
"153 (bc_1, *, control, 1)," &
"154 (bc_1, sdrc_dm2, output3, X, 153, 1, Z)," &
"155 (bc_4, sdrc_dm2, input, X)," &
"156 (bc_1, *, control, 1)," &
"157 (bc_1, sdrc_d16, output3, X, 156, 1, Z)," &
"158 (bc_4, sdrc_d16, input, X)," &
"159 (bc_1, *, control, 1)," &
"160 (bc_1, sdrc_d17, output3, X, 159, 1, Z)," &
"161 (bc_4, sdrc_d17, input, X)," &
"162 (bc_1, *, control, 1)," &
"163 (bc_1, sdrc_d18, output3, X, 162, 1, Z)," &
"164 (bc_4, sdrc_d18, input, X)," &
"165 (bc_1, *, control, 1)," &
"166 (bc_1, sdrc_d19, output3, X, 165, 1, Z)," &
"167 (bc_4, sdrc_d19, input, X)," &
"168 (bc_1, *, control, 1)," &
"169 (bc_1, sdrc_dqs2p, output3, X, 168, 1, Z)," &
"170 (bc_4, sdrc_dqs2p, input, X)," &
"171 (bc_1, *, control, 1)," &
"172 (bc_1, sdrc_dqs2n, output3, X, 171, 1, Z)," &
"173 (bc_4, sdrc_dqs2n, input, X)," &
"174 (bc_1, *, control, 1)," &
"175 (bc_1, sdrc_d20, output3, X, 174, 1, Z)," &
"176 (bc_4, sdrc_d20, input, X)," &
"177 (bc_1, *, control, 1)," &
"178 (bc_1, sdrc_d21, output3, X, 177, 1, Z)," &
"179 (bc_4, sdrc_d21, input, X)," &
"180 (bc_1, *, control, 1)," &
"181 (bc_1, sdrc_d22, output3, X, 180, 1, Z)," &
"182 (bc_4, sdrc_d22, input, X)," &
"183 (bc_1, *, control, 1)," &
"184 (bc_1, sdrc_d23, output3, X, 183, 1, Z)," &
"185 (bc_4, sdrc_d23, input, X)," &
"186 (bc_1, *, control, 1)," &
"187 (bc_1, sdrc_strben1, output3, X, 186, 1, Z)," &
"188 (bc_4, sdrc_strben1, input, X)," &
"189 (bc_1, *, control, 1)," &
"190 (bc_1, sdrc_strben_dly1, output3, X, 189, 1, Z)," &
"191 (bc_4, sdrc_strben_dly1, input, X)," &
"192 (bc_1, *, control, 1)," &
"193 (bc_1, sdrc_d24, output3, X, 192, 1, Z)," &
"194 (bc_4, sdrc_d24, input, X)," &
"195 (bc_1, *, control, 1)," &
"196 (bc_1, sdrc_d25, output3, X, 195, 1, Z)," &
"197 (bc_4, sdrc_d25, input, X)," &
"198 (bc_1, *, control, 1)," &
"199 (bc_1, sdrc_d26, output3, X, 198, 1, Z)," &
"200 (bc_4, sdrc_d26, input, X)," &
"201 (bc_1, *, control, 1)," &
"202 (bc_1, sdrc_d27, output3, X, 201, 1, Z)," &
"203 (bc_4, sdrc_d27, input, X)," &
"204 (bc_1, *, control, 1)," &
"205 (bc_1, sdrc_dqs3p, output3, X, 204, 1, Z)," &
"206 (bc_4, sdrc_dqs3p, input, X)," &
"207 (bc_1, *, control, 1)," &
"208 (bc_1, sdrc_dqs3n, output3, X, 207, 1, Z)," &
"209 (bc_4, sdrc_dqs3n, input, X)," &
"210 (bc_1, *, control, 1)," &
"211 (bc_1, sdrc_d28, output3, X, 210, 1, Z)," &
"212 (bc_4, sdrc_d28, input, X)," &
"213 (bc_1, *, control, 1)," &
"214 (bc_1, sdrc_d29, output3, X, 213, 1, Z)," &
"215 (bc_4, sdrc_d29, input, X)," &
"216 (bc_1, *, control, 1)," &
"217 (bc_1, sdrc_d30, output3, X, 216, 1, Z)," &
"218 (bc_4, sdrc_d30, input, X)," &
"219 (bc_1, *, control, 1)," &
"220 (bc_1, sdrc_d31, output3, X, 219, 1, Z)," &
"221 (bc_4, sdrc_d31, input, X)," &
"222 (bc_1, *, control, 1)," &
"223 (bc_1, sdrc_dm3, output3, X, 222, 1, Z)," &
"224 (bc_4, sdrc_dm3, input, X)," &
"225 (bc_1, *, control, 1)," &
"226 (bc_1, gpmc_a1, output3, X, 225, 1, Z)," &
"227 (bc_1, gpmc_a1, input, X)," &
"228 (bc_1, *, control, 1)," &
"229 (bc_1, gpmc_a2, output3, X, 228, 1, Z)," &
"230 (bc_1, gpmc_a2, input, X)," &
"231 (bc_1, *, control, 1)," &
"232 (bc_1, gpmc_a3, output3, X, 231, 1, Z)," &
"233 (bc_1, gpmc_a3, input, X)," &
"234 (bc_1, *, control, 1)," &
"235 (bc_1, gpmc_a4, output3, X, 234, 1, Z)," &
"236 (bc_1, gpmc_a4, input, X)," &
"237 (bc_1, *, control, 1)," &
"238 (bc_1, gpmc_a5, output3, X, 237, 1, Z)," &
"239 (bc_1, gpmc_a5, input, X)," &
"240 (bc_1, *, control, 1)," &
"241 (bc_1, gpmc_a6, output3, X, 240, 1, Z)," &
"242 (bc_1, gpmc_a6, input, X)," &
"243 (bc_1, *, control, 1)," &
"244 (bc_1, gpmc_a7, output3, X, 243, 1, Z)," &
"245 (bc_1, gpmc_a7, input, X)," &
"246 (bc_1, *, control, 1)," &
"247 (bc_1, gpmc_a8, output3, X, 246, 1, Z)," &
"248 (bc_1, gpmc_a8, input, X)," &
"249 (bc_1, *, control, 1)," &
"250 (bc_1, gpmc_a9, output3, X, 249, 1, Z)," &
"251 (bc_1, gpmc_a9, input, X)," &
"252 (bc_1, *, control, 1)," &
"253 (bc_1, gpmc_a10, output3, X, 252, 1, Z)," &
"254 (bc_1, gpmc_a10, input, X)," &
"255 (bc_1, *, control, 1)," &
"256 (bc_1, gpmc_d0, output3, X, 255, 1, Z)," &
"257 (bc_1, gpmc_d0, input, X)," &
"258 (bc_1, *, control, 1)," &
"259 (bc_1, gpmc_d1, output3, X, 258, 1, Z)," &
"260 (bc_1, gpmc_d1, input, X)," &
"261 (bc_1, *, control, 1)," &
"262 (bc_1, gpmc_d2, output3, X, 261, 1, Z)," &
"263 (bc_1, gpmc_d2, input, X)," &
"264 (bc_1, *, control, 1)," &
"265 (bc_1, gpmc_d3, output3, X, 264, 1, Z)," &
"266 (bc_1, gpmc_d3, input, X)," &
"267 (bc_1, *, control, 1)," &
"268 (bc_1, gpmc_d4, output3, X, 267, 1, Z)," &
"269 (bc_1, gpmc_d4, input, X)," &
"270 (bc_1, *, control, 1)," &
"271 (bc_1, gpmc_d5, output3, X, 270, 1, Z)," &
"272 (bc_1, gpmc_d5, input, X)," &
"273 (bc_1, *, control, 1)," &
"274 (bc_1, gpmc_d6, output3, X, 273, 1, Z)," &
"275 (bc_1, gpmc_d6, input, X)," &
"276 (bc_1, *, control, 1)," &
"277 (bc_1, gpmc_d7, output3, X, 276, 1, Z)," &
"278 (bc_1, gpmc_d7, input, X)," &
"279 (bc_1, *, control, 1)," &
"280 (bc_1, gpmc_d8, output3, X, 279, 1, Z)," &
"281 (bc_1, gpmc_d8, input, X)," &
"282 (bc_1, *, control, 1)," &
"283 (bc_1, gpmc_d9, output3, X, 282, 1, Z)," &
"284 (bc_1, gpmc_d9, input, X)," &
"285 (bc_1, *, control, 1)," &
"286 (bc_1, gpmc_d10, output3, X, 285, 1, Z)," &
"287 (bc_1, gpmc_d10, input, X)," &
"288 (bc_1, *, control, 1)," &
"289 (bc_1, gpmc_d11, output3, X, 288, 1, Z)," &
"290 (bc_1, gpmc_d11, input, X)," &
"291 (bc_1, *, control, 1)," &
"292 (bc_1, gpmc_d12, output3, X, 291, 1, Z)," &
"293 (bc_1, gpmc_d12, input, X)," &
"294 (bc_1, *, control, 1)," &
"295 (bc_1, gpmc_d13, output3, X, 294, 1, Z)," &
"296 (bc_1, gpmc_d13, input, X)," &
"297 (bc_1, *, control, 1)," &
"298 (bc_1, gpmc_d14, output3, X, 297, 1, Z)," &
"299 (bc_1, gpmc_d14, input, X)," &
"300 (bc_1, *, control, 1)," &
"301 (bc_1, gpmc_d15, output3, X, 300, 1, Z)," &
"302 (bc_1, gpmc_d15, input, X)," &
"303 (bc_1, *, control, 1)," &
"304 (bc_1, gpmc_ncs0, output3, X, 303, 1, Z)," &
"305 (bc_1, gpmc_ncs0, input, X)," &
"306 (bc_1, *, control, 1)," &
"307 (bc_1, gpmc_ncs1, output3, X, 306, 1, Z)," &
"308 (bc_1, gpmc_ncs1, input, X)," &
"309 (bc_1, *, control, 1)," &
"310 (bc_1, gpmc_ncs2, output3, X, 309, 1, Z)," &
"311 (bc_1, gpmc_ncs2, input, X)," &
"312 (bc_1, *, control, 1)," &
"313 (bc_1, gpmc_ncs3, output3, X, 312, 1, Z)," &
"314 (bc_1, gpmc_ncs3, input, X)," &
"315 (bc_1, *, control, 1)," &
"316 (bc_1, gpmc_ncs4, output3, X, 315, 1, Z)," &
"317 (bc_1, gpmc_ncs4, input, X)," &
"318 (bc_1, *, control, 1)," &
"319 (bc_1, gpmc_ncs5, output3, X, 318, 1, Z)," &
"320 (bc_1, gpmc_ncs5, input, X)," &
"321 (bc_1, *, control, 1)," &
"322 (bc_1, gpmc_ncs6, output3, X, 321, 1, Z)," &
"323 (bc_1, gpmc_ncs6, input, X)," &
"324 (bc_1, *, control, 1)," &
"325 (bc_1, gpmc_ncs7, output3, X, 324, 1, Z)," &
"326 (bc_1, gpmc_ncs7, input, X)," &
"327 (bc_1, *, control, 1)," &
"328 (bc_1, gpmc_clk, output3, X, 327, 1, Z)," &
"329 (bc_1, gpmc_clk, input, X)," &
"330 (bc_1, *, control, 1)," &
"331 (bc_1, uart3_cts_rctx, output3, X, 330, 1, Z)," &
"332 (bc_1, uart3_cts_rctx, input, X)," &
"333 (bc_1, *, control, 1)," &
"334 (bc_1, uart3_rts_sd, output3, X, 333, 1, Z)," &
"335 (bc_1, uart3_rts_sd, input, X)," &
"336 (bc_1, *, control, 1)," &
"337 (bc_1, uart3_rx_irrx, output3, X, 336, 1, Z)," &
"338 (bc_1, uart3_rx_irrx, input, X)," &
"339 (bc_1, *, control, 1)," &
"340 (bc_1, uart3_tx_irtx, output3, X, 339, 1, Z)," &
"341 (bc_1, uart3_tx_irtx, input, X)," &
"342 (bc_1, *, control, 1)," &
"343 (bc_1, gpmc_nadv_ale, output3, X, 342, 1, Z)," &
"344 (bc_1, gpmc_nadv_ale, input, X)," &
"345 (bc_1, *, control, 1)," &
"346 (bc_1, gpmc_noe, output3, X, 345, 1, Z)," &
"347 (bc_1, gpmc_noe, input, X)," &
"348 (bc_1, *, control, 1)," &
"349 (bc_1, gpmc_nwe, output3, X, 348, 1, Z)," &
"350 (bc_1, gpmc_nwe, input, X)," &
"351 (bc_1, *, control, 1)," &
"352 (bc_1, gpmc_nbe0_cle, output3, X, 351, 1, Z)," &
"353 (bc_1, gpmc_nbe0_cle, input, X)," &
"354 (bc_1, *, control, 1)," &
"355 (bc_1, gpmc_nbe1, output3, X, 354, 1, Z)," &
"356 (bc_1, gpmc_nbe1, input, X)," &
"357 (bc_1, *, control, 1)," &
"358 (bc_1, gpmc_nwp, output3, X, 357, 1, Z)," &
"359 (bc_1, gpmc_nwp, input, X)," &
"360 (bc_1, *, control, 1)," &
"361 (bc_1, gpmc_wait0, output3, X, 360, 1, Z)," &
"362 (bc_1, gpmc_wait0, input, X)," &
"363 (bc_1, *, control, 1)," &
"364 (bc_1, gpmc_wait1, output3, X, 363, 1, Z)," &
"365 (bc_1, gpmc_wait1, input, X)," &
"366 (bc_1, *, control, 1)," &
"367 (bc_1, gpmc_wait2, output3, X, 366, 1, Z)," &
"368 (bc_1, gpmc_wait2, input, X)," &
"369 (bc_1, *, control, 1)," &
"370 (bc_1, gpmc_wait3, output3, X, 369, 1, Z)," &
"371 (bc_1, gpmc_wait3, input, X)," &
"372 (bc_1, *, control, 1)," &
"373 (bc_1, hecc1_txd, output3, X, 372, 1, Z)," &
"374 (bc_1, hecc1_txd, input, X)," &
"375 (bc_1, *, control, 1)," &
"376 (bc_1, hecc1_rxd, output3, X, 375, 1, Z)," &
"377 (bc_1, hecc1_rxd, input, X)," &
"378 (bc_1, i2c1_scl, output2, 1, 378, 1, weak1)," &
"379 (bc_1, *, internal,0)," &
"380 (bc_1, i2c1_scl, input, X)," &
"381 (bc_1, i2c1_sda, output2, 1, 381, 1, weak1)," &
"382 (bc_1, *, internal,0)," &
"383 (bc_1, i2c1_sda, input, X)," &
"384 (bc_1, i2c2_scl, output2, 1, 384, 1, weak1)," &
"385 (bc_1, *, internal,0)," &
"386 (bc_1, i2c2_scl, input, X)," &
"387 (bc_1, i2c2_sda, output2, 1, 387, 1, weak1)," &
"388 (bc_1, *, internal,0)," &
"389 (bc_1, i2c2_sda, input, X)," &
"390 (bc_1, i2c3_scl, output2, 1, 390, 1, weak1)," &
"391 (bc_1, *, internal,0)," &
"392 (bc_1, i2c3_scl, input, X)," &
"393 (bc_1, i2c3_sda, output2, 1, 393, 1, weak1)," &
"394 (bc_1, *, internal,0)," &
"395 (bc_1, i2c3_sda, input, X)," &
"396 (bc_1, *, control, 1)," &
"397 (bc_1, sys_nirq, output3, X, 396, 1, Z)," &
"398 (bc_1, sys_nirq, input, X)," &
"399 (bc_1, *, control, 1)," &
"400 (bc_1, sys_boot7, output3, X, 399, 1, Z)," &
"401 (bc_1, sys_boot7, input, X)," &
"402 (bc_1, *, control, 1)," &
"403 (bc_1, sys_boot8, output3, X, 402, 1, Z)," &
"404 (bc_1, sys_boot8, input, X)," &
"405 (bc_1, *, control, 1)," &
"406 (bc_1, ccdc_pclk, output3, X, 405, 1, Z)," &
"407 (bc_1, ccdc_pclk, input, X)," &
"408 (bc_1, *, control, 1)," &
"409 (bc_1, ccdc_field, output3, X, 408, 1, Z)," &
"410 (bc_1, ccdc_field, input, X)," &
"411 (bc_1, *, control, 1)," &
"412 (bc_1, ccdc_hd, output3, X, 411, 1, Z)," &
"413 (bc_1, ccdc_hd, input, X)," &
"414 (bc_1, *, control, 1)," &
"415 (bc_1, ccdc_vd, output3, X, 414, 1, Z)," &
"416 (bc_1, ccdc_vd, input, X)," &
"417 (bc_1, *, control, 1)," &
"418 (bc_1, ccdc_wen, output3, X, 417, 1, Z)," &
"419 (bc_1, ccdc_wen, input, X)," &
"420 (bc_1, *, control, 1)," &
"421 (bc_1, ccdc_data0, output3, X, 420, 1, Z)," &
"422 (bc_1, ccdc_data0, input, X)," &
"423 (bc_1, *, control, 1)," &
"424 (bc_1, ccdc_data1, output3, X, 423, 1, Z)," &
"425 (bc_1, ccdc_data1, input, X)," &
"426 (bc_1, *, control, 1)," &
"427 (bc_1, ccdc_data2, output3, X, 426, 1, Z)," &
"428 (bc_1, ccdc_data2, input, X)," &
"429 (bc_1, *, control, 1)," &
"430 (bc_1, ccdc_data3, output3, X, 429, 1, Z)," &
"431 (bc_1, ccdc_data3, input, X)," &
"432 (bc_1, *, control, 1)," &
"433 (bc_1, ccdc_data4, output3, X, 432, 1, Z)," &
"434 (bc_1, ccdc_data4, input, X)," &
"435 (bc_1, *, control, 1)," &
"436 (bc_1, ccdc_data5, output3, X, 435, 1, Z)," &
"437 (bc_1, ccdc_data5, input, X)," &
"438 (bc_1, *, control, 1)," &
"439 (bc_1, ccdc_data6, output3, X, 438, 1, Z)," &
"440 (bc_1, ccdc_data6, input, X)," &
"441 (bc_1, *, control, 1)," &
"442 (bc_1, ccdc_data7, output3, X, 441, 1, Z)," &
"443 (bc_1, ccdc_data7, input, X)," &
"444 (bc_1, *, control, 1)," &
"445 (bc_1, rmii_mdio_data, output3, X, 444, 1, Z)," &
"446 (bc_1, rmii_mdio_data, input, X)," &
"447 (bc_1, *, control, 1)," &
"448 (bc_1, rmii_mdio_clk, output3, X, 447, 1, Z)," &
"449 (bc_1, rmii_mdio_clk, input, X)," &
"450 (bc_1, *, control, 1)," &
"451 (bc_1, rmii_rxd0, output3, X, 450, 1, Z)," &
"452 (bc_1, rmii_rxd0, input, X)," &
"453 (bc_1, *, control, 1)," &
"454 (bc_1, rmii_rxd1, output3, X, 453, 1, Z)," &
"455 (bc_1, rmii_rxd1, input, X)," &
"456 (bc_1, *, control, 1)," &
"457 (bc_1, rmii_crs_dv, output3, X, 456, 1, Z)," &
"458 (bc_1, rmii_crs_dv, input, X)," &
"459 (bc_1, *, control, 1)," &
"460 (bc_1, rmii_rxer, output3, X, 459, 1, Z)," &
"461 (bc_1, rmii_rxer, input, X)," &
"462 (bc_1, *, control, 1)," &
"463 (bc_1, rmii_txd0, output3, X, 462, 1, Z)," &
"464 (bc_1, rmii_txd0, input, X)," &
"465 (bc_1, *, control, 1)," &
"466 (bc_1, rmii_txd1, output3, X, 465, 1, Z)," &
"467 (bc_1, rmii_txd1, input, X)," &
"468 (bc_1, *, control, 1)," &
"469 (bc_1, rmii_txen, output3, X, 468, 1, Z)," &
"470 (bc_1, rmii_txen, input, X)," &
"471 (bc_1, *, control, 1)," &
"472 (bc_1, rmii_50mhz_clk, output3, X, 471, 1, Z)," &
"473 (bc_1, rmii_50mhz_clk, input, X)," &
"474 (bc_1, *, control, 1)," &
"475 (bc_1, mmc1_clk, output3, X, 474, 1, Z)," &
"476 (bc_1, mmc1_clk, input, X)," &
"477 (bc_1, *, control, 1)," &
"478 (bc_1, mmc1_cmd, output3, X, 477, 1, Z)," &
"479 (bc_1, mmc1_cmd, input, X)," &
"480 (bc_1, *, control, 1)," &
"481 (bc_1, mmc1_dat0, output3, X, 480, 1, Z)," &
"482 (bc_1, mmc1_dat0, input, X)," &
"483 (bc_1, *, control, 1)," &
"484 (bc_1, mmc1_dat1, output3, X, 483, 1, Z)," &
"485 (bc_1, mmc1_dat1, input, X)," &
"486 (bc_1, *, control, 1)," &
"487 (bc_1, mmc1_dat2, output3, X, 486, 1, Z)," &
"488 (bc_1, mmc1_dat2, input, X)," &
"489 (bc_1, *, control, 1)," &
"490 (bc_1, mmc1_dat3, output3, X, 489, 1, Z)," &
"491 (bc_1, mmc1_dat3, input, X)," &
"492 (bc_1, *, control, 1)," &
"493 (bc_1, mmc1_dat4, output3, X, 492, 1, Z)," &
"494 (bc_1, mmc1_dat4, input, X)," &
"495 (bc_1, *, control, 1)," &
"496 (bc_1, mmc1_dat5, output3, X, 495, 1, Z)," &
"497 (bc_1, mmc1_dat5, input, X)," &
"498 (bc_1, *, control, 1)," &
"499 (bc_1, mmc1_dat6, output3, X, 498, 1, Z)," &
"500 (bc_1, mmc1_dat6, input, X)," &
"501 (bc_1, *, control, 1)," &
"502 (bc_1, mmc1_dat7, output3, X, 501, 1, Z)," &
"503 (bc_1, mmc1_dat7, input, X)," &
"504 (bc_1, *, control, 1)," &
"505 (bc_1, mmc2_clk, output3, X, 504, 1, Z)," &
"506 (bc_1, mmc2_clk, input, X)," &
"507 (bc_1, *, control, 1)," &
"508 (bc_1, mmc2_cmd, output3, X, 507, 1, Z)," &
"509 (bc_1, mmc2_cmd, input, X)," &
"510 (bc_1, *, control, 1)," &
"511 (bc_1, mmc2_dat0, output3, X, 510, 1, Z)," &
"512 (bc_1, mmc2_dat0, input, X)," &
"513 (bc_1, *, control, 1)," &
"514 (bc_1, mmc2_dat1, output3, X, 513, 1, Z)," &
"515 (bc_1, mmc2_dat1, input, X)," &
"516 (bc_1, *, control, 1)," &
"517 (bc_1, mmc2_dat2, output3, X, 516, 1, Z)," &
"518 (bc_1, mmc2_dat2, input, X)," &
"519 (bc_1, *, control, 1)," &
"520 (bc_1, mmc2_dat3, output3, X, 519, 1, Z)," &
"521 (bc_1, mmc2_dat3, input, X)," &
"522 (bc_1, *, control, 1)," &
"523 (bc_1, mmc2_dat4, output3, X, 522, 1, Z)," &
"524 (bc_1, mmc2_dat4, input, X)," &
"525 (bc_1, *, control, 1)," &
"526 (bc_1, mmc2_dat5, output3, X, 525, 1, Z)," &
"527 (bc_1, mmc2_dat5, input, X)," &
"528 (bc_1, *, control, 1)," &
"529 (bc_1, mmc2_dat6, output3, X, 528, 1, Z)," &
"530 (bc_1, mmc2_dat6, input, X)," &
"531 (bc_1, *, control, 1)," &
"532 (bc_1, mmc2_dat7, output3, X, 531, 1, Z)," &
"533 (bc_1, mmc2_dat7, input, X)," &
"534 (bc_1, *, control, 1)," &
"535 (bc_1, mcspi1_clk, output3, X, 534, 1, Z)," &
"536 (bc_1, mcspi1_clk, input, X)," &
"537 (bc_1, *, control, 1)," &
"538 (bc_1, mcspi1_simo, output3, X, 537, 1, Z)," &
"539 (bc_1, mcspi1_simo, input, X)," &
"540 (bc_1, *, control, 1)," &
"541 (bc_1, mcspi1_somi, output3, X, 540, 1, Z)," &
"542 (bc_1, mcspi1_somi, input, X)," &
"543 (bc_1, *, control, 1)," &
"544 (bc_1, mcspi1_cs0, output3, X, 543, 1, Z)," &
"545 (bc_1, mcspi1_cs0, input, X)," &
"546 (bc_1, *, control, 1)," &
"547 (bc_1, mcspi1_cs1, output3, X, 546, 1, Z)," &
"548 (bc_1, mcspi1_cs1, input, X)," &
"549 (bc_1, *, control, 1)," &
"550 (bc_1, mcspi1_cs2, output3, X, 549, 1, Z)," &
"551 (bc_1, mcspi1_cs2, input, X)," &
"552 (bc_1, *, control, 1)," &
"553 (bc_1, mcspi1_cs3, output3, X, 552, 1, Z)," &
"554 (bc_1, mcspi1_cs3, input, X)," &
"555 (bc_1, *, control, 1)," &
"556 (bc_1, mcspi2_clk, output3, X, 555, 1, Z)," &
"557 (bc_1, mcspi2_clk, input, X)," &
"558 (bc_1, *, control, 1)," &
"559 (bc_1, mcspi2_simo, output3, X, 558, 1, Z)," &
"560 (bc_1, mcspi2_simo, input, X)," &
"561 (bc_1, *, control, 1)," &
"562 (bc_1, mcspi2_somi, output3, X, 561, 1, Z)," &
"563 (bc_1, mcspi2_somi, input, X)," &
"564 (bc_1, *, control, 1)," &
"565 (bc_1, mcspi2_cs0, output3, X, 564, 1, Z)," &
"566 (bc_1, mcspi2_cs0, input, X)," &
"567 (bc_1, *, control, 1)," &
"568 (bc_1, mcspi2_cs1, output3, X, 567, 1, Z)," &
"569 (bc_1, mcspi2_cs1, input, X)," &
"570 (bc_1, *, control, 1)," &
"571 (bc_1, etk_clk, output3, X, 570, 1, Z)," &
"572 (bc_1, etk_clk, input, X)," &
"573 (bc_1, *, control, 1)," &
"574 (bc_1, etk_ctl, output3, X, 573, 1, Z)," &
"575 (bc_1, etk_ctl, input, X)," &
"576 (bc_1, *, control, 1)," &
"577 (bc_1, etk_d0, output3, X, 576, 1, Z)," &
"578 (bc_1, etk_d0, input, X)," &
"579 (bc_1, *, control, 1)," &
"580 (bc_1, etk_d1, output3, X, 579, 1, Z)," &
"581 (bc_1, etk_d1, input, X)," &
"582 (bc_1, *, control, 1)," &
"583 (bc_1, etk_d2, output3, X, 582, 1, Z)," &
"584 (bc_1, etk_d2, input, X)," &
"585 (bc_1, *, control, 1)," &
"586 (bc_1, etk_d3, output3, X, 585, 1, Z)," &
"587 (bc_1, etk_d3, input, X)," &
"588 (bc_1, *, control, 1)," &
"589 (bc_1, etk_d4, output3, X, 588, 1, Z)," &
"590 (bc_1, etk_d4, input, X)," &
"591 (bc_1, *, control, 1)," &
"592 (bc_1, etk_d5, output3, X, 591, 1, Z)," &
"593 (bc_1, etk_d5, input, X)," &
"594 (bc_1, *, control, 1)," &
"595 (bc_1, etk_d6, output3, X, 594, 1, Z)," &
"596 (bc_1, etk_d6, input, X)," &
"597 (bc_1, *, control, 1)," &
"598 (bc_1, etk_d7, output3, X, 597, 1, Z)," &
"599 (bc_1, etk_d7, input, X)," &
"600 (bc_1, *, control, 1)," &
"601 (bc_1, etk_d8, output3, X, 600, 1, Z)," &
"602 (bc_1, etk_d8, input, X)," &
"603 (bc_1, *, control, 1)," &
"604 (bc_1, etk_d9, output3, X, 603, 1, Z)," &
"605 (bc_1, etk_d9, input, X)," &
"606 (bc_1, *, control, 1)," &
"607 (bc_1, etk_d10, output3, X, 606, 1, Z)," &
"608 (bc_1, etk_d10, input, X)," &
"609 (bc_1, *, control, 1)," &
"610 (bc_1, etk_d11, output3, X, 609, 1, Z)," &
"611 (bc_1, etk_d11, input, X)," &
"612 (bc_1, *, control, 1)," &
"613 (bc_1, etk_d12, output3, X, 612, 1, Z)," &
"614 (bc_1, etk_d12, input, X)," &
"615 (bc_1, *, control, 1)," &
"616 (bc_1, etk_d13, output3, X, 615, 1, Z)," &
"617 (bc_1, etk_d13, input, X)," &
"618 (bc_1, *, control, 1)," &
"619 (bc_1, etk_d14, output3, X, 618, 1, Z)," &
"620 (bc_1, etk_d14, input, X)," &
"621 (bc_1, *, control, 1)," &
"622 (bc_1, etk_d15, output3, X, 621, 1, Z)," &
"623 (bc_1, etk_d15, input, X)," &
"624 (bc_1, *, control, 1)," &
"625 (bc_1, uart1_tx, output3, X, 624, 1, Z)," &
"626 (bc_1, uart1_tx, input, X)," &
"627 (bc_1, *, control, 1)," &
"628 (bc_1, uart1_rts, output3, X, 627, 1, Z)," &
"629 (bc_1, uart1_rts, input, X)," &
"630 (bc_1, *, control, 1)," &
"631 (bc_1, uart1_cts, output3, X, 630, 1, Z)," &
"632 (bc_1, uart1_cts, input, X)," &
"633 (bc_1, *, control, 1)," &
"634 (bc_1, uart1_rx, output3, X, 633, 1, Z)," &
"635 (bc_1, uart1_rx, input, X)," &
"636 (bc_1, *, control, 1)," &
"637 (bc_1, dss_pclk, output3, X, 636, 1, Z)," &
"638 (bc_1, dss_pclk, input, X)," &
"639 (bc_1, *, control, 1)," &
"640 (bc_1, dss_hsync, output3, X, 639, 1, Z)," &
"641 (bc_1, dss_hsync, input, X)," &
"642 (bc_1, *, control, 1)," &
"643 (bc_1, dss_vsync, output3, X, 642, 1, Z)," &
"644 (bc_1, dss_vsync, input, X)," &
"645 (bc_1, *, control, 1)," &
"646 (bc_1, dss_acbias, output3, X, 645, 1, Z)," &
"647 (bc_1, dss_acbias, input, X)," &
"648 (bc_1, *, control, 1)," &
"649 (bc_1, dss_data0, output3, X, 648, 1, Z)," &
"650 (bc_1, dss_data0, input, X)," &
"651 (bc_1, *, control, 1)," &
"652 (bc_1, dss_data1, output3, X, 651, 1, Z)," &
"653 (bc_1, dss_data1, input, X)," &
"654 (bc_1, *, control, 1)," &
"655 (bc_1, dss_data2, output3, X, 654, 1, Z)," &
"656 (bc_1, dss_data2, input, X)," &
"657 (bc_1, *, control, 1)," &
"658 (bc_1, dss_data3, output3, X, 657, 1, Z)," &
"659 (bc_1, dss_data3, input, X)," &
"660 (bc_1, *, control, 1)," &
"661 (bc_1, dss_data4, output3, X, 660, 1, Z)," &
"662 (bc_1, dss_data4, input, X)," &
"663 (bc_1, *, control, 1)," &
"664 (bc_1, dss_data5, output3, X, 663, 1, Z)," &
"665 (bc_1, dss_data5, input, X)," &
"666 (bc_1, *, control, 1)," &
"667 (bc_1, dss_data6, output3, X, 666, 1, Z)," &
"668 (bc_1, dss_data6, input, X)," &
"669 (bc_1, *, control, 1)," &
"670 (bc_1, dss_data7, output3, X, 669, 1, Z)," &
"671 (bc_1, dss_data7, input, X)," &
"672 (bc_1, *, control, 1)," &
"673 (bc_1, dss_data8, output3, X, 672, 1, Z)," &
"674 (bc_1, dss_data8, input, X)," &
"675 (bc_1, *, control, 1)," &
"676 (bc_1, dss_data9, output3, X, 675, 1, Z)," &
"677 (bc_1, dss_data9, input, X)," &
"678 (bc_1, *, control, 1)," &
"679 (bc_1, dss_data10, output3, X, 678, 1, Z)," &
"680 (bc_1, dss_data10, input, X)," &
"681 (bc_1, *, control, 1)," &
"682 (bc_1, dss_data11, output3, X, 681, 1, Z)," &
"683 (bc_1, dss_data11, input, X)," &
"684 (bc_1, *, control, 1)," &
"685 (bc_1, dss_data12, output3, X, 684, 1, Z)," &
"686 (bc_1, dss_data12, input, X)," &
"687 (bc_1, *, control, 1)," &
"688 (bc_1, dss_data13, output3, X, 687, 1, Z)," &
"689 (bc_1, dss_data13, input, X)," &
"690 (bc_1, *, control, 1)," &
"691 (bc_1, dss_data14, output3, X, 690, 1, Z)," &
"692 (bc_1, dss_data14, input, X)," &
"693 (bc_1, *, control, 1)," &
"694 (bc_1, dss_data15, output3, X, 693, 1, Z)," &
"695 (bc_1, dss_data15, input, X)," &
"696 (bc_1, *, control, 1)," &
"697 (bc_1, dss_data16, output3, X, 696, 1, Z)," &
"698 (bc_1, dss_data16, input, X)," &
"699 (bc_1, *, control, 1)," &
"700 (bc_1, dss_data17, output3, X, 699, 1, Z)," &
"701 (bc_1, dss_data17, input, X)," &
"702 (bc_1, *, control, 1)," &
"703 (bc_1, dss_data18, output3, X, 702, 1, Z)," &
"704 (bc_1, dss_data18, input, X)," &
"705 (bc_1, *, control, 1)," &
"706 (bc_1, dss_data19, output3, X, 705, 1, Z)," &
"707 (bc_1, dss_data19, input, X)," &
"708 (bc_1, *, control, 1)," &
"709 (bc_1, dss_data20, output3, X, 708, 1, Z)," &
"710 (bc_1, dss_data20, input, X)," &
"711 (bc_1, *, control, 1)," &
"712 (bc_1, dss_data21, output3, X, 711, 1, Z)," &
"713 (bc_1, dss_data21, input, X)," &
"714 (bc_1, *, control, 1)," &
"715 (bc_1, dss_data22, output3, X, 714, 1, Z)," &
"716 (bc_1, dss_data22, input, X)," &
"717 (bc_1, *, control, 1)," &
"718 (bc_1, dss_data23, output3, X, 717, 1, Z)," &
"719 (bc_1, dss_data23, input, X)," &
"720 (bc_1, *, control, 1)," &
"721 (bc_1, mcbsp1_clkr, output3, X, 720, 1, Z)," &
"722 (bc_1, mcbsp1_clkr, input, X)," &
"723 (bc_1, *, control, 1)," &
"724 (bc_1, mcbsp1_fsr, output3, X, 723, 1, Z)," &
"725 (bc_1, mcbsp1_fsr, input, X)," &
"726 (bc_1, *, control, 1)," &
"727 (bc_1, mcbsp1_dx, output3, X, 726, 1, Z)," &
"728 (bc_1, mcbsp1_dx, input, X)," &
"729 (bc_1, *, control, 1)," &
"730 (bc_1, mcbsp1_dr, output3, X, 729, 1, Z)," &
"731 (bc_1, mcbsp1_dr, input, X)," &
"732 (bc_1, *, control, 1)," &
"733 (bc_1, mcbsp1_fsx, output3, X, 732, 1, Z)," &
"734 (bc_1, mcbsp1_fsx, input, X)," &
"735 (bc_1, *, control, 1)," &
"736 (bc_1, mcbsp_clks, output3, X, 735, 1, Z)," &
"737 (bc_1, mcbsp_clks, input, X)," &
"738 (bc_1, *, control, 1)," &
"739 (bc_1, mcbsp1_clkx, output3, X, 738, 1, Z)," &
"740 (bc_1, mcbsp1_clkx, input, X)," &
"741 (bc_1, *, control, 1)," &
"742 (bc_1, sys_clkout2, output3, X, 741, 1, Z)," &
"743 (bc_1, sys_clkout2, input, X)," &
"744 (bc_1, *, control, 1)," &
"745 (bc_1, hdq_sio, output3, X, 744, 1, Z)," &
"746 (bc_1, hdq_sio, input, X)," &
"747 (bc_1, *, control, 1)," &
"748 (bc_1, usb0_drvvbus, output3, X, 747, 1, Z)," &
"749 (bc_1, usb0_drvvbus, input, X)," &
"750 (bc_1, *, control, 1)," &
"751 (bc_1, uart2_cts, output3, X, 750, 1, Z)," &
"752 (bc_1, uart2_cts, input, X)," &
"753 (bc_1, *, control, 1)," &
"754 (bc_1, uart2_rts, output3, X, 753, 1, Z)," &
"755 (bc_1, uart2_rts, input, X)," &
"756 (bc_1, *, control, 1)," &
"757 (bc_1, uart2_tx, output3, X, 756, 1, Z)," &
"758 (bc_1, uart2_tx, input, X)," &
"759 (bc_1, *, control, 1)," &
"760 (bc_1, uart2_rx, output3, X, 759, 1, Z)," &
"761 (bc_1, uart2_rx, input, X)," &
"762 (bc_1, *, control, 1)," &
"763 (bc_1, mcbsp2_fsx, output3, X, 762, 1, Z)," &
"764 (bc_1, mcbsp2_fsx, input, X)," &
"765 (bc_1, *, control, 1)," &
"766 (bc_1, mcbsp2_clkx, output3, X, 765, 1, Z)," &
"767 (bc_1, mcbsp2_clkx, input, X)," &
"768 (bc_1, *, control, 1)," &
"769 (bc_1, mcbsp2_dr, output3, X, 768, 1, Z)," &
"770 (bc_1, mcbsp2_dr, input, X)," &
"771 (bc_1, *, control, 1)," &
"772 (bc_1, mcbsp2_dx, output3, X, 771, 1, Z)," &
"773 (bc_1, mcbsp2_dx, input, X)," &
"774 (bc_1, *, control, 1)," &
"775 (bc_1, mcbsp3_dx, output3, X, 774, 1, Z)," &
"776 (bc_1, mcbsp3_dx, input, X)," &
"777 (bc_1, *, control, 1)," &
"778 (bc_1, mcbsp3_dr, output3, X, 777, 1, Z)," &
"779 (bc_1, mcbsp3_dr, input, X)," &
"780 (bc_1, *, control, 1)," &
"781 (bc_1, mcbsp3_clkx, output3, X, 780, 1, Z)," &
"782 (bc_1, mcbsp3_clkx, input, X)," &
"783 (bc_1, *, control, 1)," &
"784 (bc_1, mcbsp3_fsx, output3, X, 783, 1, Z)," &
"785 (bc_1, mcbsp3_fsx, input, X)," &
"786 (bc_1, *, control, 1)," &
"787 (bc_1, mcbsp4_clkx, output3, X, 786, 1, Z)," &
"788 (bc_1, mcbsp4_clkx, input, X)," &
"789 (bc_1, *, control, 1)," &
"790 (bc_1, mcbsp4_dr, output3, X, 789, 1, Z)," &
"791 (bc_1, mcbsp4_dr, input, X)," &
"792 (bc_1, *, control, 1)," &
"793 (bc_1, mcbsp4_dx, output3, X, 792, 1, Z)," &
"794 (bc_1, mcbsp4_dx, input, X)," &
"795 (bc_1, *, control, 1)," &
"796 (bc_1, mcbsp4_fsx, output3, X, 795, 1, Z)," &
"797 (bc_1, mcbsp4_fsx, input, X)," &
"798 (bc_1, *, control, 1)," &
"799 (bc_1, sys_clkout1, output3, X, 798, 1, Z)," &
"800 (bc_1, sys_clkout1, input, X)," &
"801 (bc_1, *, control, 1)," &
"802 (bc_1, sys_clkreq, output3, X, 801, 1, Z)," &
"803 (bc_1, sys_clkreq, input, X)," &
"804 (bc_1, i2c4_sda, output2, 1, 804, 1, weak1)," &
"805 (bc_1, *, internal,0)," &
"806 (bc_1, i2c4_sda, input, X)," &
"807 (bc_1, i2c4_scl, output2, 1, 807, 1, weak1)," &
"808 (bc_1, *, internal,0)," &
"809 (bc_1, i2c4_scl, input, X)," &
"810 (bc_1, *, internal, 1)," &
"811 (bc_1, *, control, 1)," &
"812 (bc_1, sys_boot0, output3, X, 811, 1, Z)," &
"813 (bc_1, sys_boot0, input, X)," &
"814 (bc_1, *, control, 1)," &
"815 (bc_1, sys_boot1, output3, X, 814, 1, Z)," &
"816 (bc_1, sys_boot1, input, X)," &
"817 (bc_1, *, control, 1)," &
"818 (bc_1, sys_boot2, output3, X, 817, 1, Z)," &
"819 (bc_1, sys_boot2, input, X)," &
"820 (bc_1, *, control, 1)," &
"821 (bc_1, sys_boot3, output3, X, 820, 1, Z)," &
"822 (bc_1, sys_boot3, input, X)," &
"823 (bc_1, *, control, 1)," &
"824 (bc_1, sys_boot4, output3, X, 823, 1, Z)," &
"825 (bc_1, sys_boot4, input, X)," &
"826 (bc_1, *, control, 1)," &
"827 (bc_1, sys_boot5, output3, X, 826, 1, Z)," &
"828 (bc_1, sys_boot5, input, X)," &
"829 (bc_1, *, control, 1)," &
"830 (bc_1, sys_boot6, output3, X, 829, 1, Z)," &
"831 (bc_1, sys_boot6, input, X)," &
"832 (bc_1, *, internal, 1)," &
"833 (bc_1, *, internal, 1)," &
"834 (bc_1, *, internal, 1)";
end AM35x_BGA_491_ZCN ;
