--//*****************************************************************************
--//
--// tm4c1233c3pm_ra0_lqfp_v0p1.bsdl - Boundary Scan Description Language (BSDL)
--// file for the Texas Instruments TM4C1233C3PM Stellaris
--// microcontroller.
--//
--// Version 0.1 - 02/22/2013 - Preliminary Release of BSDL entity
--// - TM4C1233C3PM, Revision A0, 64-ball LQFP
--//
--//
--// Copyright (c) 2013 Texas Instruments, Inc. All rights reserved.
--//
--// Software License Agreement
--//
--// Texas Instruments, Inc. (TI) is supplying this software for use solely and
--// exclusively on TI's Stellaris Family of microcontroller products.
--//
--// The software is owned by TI and/or its suppliers, and is protected under
--// applicable copyright laws. All rights are reserved. Any use in violation
--// of the foregoing restrictions may subject the user to criminal sanctions
--// under applicable laws, as well as to civil liability for the breach of the
--// terms and conditions of this license.
--//
--// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS,
--// IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES
--// OF THE MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS
--// SOFTWARE. TI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
--// INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
--//
--//*****************************************************************************
entity TM4C1233C3PM is generic(PHYSICAL_PIN_MAP : string := "LQFP_64");
port ( GND: linkage bit_vector(0 to 3);
GNDA: linkage bit;
GNDX: linkage bit;
HIB: linkage bit;
OSC0: linkage bit;
OSC1: linkage bit;
PA0_U0Rx: inout bit;
PA1_U0Tx: inout bit;
PA2_SSI0Clk: inout bit;
PA3_SSI0Fss: inout bit;
PA4_SSI0Rx: inout bit;
PA5_SSI0Tx: inout bit;
PA6: inout bit;
PA7: inout bit;
PB0: inout bit;
PB1: inout bit;
PB2_I2C0SCL: inout bit;
PB3_I2C0SDA: inout bit;
PB4: inout bit;
PB5: inout bit;
PB6: inout bit;
PB7: inout bit;
PC4: inout bit;
PC5: inout bit;
PC6: inout bit;
PC7: inout bit;
PD0: inout bit;
PD1: inout bit;
PD2: inout bit;
PD3: inout bit;
PD4: inout bit;
PD5: inout bit;
PD6: inout bit;
PD7: inout bit;
PE0: inout bit;
PE1: inout bit;
PE2: inout bit;
PE3: inout bit;
PE4: inout bit;
PE5: inout bit;
PF0: inout bit;
PF1: inout bit;
PF2: inout bit;
PF3: inout bit;
PF4: inout bit;
RST: linkage bit;
TCK: in bit;
TDI: in bit;
TDO: out bit;
TMS: in bit;
VBAT: linkage bit;
VDD: linkage bit_vector(0 to 3);
VDDA: linkage bit;
VDDC: linkage bit_vector(0 to 1);
WAKE: linkage bit;
XOSC0: linkage bit;
XOSC1: linkage bit
);
use STD_1149_1_2001.all; -- Get IEEE 1149.1-2001 attributes and definitions
attribute COMPONENT_CONFORMANCE of TM4C1233C3PM : entity is "STD_1149_1_2001";
attribute PIN_MAP of TM4C1233C3PM : entity is PHYSICAL_PIN_MAP;
constant LQFP_64 : PIN_MAP_STRING :=
"PB6: 1, " &
"VDDA: 2, " &
"GNDA: 3, " &
"PB7: 4, " &
"PF4: 5, " &
"PE3: 6, " &
"PE2: 7, " &
"PE1: 8, " &
"PE0: 9, " &
"PD7: 10, " &
"PC7: 13, " &
"PC6: 14, " &
"PC5: 15, " &
"PC4: 16, " &
"PA0_U0Rx: 17, " &
"PA1_U0Tx: 18, " &
"PA2_SSI0Clk: 19, " &
"PA3_SSI0Fss: 20, " &
"PA4_SSI0Rx: 21, " &
"PA5_SSI0Tx: 22, " &
"PA6: 23, " &
"PA7: 24, " &
"PF0: 28, " &
"PF1: 29, " &
"PF2: 30, " &
"PF3: 31, " &
"WAKE: 32, " &
"HIB: 33, " &
"XOSC0: 34, " &
"GNDX: 35, " &
"XOSC1: 36, " &
"VBAT: 37, " &
"RST: 38, " &
"OSC0: 40, " &
"OSC1: 41, " &
"PD4: 43, " &
"PD5: 44, " &
"PB0: 45, " &
"PB1: 46, " &
"PB2_I2C0SCL: 47, " &
"PB3_I2C0SDA: 48, " &
"TDO: 49, " &
"TDI: 50, " &
"TMS: 51, " &
"TCK: 52, " &
"PD6: 53, " &
"PB5: 57, " &
"PB4: 58, " &
"PE4: 59, " &
"PE5: 60, " &
"PD0: 61, " &
"PD1: 62, " &
"PD2: 63, " &
"PD3: 64, " &
"GND: ( 12, 27, 39, 55 ), " &
"VDD: ( 11, 26, 42, 54 ), " &
"VDDC: ( 25, 56 ) " ;
attribute TAP_SCAN_CLOCK of TCK : signal is (10.00e+06, BOTH);
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute INSTRUCTION_LENGTH of TM4C1233C3PM : entity is 4;
attribute INSTRUCTION_OPCODE of TM4C1233C3PM : entity is
"EXTEST (0000), " &
"SAMPLE (0010), " &
"PRELOAD (0010), " &
"ABORT (1000), " &
"DPACC (1010), " &
"APACC (1011), " &
"IDCODE (1110), " &
"BYPASS (1111) " ;
attribute INSTRUCTION_CAPTURE of TM4C1233C3PM : entity is "0001";
attribute IDCODE_REGISTER of TM4C1233C3PM : entity is
"0100" & -- Version (Fifth Revision)
"1011101000000000" & -- Part number (ARM Cortex M4)
"01000111011" & -- Manufacturer Identity (ARM)
"1"; -- Mandatory LSB
-- IDCODE = 4BA00477
attribute INSTRUCTION_PRIVATE of TM4C1233C3PM : entity is
"ABORT, DPACC, APACC"; -- ARM Debug Access Port Instructions
attribute REGISTER_ACCESS of TM4C1233C3PM : entity is
"BOUNDARY (EXTEST, SAMPLE, PRELOAD), " &
"DEVICE_ID (IDCODE), " &
"BYPASS (BYPASS) " ;
attribute BOUNDARY_LENGTH of TM4C1233C3PM : entity is 121;
attribute BOUNDARY_REGISTER of TM4C1233C3PM : entity is
-- num cell port function safe [ ccell disval rslt ]
-- --- ---- -------------- -------- ---- ------ ------ ------
" 0 (BC_1, *, CONTROL, 1 ), " &
" 1 (BC_1, PD3, OUTPUT3, X , 0, 1, Z ), " &
" 2 (BC_1, PD3, INPUT, X ), " &
" 3 (BC_1, *, CONTROL, 1 ), " &
" 4 (BC_1, PD2, OUTPUT3, X , 3, 1, Z ), " &
" 5 (BC_1, PD2, INPUT, X ), " &
" 6 (BC_1, *, CONTROL, 1 ), " &
" 7 (BC_1, PD1, OUTPUT3, X , 6, 1, Z ), " &
" 8 (BC_1, PD1, INPUT, X ), " &
" 9 (BC_1, *, CONTROL, 1 ), " &
" 10 (BC_1, PD0, OUTPUT3, X , 9, 1, Z ), " &
" 11 (BC_1, PD0, INPUT, X ), " &
" 12 (BC_1, *, CONTROL, 1 ), " &
" 13 (BC_1, PE5, OUTPUT3, X , 12, 1, Z ), " &
" 14 (BC_1, PE5, INPUT, X ), " &
" 15 (BC_1, *, CONTROL, 1 ), " &
" 16 (BC_1, PE4, OUTPUT3, X , 15, 1, Z ), " &
" 17 (BC_1, PE4, INPUT, X ), " &
" 18 (BC_1, *, CONTROL, 1 ), " &
" 19 (BC_1, PB4, OUTPUT3, X , 18, 1, Z ), " &
" 20 (BC_1, PB4, INPUT, X ), " &
" 21 (BC_1, *, CONTROL, 1 ), " &
" 22 (BC_1, PB5, OUTPUT3, X , 21, 1, Z ), " &
" 23 (BC_1, PB5, INPUT, X ), " &
" 24 (BC_1, *, CONTROL, 1 ), " &
" 25 (BC_1, PD6, OUTPUT3, X , 24, 1, Z ), " &
" 26 (BC_1, PD6, INPUT, X ), " &
" 27 (BC_1, *, CONTROL, 1 ), " &
" 28 (BC_1, PB3_I2C0SDA, OUTPUT3, X , 27, 1, Z ), " &
" 29 (BC_1, PB3_I2C0SDA, INPUT, X ), " &
" 30 (BC_1, *, CONTROL, 1 ), " &
" 31 (BC_1, PB2_I2C0SCL, OUTPUT3, X , 30, 1, Z ), " &
" 32 (BC_1, PB2_I2C0SCL, INPUT, X ), " &
" 33 (BC_1, *, CONTROL, 1 ), " &
" 34 (BC_1, PB1, OUTPUT3, X , 33, 1, Z ), " &
" 35 (BC_1, PB1, INPUT, X ), " &
" 36 (BC_1, *, CONTROL, 1 ), " &
" 37 (BC_1, PB0, OUTPUT3, X , 36, 1, Z ), " &
" 38 (BC_1, PB0, INPUT, X ), " &
" 39 (BC_1, *, CONTROL, 1 ), " &
" 40 (BC_1, PD5, OUTPUT3, X , 39, 1, Z ), " &
" 41 (BC_1, PD5, INPUT, X ), " &
" 42 (BC_1, *, CONTROL, 1 ), " &
" 43 (BC_1, PD4, OUTPUT3, X , 42, 1, Z ), " &
" 44 (BC_1, PD4, INPUT, X ), " &
" 45 (BC_4, *, INTERNAL, 0 ), " &
" 46 (BC_4, *, INTERNAL, 0 ), " &
" 47 (BC_4, *, INTERNAL, 0 ), " &
" 48 (BC_4, *, INTERNAL, 0 ), " &
" 49 (BC_1, *, CONTROL, 1 ), " &
" 50 (BC_1, PF3, OUTPUT3, X , 49, 1, Z ), " &
" 51 (BC_1, PF3, INPUT, X ), " &
" 52 (BC_1, *, CONTROL, 1 ), " &
" 53 (BC_1, PF2, OUTPUT3, X , 52, 1, Z ), " &
" 54 (BC_1, PF2, INPUT, X ), " &
" 55 (BC_1, *, CONTROL, 1 ), " &
" 56 (BC_1, PF1, OUTPUT3, X , 55, 1, Z ), " &
" 57 (BC_1, PF1, INPUT, X ), " &
" 58 (BC_1, *, CONTROL, 1 ), " &
" 59 (BC_1, PF0, OUTPUT3, X , 58, 1, Z ), " &
" 60 (BC_1, PF0, INPUT, X ), " &
" 61 (BC_1, *, CONTROL, 1 ), " &
" 62 (BC_1, PA7, OUTPUT3, X , 61, 1, Z ), " &
" 63 (BC_1, PA7, INPUT, X ), " &
" 64 (BC_1, *, CONTROL, 1 ), " &
" 65 (BC_1, PA6, OUTPUT3, X , 64, 1, Z ), " &
" 66 (BC_1, PA6, INPUT, X ), " &
" 67 (BC_1, *, CONTROL, 1 ), " &
" 68 (BC_1, PA5_SSI0Tx, OUTPUT3, X , 67, 1, Z ), " &
" 69 (BC_1, PA5_SSI0Tx, INPUT, X ), " &
" 70 (BC_1, *, CONTROL, 1 ), " &
" 71 (BC_1, PA4_SSI0Rx, OUTPUT3, X , 70, 1, Z ), " &
" 72 (BC_1, PA4_SSI0Rx, INPUT, X ), " &
" 73 (BC_1, *, CONTROL, 1 ), " &
" 74 (BC_1, PA3_SSI0Fss, OUTPUT3, X , 73, 1, Z ), " &
" 75 (BC_1, PA3_SSI0Fss, INPUT, X ), " &
" 76 (BC_1, *, CONTROL, 1 ), " &
" 77 (BC_1, PA2_SSI0Clk, OUTPUT3, X , 76, 1, Z ), " &
" 78 (BC_1, PA2_SSI0Clk, INPUT, X ), " &
" 79 (BC_1, *, CONTROL, 1 ), " &
" 80 (BC_1, PA1_U0Tx, OUTPUT3, X , 79, 1, Z ), " &
" 81 (BC_1, PA1_U0Tx, INPUT, X ), " &
" 82 (BC_1, *, CONTROL, 1 ), " &
" 83 (BC_1, PA0_U0Rx, OUTPUT3, X , 82, 1, Z ), " &
" 84 (BC_1, PA0_U0Rx, INPUT, X ), " &
" 85 (BC_1, *, CONTROL, 1 ), " &
" 86 (BC_1, PC4, OUTPUT3, X , 85, 1, Z ), " &
" 87 (BC_1, PC4, INPUT, X ), " &
" 88 (BC_1, *, CONTROL, 1 ), " &
" 89 (BC_1, PC5, OUTPUT3, X , 88, 1, Z ), " &
" 90 (BC_1, PC5, INPUT, X ), " &
" 91 (BC_1, *, CONTROL, 1 ), " &
" 92 (BC_1, PC6, OUTPUT3, X , 91, 1, Z ), " &
" 93 (BC_1, PC6, INPUT, X ), " &
" 94 (BC_1, *, CONTROL, 1 ), " &
" 95 (BC_1, PC7, OUTPUT3, X , 94, 1, Z ), " &
" 96 (BC_1, PC7, INPUT, X ), " &
" 97 (BC_1, *, CONTROL, 1 ), " &
" 98 (BC_1, PD7, OUTPUT3, X , 97, 1, Z ), " &
" 99 (BC_1, PD7, INPUT, X ), " &
" 100 (BC_1, *, CONTROL, 1 ), " &
" 101 (BC_1, PE0, OUTPUT3, X , 100, 1, Z ), " &
" 102 (BC_1, PE0, INPUT, X ), " &
" 103 (BC_1, *, CONTROL, 1 ), " &
" 104 (BC_1, PE1, OUTPUT3, X , 103, 1, Z ), " &
" 105 (BC_1, PE1, INPUT, X ), " &
" 106 (BC_1, *, CONTROL, 1 ), " &
" 107 (BC_1, PE2, OUTPUT3, X , 106, 1, Z ), " &
" 108 (BC_1, PE2, INPUT, X ), " &
" 109 (BC_1, *, CONTROL, 1 ), " &
" 110 (BC_1, PE3, OUTPUT3, X , 109, 1, Z ), " &
" 111 (BC_1, PE3, INPUT, X ), " &
" 112 (BC_1, *, CONTROL, 1 ), " &
" 113 (BC_1, PF4, OUTPUT3, X , 112, 1, Z ), " &
" 114 (BC_1, PF4, INPUT, X ), " &
" 115 (BC_1, *, CONTROL, 1 ), " &
" 116 (BC_1, PB7, OUTPUT3, X , 115, 1, Z ), " &
" 117 (BC_1, PB7, INPUT, X ), " &
" 118 (BC_1, *, CONTROL, 1 ), " &
" 119 (BC_1, PB6, OUTPUT3, X , 118, 1, Z ), " &
" 120 (BC_1, PB6, INPUT, X ) ";
end TM4C1233C3PM;