-- ***************************************************************************
-- Dual-Core Intel(R) Xeon(R) Processor 5000 Series Core Boundary Scan Descriptor Language
-- (BSDL) Model, Version 2.0
--
--
--
--
-- ***************************************************************************
-- Information in this document is provided in connection with Intel products.
-- No license, express or implied, by estoppel or otherwise, to any
-- intellectual property rights is granted by this document. Except as
-- provided in Intel's Terms and Conditions of Sale for such products,
-- Intel assumes no liability whatsoever, and Intel disclaims any express or
-- implied warranty, relating to sale and/or use of Intel products including
-- liability or warranties relating to fitness for a particular purpose,
-- merchantability, or infringement of any patent, copyright or other
-- intellectual property right. Intel products are not intended for use in
-- medical, life saving, or life sustaining applications.
--
-- Intel may make changes to specifications and product descriptions at any
-- time, without notice.
--
-- The dual-core Intel(R) Xeon(R) processor 5000 series may contain design
-- defects or errors known as errata which may cause the product to deviate
-- from published specifications. Current characterized errata are available
-- on request.
--
-- Contact your local Intel sales office or your distributor to obtain the
-- latest specifications and before placing your product order.
--
-- Copyright (c) Intel Corporation 2006. Third-party brands and names are the
-- property of their respective owners.
-- ***************************************************************************
--
entity DualCoreXeon5000 is
generic(PHYSICAL_PIN_MAP : string := "DMP_FCLGA6");
port (
AB : inout bit_vector(35 downto 3); -- Address - address bus
A20MB : in bit; -- Compatibility - address 20 mask
ADSB : inout bit; -- Request - address strobe
ADSTBB : inout bit_vector(1 downto 0); -- Request - address bus strobe
APB : inout bit_vector(1 downto 0); -- Address - address parity
BCLK : in bit_vector(1 downto 0); -- Pwr/Clk - system bus clock
BINITB : inout bit; -- Error - bus initialization
BNRB : inout bit; -- Arbitration - block next request
BPMB : inout bit_vector(5 downto 0); -- Diagnostic - proformance monitoring break points
BPRIB : in bit; -- Arbitration - priority agent bus arbitration
BR0B : inout bit; -- Arbitration - symmetric agent bus arbitration
BR1B : in bit; -- Arbitration - symmetric agent bus arbitration
BSEL : out bit_vector(2 downto 0); -- Pwr/Clk - selects processor input clock frequency
COMP : in bit_vector(7 downto 0); -- Pwr/Clk - slew and impedence compensator
DB : inout bit_vector(63 downto 0); -- Data - data bus
DBIB : inout bit_vector(3 downto 0); -- Data - Dynamic data bus inversion
DBRB : out bit; -- Diagnostic - data bus reset for debug interposer
DBSYB : inout bit; -- Data - data bus busy
DEFERB : in bit; -- Snoop - defer signal
DPB : inout bit_vector(3 downto 0); -- Data - data bus parity on 16-bit granularity
DRDYB : inout bit; -- Data - data phase data ready
DSTBNB : inout bit_vector(3 downto 0); -- Data - data bus differential strobe
DSTBPB : inout bit_vector(3 downto 0); -- Data - data bus differential strobe
FERRB : out bit; -- Compatibility - floating point error, pending break event
FORCEPRB : in bit; -- Control - force TCC activation
GTLREF0 : linkage bit; -- Analog Pin - signal reference level for input pins
GTLREF1 : linkage bit; -- Analog Pin - signal reference level for input pins
GTLREF2 : linkage bit; -- Analog Pin - signal reference level for input pins
GTLREF3 : linkage bit; -- Analog Pin - signal reference level for input pins
HITB : inout bit; -- Snoop - snoop hit
HITMB : inout bit; -- Snoop - snoop hit modified
IERRB : out bit; -- Error - internal processor error
IGNNEB : in bit; -- Compatibility - ignore numuric errors
INITB : in bit; -- Exec Control - processor initialization
LINT0B : in bit; -- APIC - local APIC interrupt, INTR
LINT1B : in bit; -- APIC - local APIC interrupt, NMI
LLID : out bit_vector(1 downto 0); -- Control - loadline slope select
LOCKB : inout bit; -- Arbitration - locked transactions
MCERRB : inout bit; -- Error - Machine Check Error
MSID : out bit_vector(1 downto 0); -- Control - Market Segment ID
PROCHOTB : out bit; -- Pwr/Clk - thermal sensor
PWRGOOD : in bit; -- Pwr/Clk - system power good
REQB : inout bit_vector(4 downto 0); -- Request - request command
RESETB : in bit; -- Control - system reset
RSRVD : inout bit_vector(31 downto 0); -- Reserved
RSB : in bit_vector(2 downto 0); -- Response - response status
RSPB : in bit; -- Response - response status parity
SKTOCCB : out bit; -- Analog Pin - Socket Occupied
SMIB : in bit; -- Compatibility - system management interrupt
STPCLKB : in bit; -- Pwr/Clk - processor stop clock control
TCK : in bit; -- Diagnostic - tap clock
TDI : in bit; -- Diagnostic - tap data in
TDO : out bit; -- Diagnostic - tap data out
TESTBUS : linkage bit; -- Diagnostic - test bus
TESTHI : in bit_vector(11 downto 0); -- Reserved - TESTHI pins
THERMDA : linkage bit; -- Pwr/Clk - thermal diode anode
THERMDC : linkage bit; -- Pwr/Clk - thermal diode cathode
THERMDA2 : linkage bit; -- Pwr/Clk - thermal diode anode
THERMDC2 : linkage bit; -- Pwr/Clk - thermal diode cathode
THERMTRIPB : out bit; -- Pwr/Clk - thermal sensor
TMS : in bit; -- Diagnostic - tap mode select
TRDYB : in bit; -- Response - target ready
TRSTB : in bit; -- Diagnostic - tap reset
VCC : linkage bit_vector(222 downto 0); -- Power
VCCA : linkage bit; -- Pwr/Clk - power for PLLs
VCCIOPLL : linkage bit; -- Power - Analog Vcc for I/O PLL
VCC_SENSE : linkage bit; -- Diagnostic - VCC measurement
VCC_SENSE2 : linkage bit; -- Diagnostic - VCC measurement
VID : out bit_vector(5 downto 0); -- Pwr/Clk - power supply voltage selection
VIDSELECT : out bit; -- Analog pin - Select appropriate VID table
VSS : linkage bit_vector(270 downto 0); -- Power
VSS_SENSE : linkage bit; -- Diagnostic - ground measurement
VSS_SENSE2 : linkage bit; -- Diagnostic - ground measurement
VSSA : linkage bit; -- Pwr/Clk - power for internal PLLs
VTT : linkage bit_vector(21 downto 0); -- Power - I/O and Termination Supply
VTTOUT : linkage bit_vector(1 downto 0); -- Power - Local
VTTPWRGD : in bit -- Control - power supply voltage measurement
);
use STD_1149_1_1994.all;
use DualCoreXeon5000_PACKAGE.all;
attribute COMPONENT_CONFORMANCE of DualCoreXeon5000 : entity is "STD_1149_1_1993" ;
attribute PIN_MAP of DualCoreXeon5000 : entity is PHYSICAL_PIN_MAP;
constant DMP_FCLGA6 : PIN_MAP_STRING := -- Define PinOut
"AB : ( AJ6, AJ5, AH5, AH4, AG5, AG4, AG6, AF4," & -- 35 to 28
" AF5, AB4, AC5, AB5, AA5, AD6, AA4, Y4," & -- 27 to 20
" Y6, W6, AB6, W5, V4, V5, U4, U5," & -- 19 to 12
" T4, U6, T5, R4, M4, L4, L5, P6," & -- 11 to 4
" M5)," & -- 3
"A20MB : K3," &
"ADSB : D2," &
"ADSTBB : ( AD5, R6)," & -- 1 to 0
"APB : ( U3, U2)," & -- 1 to 0
"BCLK : ( G28,F28)," & -- 1 to 0
"BINITB : AD3," &
"BNRB : C2," &
"BPMB : ( AG3, AF2, AG2, AD2, AJ1, AJ2)," & -- 5 to 0
"BPRIB : G8," &
"BR0B : F3," &
"BR1B : H5," &
"BSEL : ( G30, H30, G29)," & -- 2 to 0
"COMP : ( AE3, Y3, T2, J2, R1, G2, T1, A13)," & -- 7 to 0
"DB : ( B22, A22, A19, B19, B21, C21, B18, A17," & -- 63 to 56
" B16, C18, B15, C14, C15, A14, D17, D20," & -- 55 to 48
" G22, D22, E22, G21, F21, E21, F20, E19," & -- 47 to 40
" E18, F18, F17, G17, G18, E16, E15, G16," & -- 39 to 32
" G15, F15, G14, F14, G13, E13, D13, F12," & -- 31 to 24
" F11, D10, E10, D7, E9, F9, F8, G9," & -- 23 to 16
" D11, C12, B12, D8, C11, B10, A11, A10," & -- 15 to 8
" A7, B7, B6, A5, C6, A4, C5, B4)," & -- 7 to 0
"DBIB : ( C20, D19, G11, A8)," & -- 3 to 0
"DBRB : AC2," &
"DBSYB : B2," &
"DEFERB : G7," &
"DPB : ( J17, H16, H15,J16)," & -- 3 to 0
"DRDYB : C1," &
"DSTBNB : ( A16, G20, G12, C8)," & -- 3 to 0
"DSTBPB : ( C17, G19, E12, B9)," & -- 3 to 0
"FERRB : R3," &
"FORCEPRB : AK6," &
"GTLREF0 : H1," &
"GTLREF1 : H2," &
"GTLREF2 : G10," &
"GTLREF3 : F2," &
"HITB : D4," &
"HITMB : E4," &
"IERRB : AB2," &
"IGNNEB : N2," &
"INITB : P3," &
"LINT0B : K1," &
"LINT1B : L1," &
"LLID : ( AA2, V2)," &
"LOCKB : C3," &
"MCERRB : AB3," &
"MSID : ( V1, W1)," &
"PROCHOTB : AL2," &
"PWRGOOD : N1," &
"REQB : ( J6, K6, M6, J5, K4)," & -- 4 to 0
"RSRVD : ( A20, AC4, AE4, AE6, AK3, AJ3, AM5, AN5," &
" AN6, B13, C9, D1, D14, D16, D23, E1," &
" E23, E24, E5, E6, E7, F23, F29, F6," &
" F27, G5, G6, J3, N4, N5, P5, W2," &
" Y1)," &
"RESETB : G23," &
"RSB : ( A3, F5, B3)," & -- 2 to 0
"RSPB : H4," &
"SKTOCCB : AE8," &
"SMIB : P2," &
"STPCLKB : M3," &
"TCK : AE1," &
"TDI : AD1," &
"TDO : AF1," &
"TESTBUS : AH2," &
"TESTHI : ( L2, P1, G4, G3, F24, G24, G26, G27," & -- 11 to 4
" G25, F25, W3, F26)," & -- 3 to 0
"THERMDA : AL1," &
"THERMDA2 : AJ7," &
"THERMDC : AK1," &
"THERMDC2 : AH7," &
"THERMTRIPB : M2," &
"TMS : AC1," &
"TRDYB : E3," &
"TRSTB : AG1," &
"VCCA : A23," &
"VCCIOPLL : C23," &
"VCC_SENSE : AN3," &
"VCC_SENSE2 : AL8," &
"VID : ( AL4, AK4, AL6, AM3, AL5, AM2)," & -- 5 to 0
"VIDSELECT : AN7," &
"VSS_SENSE : AN4," &
"VSS_SENSE2 : AL7," &
"VSSA : B23," &
"VTTOUT : ( AA1, J1)," &
"VTTPWRGD : AM6," &
"VCC : ( AA8, AB8,AC23,AC24,AC25,AC26,AC27,AC28," &
" AC29,AC30, AC8,AD23,AD24,AD25,AD26,AD27," &
" AD28,AD29,AD30, AD8,AE11,AE12,AE14,AE15," &
" AE18,AE19,AE21,AE22,AE23, AE9,AF11,AF12," &
" AF14,AF15,AF18,AF19,AF21,AF22, AF8, AF9," &
" AG11,AG12,AG14,AG15,AG18,AG19,AG21,AG22," &
" AG25,AG26,AG27,AG28,AG29,AG30, AG8, AG9," &
" AH11,AH12,AH14,AH15,AH18,AH19,AH21,AH22," &
" AH25,AH26,AH27,AH28,AH29,AH30, AH8, AH9," &
" AJ11,AJ12,AJ14,AJ15,AJ18,AJ19,AJ21,AJ22," &
" AJ25,AJ26, AJ8, AJ9,AK11,AK12,AK14,AK15," &
" AK18,AK19,AK21,AK22,AK25,AK26, AK8, AK9," &
" AL11,AL12,AL14,AL15,AL18,AL19,AL21,AL22," &
" AL25,AL26,AL29,AL30, AL9,AM11,AM12,AM14," &
" AM15,AM18,AM19,AM21,AM22,AM25,AM26,AM29," &
" AM30, AM8, AM9,AN11,AN12,AN14,AN15,AN18," &
" AN19,AN21,AN22,AN25,AN26, AN8, AN9, J10," &
" J11, J12, J13, J14, J15, J18, J19, J20," &
" J21, J22, J23, J24, J25, J26, J27, J28," &
" J29, J30, J8, J9, K23, K24, K25, K26," &
" K27, K28, K29, K30, K8, L8, M23, M24," &
" M25, M26, M27, M28, M29, M30, M8, N23," &
" N24, N25, N26, N27, N28, N29, N30, N8," &
" P8, R8, T23, T24, T25, T26, T27, T28," &
" T29, T30, T8, U23, U24, U25, U26, U27," &
" U28, U29, U30, U8, V8, W23, W24, W25," &
" W26, W27, W28, W29, W30, W8, Y23, Y24," &
" Y25, Y26, Y27, Y28, Y29, Y30, Y8), " &
"VSS : ( A12, A15, A18, A2, A21, A24, A6, A9," &
" AA23,AA24,AA25,AA26,AA27,AA28,AA29, AA3," &
" AA30, AA6, AA7, AB1,AB23,AB24,AB25,AB26," &
" AB27,AB28,AB29,AB30, AB7, AC3, AC6, AC7," &
" AD4, AD7,AE10,AE13,AE16,AE17, AE2,AE20," &
" AE24,AE25,AE26,AE27,AE28,AE29,AE30, AE5," &
" AE7,AF10,AF13,AF16,AF17,AF20,AF23,AF24," &
" AF25,AF26,AF27,AF28,AF29, AF3,AF30, AF6," &
" AF7,AG10,AG13,AG16,AG17,AG20,AG23,AG24," &
" AG7, AH1,AH10,AH13,AH16,AH17,AH20,AH23," &
" AH24, AH3, AH6,AJ10,AJ13,AJ16,AJ17,AJ20," &
" AJ23,AJ24,AJ27,AJ28,AJ29,AJ30, AJ4,AK10," &
" AK13,AK16,AK17, AK2,AK20,AK23,AK24,AK27," &
" AK28,AK29,AK30, AK5, AK7,AL10,AL13,AL16," &
" AL17,AL20,AL23,AL24,AL27,AL28, AL3, AM1," &
" AM10,AM13,AM16,AM17,AM20,AM23,AM24,AM27," &
" AM28, AM4, AM7, AN1,AN10,AN13,AN16,AN17," &
" AN2,AN20,AN23,AN24, B1, B11, B14, B17," &
" B20, B24, B5, B8, C10, C13, C16, C19," &
" C22, C24, C4, C7, D12, D15, D18, D21," &
" D24, D3, D5, D6, D9, E11, E14, E17," &
" E2, E20, E25, E26, E27, E28, E29, E8," &
" F1, F10, F13, F16, F19, F22, F4, F7," &
" G1, H10, H11, H12, H13, H14, H17, H18," &
" H19, H20, H21, H22, H23, H24, H25, H26," &
" H27, H28, H29, H3, H6, H7, H8, H9," &
" J4, J7, K2, K5, K7, L23, L24, L25," &
" L26, L27, L28, L29, L3, L30, L6, L7," &
" M1, M7, N3, N6, N7, P23, P24, P25," &
" P26, P27, P28, P29, P30, P4, P7, R2," &
" R23, R24, R25, R26, R27, R28, R29, R30," &
" R5, R7, T3, T6, T7, U1, U7, V23," &
" V24, V25, V26, V27, V28, V29, V3, V30," &
" V6, V7, W4, W7, Y2, Y5, Y7), " &
"VTT : ( A25, A26, B25, B26, B27, B28, B29, B30," &
" C25, C26, C27, C28, C29, C30, D25, D26," &
" D27, D28, D29, D30, E30, F30) " ;
--
-- Scan Port Identification
--
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_RESET of TRSTB : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (16.0e6, both);
attribute Instruction_Length of DualCoreXeon5000: entity is 7;
attribute Instruction_Opcode of DualCoreXeon5000: entity is
" EXTEST ( 0000000 ), " &
" SAMPLE ( 0000001 ), " &
" IDCODE ( 0000010 ), " &
" CLAMP ( 0000100 ), " &
" RUNBIST ( 0000111 ), " &
" HIGHZ ( 0001000 ), " &
" BYPASS ( 1111111 ), " &
" Reserved ( 0000011, 0000101, 0000110, 0001001, 0001010, " &
" 0001011, 0001100, 0001101, 0001110, 0001111, " &
" 0010000, 0010001, 0010010, 0010011, 0010100, " &
" 0010101, 0010110, 0010111, 0011000, 0011001, " &
" 0011010, 0011011, 0011100, 0011101, 0011110, " &
" 0011111, 0100000, 0100001, 0100010, 0100011, " &
" 0100100, 0100101, 0100110, 0100111, 0101000, " &
" 0101001, 0101010, 0101011, 0101100, 0101101, " &
" 0101110, 0101111, 0110000, 0110001, 0110010, " &
" 0110011, 0110100, 0110101, 0110110, 0110111, " &
" 0111000, 0111001, 0111010, 0111011, 0111100, " &
" 0111101, 0111110, 0111111, 1000000, 1000001, " &
" 1000010, 1000011, 1000100, 1000101, 1000110, " &
" 1000111, 1001000, 1001001, 1001100, 1111110, " &
" 1111101, 1111100, 1111011, 1111010, 1111001, " &
" 1111000, 1110111, 1001101, 1011110, 1011111, " &
" 1011000, 1010000, 1010001, 1010010, 1010011, " &
" 1010100, 1010101, 1010110, 1010111, 1011001, " &
" 1011010, 1011011, 1001011, 1001110, 1011100, " &
" 1011101, 1110110, 1100000, 1100001, 1100010, " &
" 1100011) " ;
attribute Instruction_Capture of DualCoreXeon5000: entity is "0000001";
attribute Instruction_Private of DualCoreXeon5000: entity is "Reserved";
--
-- DualCoreXeon5000 IDCODE Register
--
attribute Idcode_Register of DualCoreXeon5000: entity is
"0100" & --Version
"1000001100000111" & --Part number
"00000001001" & --Manufacturers identity
"1"; --Required by the 1149.1 standard
--
-- DualCoreXeon5000 Data Register Access
--
attribute Register_Access of DualCoreXeon5000: entity is
"BOUNDARY (EXTEST, SAMPLE), " &
"RUNBIST[1] (RUNBIST), " &
"DEVICE_ID (IDCODE), " &
"BYPASS (CLAMP, HIGHZ, BYPASS) " ;
--
-- DualCoreXeon5000 Boundary Scan cells
--
-- BS_4 : INPUT
-- BX_2 : OUTPUT2
-- BS_G : GTL BIDIR/CONTROL Combo cell
-- BY_3 : INTERNAL
--
-- DualCoreXeon5000 Boundary Register Description
-- Cell 0 is closest to TDO
--
attribute BOUNDARY_LENGTH of DualCoreXeon5000: entity is 166;
attribute BOUNDARY_REGISTER of DualCoreXeon5000: entity is
-- num cell port function safe [ccell disval rslt]
"0 (BS_4, LINT1B, input, X ),"&
"1 (BS_4, LINT0B, input, X ),"&
"2 (BS_4, BPRIB, input, X ),"&
"3 (BS_4, DEFERB, input, X ),"&
"4 (BS_G, HITMB, output2, 1, 4, 1, weak1 ),"&
"4 (BS_G, HITMB, input, 1 ),"&
"5 (BS_4, RSB(1), input, X ),"&
"6 (BS_G, HITB, output2, 1, 6, 1, weak1 ),"&
"6 (BS_G, HITB, input, 1 ),"&
"7 (BS_4, RSB(2), input, X ),"&
"8 (BS_4, RSB(0), input, X ),"&
"9 (BS_G, LOCKB, output2, 1, 9, 1, weak1 ),"&
"9 (BS_G, LOCKB, input, 1 ),"&
"10 (BS_G, BR0B, output2, 1, 10, 1, weak1 ),"&
"10 (BS_G, BR0B, input, 1 ),"&
"11 (BS_4, TRDYB, input, X ),"&
"12 (BS_G, ADSB, output2, 1, 12, 1, weak1 ),"&
"12 (BS_G, ADSB, input, 1 ),"&
"13 (BS_G, BNRB, output2, 1, 13, 1, weak1 ),"&
"13 (BS_G, BNRB, input, 1 ),"&
"14 (BS_G, DBSYB, output2, 1, 14, 1, weak1 ),"&
"14 (BS_G, DBSYB, input, 1 ),"&
"15 (BS_G, DRDYB, output2, 1, 15, 1, weak1 ),"&
"15 (BS_G, DRDYB, input, 1 ),"&
"16 (BS_G, REQB(4), output2, 1, 16, 1, weak1 ),"&
"16 (BS_G, REQB(4), input, 1 ),"&
"17 (BS_G, REQB(3), output2, 1, 17, 1, weak1 ),"&
"17 (BS_G, REQB(3), input, 1 ),"&
"18 (BS_G, REQB(2), output2, 1, 18, 1, weak1 ),"&
"18 (BS_G, REQB(2), input, 1 ),"&
"19 (BS_G, REQB(1), output2, 1, 19, 1, weak1 ),"&
"19 (BS_G, REQB(1), input, 1 ),"&
"20 (BS_G, REQB(0), output2, 1, 20, 1, weak1 ),"&
"20 (BS_G, REQB(0), input, 1 ),"&
"21 (BS_G, AB(3), output2, 1, 21, 1, weak1 ),"&
"21 (BS_G, AB(3), input, 1 ),"&
"22 (BS_G, AB(4), output2, 1, 22, 1, weak1 ),"&
"22 (BS_G, AB(4), input, 1 ),"&
"23 (BS_G, AB(5), output2, 1, 23, 1, weak1 ),"&
"23 (BS_G, AB(5), input, 1 ),"&
"24 (BS_G, AB(6), output2, 1, 24, 1, weak1 ),"&
"24 (BS_G, AB(6), input, 1 ),"&
"25 (BS_G, AB(7), output2, 1, 25, 1, weak1 ),"&
"25 (BS_G, AB(7), input, 1 ),"&
"26 (BY_3, *, internal, 1 ),"& -- A(36)
"27 (BS_G, ADSTBB(0), output2, 1, 27, 1, weak1 ),"&
"27 (BS_G, ADSTBB(0), input, 1 ),"&
"28 (BY_3, *, internal, 1 ),"& -- A(37)
"29 (BS_G, AB(8), output2, 1, 29, 1, weak1 ),"&
"29 (BS_G, AB(8), input, 1 ),"&
"30 (BS_G, AB(9), output2, 1, 30, 1, weak1 ),"&
"30 (BS_G, AB(9), input, 1 ),"&
"31 (BS_G, AB(10), output2, 1, 31, 1, weak1 ),"&
"31 (BS_G, AB(10), input, 1 ),"&
"32 (BS_G, AB(11), output2, 1, 32, 1, weak1 ),"&
"32 (BS_G, AB(11), input, 1 ),"&
"33 (BS_G, AB(12), output2, 1, 33, 1, weak1 ),"&
"33 (BS_G, AB(12), input, 1 ),"&
"34 (BS_G, AB(13), output2, 1, 34, 1, weak1 ),"&
"34 (BS_G, AB(13), input, 1 ),"&
"35 (BS_G, AB(14), output2, 1, 35, 1, weak1 ),"&
"35 (BS_G, AB(14), input, 1 ),"&
"36 (BS_G, AB(15), output2, 1, 36, 1, weak1 ),"&
"36 (BS_G, AB(15), input, 1 ),"&
"37 (BS_G, AB(16), output2, 1, 37, 1, weak1 ),"&
"37 (BS_G, AB(16), input, 1 ),"&
"38 (BS_G, AB(17), output2, 1, 38, 1, weak1 ),"&
"38 (BS_G, AB(17), input, 1 ),"&
"39 (BS_G, AB(18), output2, 1, 39, 1, weak1 ),"&
"39 (BS_G, AB(18), input, 1 ),"&
"40 (BS_G, AB(19), output2, 1, 40, 1, weak1 ),"&
"40 (BS_G, AB(19), input, 1 ),"&
"41 (BS_G, AB(20), output2, 1, 41, 1, weak1 ),"&
"41 (BS_G, AB(20), input, 1 ),"&
"42 (BS_G, AB(21), output2, 1, 42, 1, weak1 ),"&
"42 (BS_G, AB(21), input, 1 ),"&
"43 (BS_G, AB(22), output2, 1, 43, 1, weak1 ),"&
"43 (BS_G, AB(22), input, 1 ),"&
"44 (BS_G, AB(23), output2, 1, 44, 1, weak1 ),"&
"44 (BS_G, AB(23), input, 1 ),"&
"45 (BS_G, AB(24), output2, 1, 45, 1, weak1 ),"&
"45 (BS_G, AB(24), input, 1 ),"&
"46 (BS_G, AB(25), output2, 1, 46, 1, weak1 ),"&
"46 (BS_G, AB(25), input, 1 ),"&
"47 (BS_G, AB(26), output2, 1, 47, 1, weak1 ),"&
"47 (BS_G, AB(26), input, 1 ),"&
"48 (BY_3, *, internal, 1 ),"& -- A(39)
"49 (BS_G, ADSTBB(1), output2, 1, 49, 1, weak1 ),"&
"49 (BS_G, ADSTBB(1), input, 1 ),"&
"50 (BY_3, *, internal, 1 ),"& -- A(38)
"51 (BS_G, AB(27), output2, 1, 51, 1, weak1 ),"&
"51 (BS_G, AB(27), input, 1 ),"&
"52 (BS_G, AB(28), output2, 1, 52, 1, weak1 ),"&
"52 (BS_G, AB(28), input, 1 ),"&
"53 (BS_G, AB(29), output2, 1, 53, 1, weak1 ),"&
"53 (BS_G, AB(29), input, 1 ),"&
"54 (BS_G, AB(30), output2, 1, 54, 1, weak1 ),"&
"54 (BS_G, AB(30), input, 1 ),"&
"55 (BS_G, AB(31), output2, 1, 55, 1, weak1 ),"&
"55 (BS_G, AB(31), input, 1 ),"&
"56 (BS_G, AB(32), output2, 1, 56, 1, weak1 ),"&
"56 (BS_G, AB(32), input, 1 ),"&
"57 (BS_G, AB(33), output2, 1, 57, 1, weak1 ),"&
"57 (BS_G, AB(33), input, 1 ),"&
"58 (BS_G, AB(34), output2, 1, 58, 1, weak1 ),"&
"58 (BS_G, AB(34), input, 1 ),"&
"59 (BS_G, AB(35), output2, 1, 59, 1, weak1 ),"&
"59 (BS_G, AB(35), input, 1 ),"&
"60 (BY_3, *, internal, 1 ),"& -- Z60_50
"61 (BS_4, BR1B, input, X ),"&
"62 (BS_G, APB(1), output2, 1, 62, 1, weak1 ),"&
"62 (BS_G, APB(1), input, 1 ),"&
"63 (BS_G, APB(0), output2, 1, 63, 1, weak1 ),"&
"63 (BS_G, APB(0), input, 1 ),"&
"64 (BS_4, RSPB, input, X ),"&
"65 (BS_G, BINITB, output2, 1, 65, 1, weak1 ),"&
"65 (BS_G, BINITB, input, 1 ),"&
"66 (BS_G, MCERRB, output2, 1, 66, 1, weak1 ),"&
"66 (BS_G, MCERRB, input, 1 ),"&
"67 (BS_4, INITB, input, X ),"&
"68 (BS_4, STPCLKB, input, X ),"&
"69 (BX_2, IERRB, output2, 1, 69, 1, weak1 ),"&
"70 (BS_G, BPMB(5), output2, 1, 70, 1, weak1 ),"&
"70 (BS_G, BPMB(5), input, 1 ),"&
"71 (BS_G, BPMB(4), output2, 1, 71, 1, weak1 ),"&
"71 (BS_G, BPMB(4), input, 1 ),"&
"72 (BS_G, BPMB(3), output2, 1, 72, 1, weak1 ),"&
"72 (BS_G, BPMB(3), input, 1 ),"&
"73 (BS_G, BPMB(2), output2, 1, 73, 1, weak1 ),"&
"73 (BS_G, BPMB(2), input, 1 ),"&
"74 (BS_G, BPMB(1), output2, 1, 74, 1, weak1 ),"&
"74 (BS_G, BPMB(1), input, 1 ),"&
"75 (BS_G, BPMB(0), output2, 1, 75, 1, weak1 ),"&
"75 (BS_G, BPMB(0), input, 1 ),"&
"76 (BS_4, BCLK(1), input, 1 ),"&
"77 (BS_4, BCLK(0), input, 1 ),"&
"78 (BS_4, RESETB, input, 1 ),"&
"79 (BS_G, DB(63), output2, 1, 79, 1, weak1 ),"&
"79 (BS_G, DB(63), input, 1 ),"&
"80 (BS_G, DB(62), output2, 1, 80, 1, weak1 ),"&
"80 (BS_G, DB(62), input, 1 ),"&
"81 (BS_G, DB(61), output2, 1, 81, 1, weak1 ),"&
"81 (BS_G, DB(61), input, 1 ),"&
"82 (BS_G, DB(60), output2, 1, 82, 1, weak1 ),"&
"82 (BS_G, DB(60), input, 1 ),"&
"83 (BS_G, DB(59), output2, 1, 83, 1, weak1 ),"&
"83 (BS_G, DB(59), input, 1 ),"&
"84 (BS_G, DB(58), output2, 1, 84, 1, weak1 ),"&
"84 (BS_G, DB(58), input, 1 ),"&
"85 (BS_G, DB(57), output2, 1, 85, 1, weak1 ),"&
"85 (BS_G, DB(57), input, 1 ),"&
"86 (BS_G, DB(56), output2, 1, 86, 1, weak1 ),"&
"86 (BS_G, DB(56), input, 1 ),"&
"87 (BS_G, DSTBNB(3), output2, 1, 87, 1, weak1 ),"&
"87 (BS_G, DSTBNB(3), input, 1 ),"&
"88 (BS_G, DSTBPB(3), output2, 1, 88, 1, weak1 ),"&
"88 (BS_G, DSTBPB(3), input, 1 ),"&
"89 (BS_G, DBIB(3), output2, 1, 89, 1, weak1 ),"&
"89 (BS_G, DBIB(3), input, 1 ),"&
"90 (BS_G, DB(55), output2, 1, 90, 1, weak1 ),"&
"90 (BS_G, DB(55), input, 1 ),"&
"91 (BS_G, DB(54), output2, 1, 91, 1, weak1 ),"&
"91 (BS_G, DB(54), input, 1 ),"&
"92 (BS_G, DB(53), output2, 1, 92, 1, weak1 ),"&
"92 (BS_G, DB(53), input, 1 ),"&
"93 (BS_G, DB(52), output2, 1, 93, 1, weak1 ),"&
"93 (BS_G, DB(52), input, 1 ),"&
"94 (BS_G, DB(51), output2, 1, 94, 1, weak1 ),"&
"94 (BS_G, DB(51), input, 1 ),"&
"95 (BS_G, DB(50), output2, 1, 95, 1, weak1 ),"&
"95 (BS_G, DB(50), input, 1 ),"&
"96 (BS_G, DB(49), output2, 1, 96, 1, weak1 ),"&
"96 (BS_G, DB(49), input, 1 ),"&
"97 (BS_G, DB(48), output2, 1, 97, 1, weak1 ),"&
"97 (BS_G, DB(48), input, 1 ),"&
"98 (BS_G, DB(47), output2, 1, 98, 1, weak1 ),"&
"98 (BS_G, DB(47), input, 1 ),"&
"99 (BS_G, DB(46), output2, 1, 99, 1, weak1 ),"&
"99 (BS_G, DB(46), input, 1 ),"&
"100 (BS_G, DB(45), output2, 1, 100, 1, weak1 ),"&
"100 (BS_G, DB(45), input, 1 ),"&
"101 (BS_G, DB(44), output2, 1, 101, 1, weak1 ),"&
"101 (BS_G, DB(44), input, 1 ),"&
"102 (BS_G, DB(43), output2, 1, 102, 1, weak1 ),"&
"102 (BS_G, DB(43), input, 1 ),"&
"103 (BS_G, DB(42), output2, 1, 103, 1, weak1 ),"&
"103 (BS_G, DB(42), input, 1 ),"&
"104 (BS_G, DB(41), output2, 1, 104, 1, weak1 ),"&
"104 (BS_G, DB(41), input, 1 ),"&
"105 (BS_G, DB(40), output2, 1, 105, 1, weak1 ),"&
"105 (BS_G, DB(40), input, 1 ),"&
"106 (BS_G, DSTBNB(2), output2, 1, 106, 1, weak1 ),"&
"106 (BS_G, DSTBNB(2), input, 1 ),"&
"107 (BS_G, DSTBPB(2), output2, 1, 107, 1, weak1 ),"&
"107 (BS_G, DSTBPB(2), input, 1 ),"&
"108 (BS_G, DBIB(2), output2, 1, 108, 1, weak1 ),"&
"108 (BS_G, DBIB(2), input, 1 ),"&
"109 (BS_G, DB(39), output2, 1, 109, 1, weak1 ),"&
"109 (BS_G, DB(39), input, 1 ),"&
"110 (BS_G, DB(38), output2, 1, 110, 1, weak1 ),"&
"110 (BS_G, DB(38), input, 1 ),"&
"111 (BS_G, DB(37), output2, 1, 111, 1, weak1 ),"&
"111 (BS_G, DB(37), input, 1 ),"&
"112 (BS_G, DB(36), output2, 1, 112, 1, weak1 ),"&
"112 (BS_G, DB(36), input, 1 ),"&
"113 (BS_G, DB(35), output2, 1, 113, 1, weak1 ),"&
"113 (BS_G, DB(35), input, 1 ),"&
"114 (BS_G, DB(34), output2, 1, 114, 1, weak1 ),"&
"114 (BS_G, DB(34), input, 1 ),"&
"115 (BS_G, DB(33), output2, 1, 115, 1, weak1 ),"&
"115 (BS_G, DB(33), input, 1 ),"&
"116 (BS_G, DB(32), output2, 1, 116, 1, weak1 ),"&
"116 (BS_G, DB(32), input, 1 ),"&
"117 (BS_G, DPB(3), output2, 1, 117, 1, weak1 ),"&
"117 (BS_G, DPB(3), input, 1 ),"&
"118 (BS_G, DPB(2), output2, 1, 118, 1, weak1 ),"&
"118 (BS_G, DPB(2), input, 1 ),"&
"119 (BS_G, DPB(1), output2, 1, 119, 1, weak1 ),"&
"119 (BS_G, DPB(1), input, 1 ),"&
"120 (BS_G, DPB(0), output2, 1, 120, 1, weak1 ),"&
"120 (BS_G, DPB(0), input, 1 ),"&
"121 (BS_G, DB(31), output2, 1, 121, 1, weak1 ),"&
"121 (BS_G, DB(31), input, 1 ),"&
"122 (BS_G, DB(30), output2, 1, 122, 1, weak1 ),"&
"122 (BS_G, DB(30), input, 1 ),"&
"123 (BS_G, DB(29), output2, 1, 123, 1, weak1 ),"&
"123 (BS_G, DB(29), input, 1 ),"&
"124 (BS_G, DB(28), output2, 1, 124, 1, weak1 ),"&
"124 (BS_G, DB(28), input, 1 ),"&
"125 (BS_G, DB(27), output2, 1, 125, 1, weak1 ),"&
"125 (BS_G, DB(27), input, 1 ),"&
"126 (BS_G, DB(26), output2, 1, 126, 1, weak1 ),"&
"126 (BS_G, DB(26), input, 1 ),"&
"127 (BS_G, DB(25), output2, 1, 127, 1, weak1 ),"&
"127 (BS_G, DB(25), input, 1 ),"&
"128 (BS_G, DB(24), output2, 1, 128, 1, weak1 ),"&
"128 (BS_G, DB(24), input, 1 ),"&
"129 (BS_G, DSTBNB(1), output2, 1, 129, 1, weak1 ),"&
"129 (BS_G, DSTBNB(1), input, 1 ),"&
"130 (BS_G, DSTBPB(1), output2, 1, 130, 1, weak1 ),"&
"130 (BS_G, DSTBPB(1), input, 1 ),"&
"131 (BS_G, DBIB(1), output2, 1, 131, 1, weak1 ),"&
"131 (BS_G, DBIB(1), input, 1 ),"&
"132 (BS_G, DB(23), output2, 1, 132, 1, weak1 ),"&
"132 (BS_G, DB(23), input, 1 ),"&
"133 (BS_G, DB(22), output2, 1, 133, 1, weak1 ),"&
"133 (BS_G, DB(22), input, 1 ),"&
"134 (BS_G, DB(21), output2, 1, 134, 1, weak1 ),"&
"134 (BS_G, DB(21), input, 1 ),"&
"135 (BS_G, DB(20), output2, 1, 135, 1, weak1 ),"&
"135 (BS_G, DB(20), input, 1 ),"&
"136 (BS_G, DB(19), output2, 1, 136, 1, weak1 ),"&
"136 (BS_G, DB(19), input, 1 ),"&
"137 (BS_G, DB(18), output2, 1, 137, 1, weak1 ),"&
"137 (BS_G, DB(18), input, 1 ),"&
"138 (BS_G, DB(17), output2, 1, 138, 1, weak1 ),"&
"138 (BS_G, DB(17), input, 1 ),"&
"139 (BS_G, DB(16), output2, 1, 139, 1, weak1 ),"&
"139 (BS_G, DB(16), input, 1 ),"&
"140 (BS_G, DB(15), output2, 1, 140, 1, weak1 ),"&
"140 (BS_G, DB(15), input, 1 ),"&
"141 (BS_G, DB(14), output2, 1, 141, 1, weak1 ),"&
"141 (BS_G, DB(14), input, 1 ),"&
"142 (BS_G, DB(13), output2, 1, 142, 1, weak1 ),"&
"142 (BS_G, DB(13), input, 1 ),"&
"143 (BS_G, DB(12), output2, 1, 143, 1, weak1 ),"&
"143 (BS_G, DB(12), input, 1 ),"&
"144 (BS_G, DB(11), output2, 1, 144, 1, weak1 ),"&
"144 (BS_G, DB(11), input, 1 ),"&
"145 (BS_G, DB(10), output2, 1, 145, 1, weak1 ),"&
"145 (BS_G, DB(10), input, 1 ),"&
"146 (BS_G, DB(9), output2, 1, 146, 1, weak1 ),"&
"146 (BS_G, DB(9), input, 1 ),"&
"147 (BS_G, DB(8), output2, 1, 147, 1, weak1 ),"&
"147 (BS_G, DB(8), input, 1 ),"&
"148 (BS_G, DSTBNB(0), output2, 1, 148, 1, weak1 ),"&
"148 (BS_G, DSTBNB(0), input, 1 ),"&
"149 (BS_G, DSTBPB(0), output2, 1, 149, 1, weak1 ),"&
"149 (BS_G, DSTBPB(0), input, 1 ),"&
"150 (BS_G, DBIB(0), output2, 1, 150, 1, weak1 ),"&
"150 (BS_G, DBIB(0), input, 1 ),"&
"151 (BS_G, DB(7), output2, 1, 151, 1, weak1 ),"&
"151 (BS_G, DB(7), input, 1 ),"&
"152 (BS_G, DB(6), output2, 1, 152, 1, weak1 ),"&
"152 (BS_G, DB(6), input, 1 ),"&
"153 (BS_G, DB(5), output2, 1, 153, 1, weak1 ),"&
"153 (BS_G, DB(5), input, 1 ),"&
"154 (BS_G, DB(4), output2, 1, 154, 1, weak1 ),"&
"154 (BS_G, DB(4), input, 1 ),"&
"155 (BS_G, DB(3), output2, 1, 155, 1, weak1 ),"&
"155 (BS_G, DB(3), input, 1 ),"&
"156 (BS_G, DB(2), output2, 1, 156, 1, weak1 ),"&
"156 (BS_G, DB(2), input, 1 ),"&
"157 (BS_G, DB(1), output2, 1, 157, 1, weak1 ),"&
"157 (BS_G, DB(1), input, 1 ),"&
"158 (BS_G, DB(0), output2, 1, 158, 1, weak1 ),"&
"158 (BS_G, DB(0), input, 1 ),"&
"159 (BS_4, FORCEPRB, input, X ),"&
"160 (BX_2, FERRB, output2, 1, 160, 1, weak1 ),"&
"161 (BS_4, A20MB, input, X ),"&
"162 (BS_4, SMIB, input, X ),"&
"163 (BS_4, IGNNEB, input, X ),"&
"164 (BX_2, THERMTRIPB, output2, 1, 164, 1, weak1 ),"&
"165 (BX_2, PROCHOTB, output2, 1, 165, 1, weak1 )";
end DualCoreXeon5000;
