-- M O T O R O L A S S D T J T A G S O F T W A R E
-- BSDL File Generated: Mon Sep 29 12:18:18 1997
--
-- Revision History:
--
entity DSP56824 is
generic (PHYSICAL_PIN_MAP : string := "BU");
port ( TRSTZ: in bit;
TCK: in bit;
TMS: in bit;
TDI: in bit;
TDO: out bit;
D: inout bit_vector(0 to 15);
A: out bit_vector(0 to 15);
DSZ: out bit;
PSZ: out bit;
RDZ: out bit;
WRZ: out bit;
PC15_TIO2: inout bit;
PC14_TIO01: inout bit;
PC13_SRFS: inout bit;
PC12_SRCK: inout bit;
PC11_STFS: inout bit;
PC10_STCK: inout bit;
PC9_SRD: inout bit;
PC8_STD: inout bit;
PC7_SSZ1: inout bit;
PC6_SCK1: inout bit;
PC5_MOSI1: inout bit;
PC4_MISO1: inout bit;
PC3_SSZ0: inout bit;
PC2_SCK0: inout bit;
PC1_MOSI0: inout bit;
PC0_MISO0: inout bit;
EXTAL: in bit;
CLKO: buffer bit;
PB: inout bit_vector(0 to 15);
MODA_IRQAZ: in bit;
MODB_IRQBZ: in bit;
RESETZ: in bit;
XTAL: linkage bit;
SXFC: linkage bit;
VSSD0: linkage bit;
VSSD1: linkage bit;
VDDD0: linkage bit;
VDDD1: linkage bit;
VSSA0: linkage bit;
VSSA1: linkage bit;
VDDA0: linkage bit;
VDDA1: linkage bit;
VSSQ0: linkage bit;
VSSQ1: linkage bit;
VDDQ0: linkage bit;
VDDQ1: linkage bit;
VSSPLL: linkage bit;
VDDPLL: linkage bit;
VSSCLK: linkage bit;
VDDCLK: linkage bit;
VSSPC: linkage bit;
VDDPC: linkage bit;
VSSPB: linkage bit;
VDDPB: linkage bit);
use STD_1149_1_1994.all;
attribute PIN_MAP of DSP56824 : entity is PHYSICAL_PIN_MAP;
constant BU : PIN_MAP_STRING :=
"RDZ: 1, " &
"A: (25, 24, 23, 22, 21, 14, 13, 12, 11, 8, 7, 6, 5, 4, 3, 2), " &
"VDDA0: 9, " &
"VSSA0: 10, " &
"VSSQ1: 15, " &
"VDDQ1: 16, " &
"PSZ: 17, " &
"DSZ: 18, " &
"VSSA1: 19, " &
"VDDA1: 20, " &
"D: (26, 27, 28, 29, 30, 33, 34, 35, 36, 37, 38, 39, 40, 41, 44, 45), " &
"VDDD0: 31, " &
"VSSD0: 32, " &
"VSSD1: 42, " &
"VDDD1: 43, " &
"TDO: 46, " &
"TMS: 47, " &
"TCK: 48, " &
"TRSTZ: 49, " &
"TDI: 50, " &
"RESETZ: 51, " &
"MODB_IRQBZ: 52, " &
"MODA_IRQAZ: 53, " &
"PB: (54, 55, 56, 57, 58, 61, 62, 63, 64, 65, 66, 67, 70, 71, 72, 73), " &
"VDDPB: 59, " &
"VSSPB: 60, " &
"VSSQ0: 68, " &
"VDDQ0: 69, " &
"CLKO: 74, " &
"VSSCLK: 75, " &
"XTAL: 76, " &
"EXTAL: 77, " &
"VDDCLK: 78, " &
"SXFC: 79, " &
"VDDPLL: 80, " &
"VSSPLL: 81, " &
"PC0_MISO0: 82, " &
"PC1_MOSI0: 83, " &
"PC2_SCK0: 84, " &
"PC3_SSZ0: 85, " &
"PC4_MISO1: 86, " &
"PC5_MOSI1: 87, " &
"PC6_SCK1: 88, " &
"VSSPC: 89, " &
"VDDPC: 90, " &
"PC7_SSZ1: 91, " &
"PC8_STD: 92, " &
"PC9_SRD: 93, " &
"PC10_STCK: 94, " &
"PC11_STFS: 95, " &
"PC12_SRCK: 96, " &
"PC13_SRFS: 97, " &
"PC14_TIO01: 98, " &
"PC15_TIO2: 99, " &
"WRZ: 100 ";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_RESET of TRSTZ : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH);
attribute INSTRUCTION_LENGTH of DSP56824 : entity is 4;
attribute INSTRUCTION_OPCODE of DSP56824 : entity is
"EXTEST (0000)," &
"SAMPLE (0001)," &
"IDCODE (0010)," &
"CLAMP (0101)," &
"HIGHZ (0100)," &
"EXTEST_PULLUP (0011)," &
"ENABLE_ONCE (0110)," &
"DEBUG_REQUEST (0111)," &
"PLLRES_DISABLE (1000)," &
"BYPASS (1111)";
attribute INSTRUCTION_CAPTURE of DSP56824 : entity is "XX01";
attribute INSTRUCTION_PRIVATE of DSP56824 : entity is "ENABLE_ONCE, DEBUG_REQUEST, PLLRES_DISABLE";
attribute IDCODE_REGISTER of DSP56824 : entity is
"0000" & -- version
"000101" & -- manufacturer's use
"0100000010" & -- sequence number
"00000001110" & -- manufacturer identity
"1"; -- 1149.1 requirement
attribute REGISTER_ACCESS of DSP56824 : entity is
"BOUNDARY (EXTEST_PULLUP)," &
"BYPASS (ENABLE_ONCE,DEBUG_REQUEST,PLLRES_DISABLE)" ;
attribute BOUNDARY_LENGTH of DSP56824 : entity is 111;
attribute BOUNDARY_REGISTER of DSP56824 : entity is
-- num cell port func safe [ccell dis rslt]
"0 (BC_6, D(15), bidir, X, 1, 0, Z)," &
"1 (BC_2, *, control, 0)," &
"2 (BC_6, D(14), bidir, X, 1, 0, Z)," &
"3 (BC_6, D(13), bidir, X, 1, 0, Z)," &
"4 (BC_6, D(12), bidir, X, 1, 0, Z)," &
"5 (BC_6, D(11), bidir, X, 1, 0, Z)," &
"6 (BC_6, D(10), bidir, X, 1, 0, Z)," &
"7 (BC_6, D(9), bidir, X, 1, 0, Z)," &
"8 (BC_6, D(8), bidir, X, 1, 0, Z)," &
"9 (BC_6, D(7), bidir, X, 1, 0, Z)," &
"10 (BC_6, D(6), bidir, X, 1, 0, Z)," &
"11 (BC_6, D(5), bidir, X, 1, 0, Z)," &
"12 (BC_6, D(4), bidir, X, 1, 0, Z)," &
"13 (BC_6, D(3), bidir, X, 1, 0, Z)," &
"14 (BC_6, D(2), bidir, X, 1, 0, Z)," &
"15 (BC_6, D(1), bidir, X, 1, 0, Z)," &
"16 (BC_6, D(0), bidir, X, 1, 0, Z)," &
"17 (BC_2, A(0), output3, X, 37, 0, Z)," &
"18 (BC_2, A(1), output3, X, 37, 0, Z)," &
"19 (BC_2, A(2), output3, X, 37, 0, Z)," &
-- num cell port func safe [ccell dis rslt]
"20 (BC_2, A(3), output3, X, 37, 0, Z)," &
"21 (BC_2, A(4), output3, X, 37, 0, Z)," &
"22 (BC_2, DSZ, output3, X, 23, 0, Z)," &
"23 (BC_2, *, control, 0)," &
"24 (BC_2, PSZ, output3, X, 25, 0, Z)," &
"25 (BC_2, *, control, 0)," &
"26 (BC_2, A(5), output3, X, 37, 0, Z)," &
"27 (BC_2, A(6), output3, X, 37, 0, Z)," &
"28 (BC_2, A(7), output3, X, 37, 0, Z)," &
"29 (BC_2, A(8), output3, X, 37, 0, Z)," &
"30 (BC_2, A(9), output3, X, 37, 0, Z)," &
"31 (BC_2, A(10), output3, X, 37, 0, Z)," &
"32 (BC_2, A(11), output3, X, 37, 0, Z)," &
"33 (BC_2, A(12), output3, X, 37, 0, Z)," &
"34 (BC_2, A(13), output3, X, 37, 0, Z)," &
"35 (BC_2, A(14), output3, X, 37, 0, Z)," &
"36 (BC_2, A(15), output3, X, 37, 0, Z)," &
"37 (BC_2, *, control, 0)," &
"38 (BC_2, RDZ, output3, X, 39, 0, Z)," &
"39 (BC_2, *, control, 0)," &
-- num cell port func safe [ccell dis rslt]
"40 (BC_2, WRZ, output3, X, 41, 0, Z)," &
"41 (BC_2, *, control, 0)," &
"42 (BC_6, PC15_TIO2, bidir, X, 43, 0, Z)," &
"43 (BC_2, *, control, 0)," &
"44 (BC_6, PC14_TIO01, bidir, X, 45, 0, Z)," &
"45 (BC_2, *, control, 0)," &
"46 (BC_6, PC13_SRFS, bidir, X, 47, 0, Z)," &
"47 (BC_2, *, control, 0)," &
"48 (BC_6, PC12_SRCK, bidir, X, 49, 0, Z)," &
"49 (BC_2, *, control, 0)," &
"50 (BC_6, PC11_STFS, bidir, X, 51, 0, Z)," &
"51 (BC_2, *, control, 0)," &
"52 (BC_6, PC10_STCK, bidir, X, 53, 0, Z)," &
"53 (BC_2, *, control, 0)," &
"54 (BC_6, PC9_SRD, bidir, X, 55, 0, Z)," &
"55 (BC_2, *, control, 0)," &
"56 (BC_6, PC8_STD, bidir, X, 57, 0, Z)," &
"57 (BC_2, *, control, 0)," &
"58 (BC_6, PC7_SSZ1, bidir, X, 59, 0, Z)," &
"59 (BC_2, *, control, 0)," &
-- num cell port func safe [ccell dis rslt]
"60 (BC_6, PC6_SCK1, bidir, X, 61, 0, Z)," &
"61 (BC_2, *, control, 0)," &
"62 (BC_6, PC5_MOSI1, bidir, X, 63, 0, Z)," &
"63 (BC_2, *, control, 0)," &
"64 (BC_6, PC4_MISO1, bidir, X, 65, 0, Z)," &
"65 (BC_2, *, control, 0)," &
"66 (BC_6, PC3_SSZ0, bidir, X, 67, 0, Z)," &
"67 (BC_2, *, control, 0)," &
"68 (BC_6, PC2_SCK0, bidir, X, 69, 0, Z)," &
"69 (BC_2, *, control, 0)," &
"70 (BC_6, PC1_MOSI0, bidir, X, 71, 0, Z)," &
"71 (BC_2, *, control, 0)," &
"72 (BC_6, PC0_MISO0, bidir, X, 73, 0, Z)," &
"73 (BC_2, *, control, 0)," &
"74 (BC_4, EXTAL, input, X)," &
"75 (BC_2, CLKO, output2, X)," &
"76 (BC_6, PB(15), bidir, X, 77, 0, Z)," &
"77 (BC_2, *, control, 0)," &
"78 (BC_6, PB(14), bidir, X, 79, 0, Z)," &
"79 (BC_2, *, control, 0)," &
-- num cell port func safe [ccell dis rslt]
"80 (BC_6, PB(13), bidir, X, 81, 0, Z)," &
"81 (BC_2, *, control, 0)," &
"82 (BC_6, PB(12), bidir, X, 83, 0, Z)," &
"83 (BC_2, *, control, 0)," &
"84 (BC_6, PB(11), bidir, X, 85, 0, Z)," &
"85 (BC_2, *, control, 0)," &
"86 (BC_6, PB(10), bidir, X, 87, 0, Z)," &
"87 (BC_2, *, control, 0)," &
"88 (BC_6, PB(9), bidir, X, 89, 0, Z)," &
"89 (BC_2, *, control, 0)," &
"90 (BC_6, PB(8), bidir, X, 91, 0, Z)," &
"91 (BC_2, *, control, 0)," &
"92 (BC_6, PB(7), bidir, X, 93, 0, Z)," &
"93 (BC_2, *, control, 0)," &
"94 (BC_6, PB(6), bidir, X, 95, 0, Z)," &
"95 (BC_2, *, control, 0)," &
"96 (BC_6, PB(5), bidir, X, 97, 0, Z)," &
"97 (BC_2, *, control, 0)," &
"98 (BC_6, PB(4), bidir, X, 99, 0, Z)," &
"99 (BC_2, *, control, 0)," &
-- num cell port func safe [ccell dis rslt]
"100 (BC_6, PB(3), bidir, X, 101, 0, Z)," &
"101 (BC_2, *, control, 0)," &
"102 (BC_6, PB(2), bidir, X, 103, 0, Z)," &
"103 (BC_2, *, control, 0)," &
"104 (BC_6, PB(1), bidir, X, 105, 0, Z)," &
"105 (BC_2, *, control, 0)," &
"106 (BC_6, PB(0), bidir, X, 107, 0, Z)," &
"107 (BC_2, *, control, 0)," &
"108 (BC_4, MODA_IRQAZ, input, X)," &
"109 (BC_4, MODB_IRQBZ, input, X)," &
"110 (BC_2, RESETZ, input, X)";
end DSP56824;