BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: MT9072AV

-- Copyright (C) 2001  Zarlink Corporation
--
-- File Name     : MT9072AB.BSD
-- Device        : MT9072AV
-- Package       : 256 Pin LBGA
-- Documentation : MT9072 Datasheet
--
-- *********************************************************************
-- *                           IMPORTANT NOTICE                        *
-- *********************************************************************
--
-- Zarlink,and MT9072AV are trademarks of Zarlink
-- Corporation.  Zarlink products, marketed under trademarks, are
-- protected under numerous US and foreign patents and pending
-- applications, maskwork rights, and copyrights.   Zarlink warrants
-- performance of its semiconductor products to current specifications
-- in accordance with Zarlink's standard warranty, but reserves the
-- right to make changes to any products and services at any time
-- without notice.  Zarlink assumes no responsibility or liability
-- arising out of the application or use of any information, product,
-- or service described herein except as expressly agreed to in
-- writing by Zarlink Corporation.  Zarlink customers are advised to
-- obtain the latest version of device specifications before relying
-- on any published information and before placing orders for products
-- or services.


entity MT9072AV is
  generic (PHYSICAL_PIN_MAP : string := "LBGA256");

port (
--Framer ports
--I/O Pins
    TXCL[0]    : inout bit;
--Dedicated Input Pins
    RPOS[0] :  in bit;
    RNEG[0]   , EXCLi[0]   ,
    TXDL[0]   , RXMFB[0]   , DSTI[0]    ,
    CSTI[0]   , CKI[0]    , FPI[0]  : in bit;
--Output pins
    TPOS[0]   , TNEG[0]   , TXDLC[0]   , RXFB[0],RXDL[0],RXDLC[0] : out bit;
--Tristate pins
    DSTO[0]   , CSTO[0]   : out bit;

--I/O Pins
    TXCL[1]    : inout bit;
--Dedicated Input Pins
    RPOS[1]   , RNEG[1]   , EXCLi[1]   , 
     TXDL[1]   , RXMFB[1]   , DSTI[1]    ,
    CSTI[1]   , CKI[1]    , FPI[1]  : in bit;
--Output pins  
    TPOS[1]   , TNEG[1]   , TXDLC[1]   , RXFB[1],RXDL[1],RXDLC[1] : out bit;
--Tristate pins
    DSTO[1]   , CSTO[1]   : out bit;

--I/O Pins
    TXCL[2]    : inout bit;
--Dedicated Input Pins
    RPOS[2]   , RNEG[2]   , EXCLi[2]   , 
     TXDL[2]   , RXMFB[2]   , DSTI[2]    ,
    CSTI[2]   , CKI[2]    , FPI[2]  : in bit;
--Output pins
    TPOS[2]   , TNEG[2]   , TXDLC[2]   , RXFB[2],RXDL[2],RXDLC[2] : out bit;
--Tristate pins
    DSTO[2]   , CSTO[2]   : out bit;

--I/O Pins
    TXCL[3]    : inout bit;
--Dedicated Input Pins
    RPOS[3]   , RNEG[3]   , EXCLi[3]   , 
    TXDL[3]   , RXMFB[3]   , DSTI[3]    ,
    CSTI[3]   , CKI[3]    , FPI[3]  : in bit;
--Output pins
    TPOS[3]   , TNEG[3]   , TXDLC[3]   , RXFB[3],RXDL[3],RXDLC[3] : out bit;
--Tristate pins
    DSTO[3]   , CSTO[3]   : out bit;

--I/O Pins
    TXCL[4]    : inout bit;
--Dedicated Input Pins
    RPOS[4]   , RNEG[4]   , EXCLi[4]   , 
     TXDL[4]   , RXMFB[4]   , DSTI[4]    ,
    CSTI[4]   , CKI[4]    , FPI[4]  : in bit;
--Output pins
    TPOS[4]   , TNEG[4]   , TXDLC[4]   , RXFB[4],RXDL[4],RXDLC[4] : out bit;
--Tristate pins
    DSTO[4]   , CSTO[4]   : out bit;

--I/O Pins
    TXCL[5]    : inout bit;
--Dedicated Input Pins
    RPOS[5]   , RNEG[5]   , EXCLi[5]   , 
     TXDL[5]   , RXMFB[5]   , DSTI[5]    ,
    CSTI[5]   , CKI[5]    , FPI[5]  : in bit;
--Output pins
    TPOS[5]   , TNEG[5]   , TXDLC[5]   , RXFB[5],RXDL[5],RXDLC[5] : out bit;
--Tristate pins
    DSTO[5]   , CSTO[5]   : out bit;

--I/O Pins
    TXCL[6]    : inout bit;
--Dedicated Input Pins
    RPOS[6]   , RNEG[6]   , EXCLi[6]   , 
    TXDL[6]   , RXMFB[6]   , DSTI[6]    ,
    CSTI[6]   , CKI[6]    , FPI[6]  : in bit;
--Output pins
    TPOS[6]   , TNEG[6]   , TXDLC[6]   , RXFB[6],RXDL[6],RXDLC[6] : out bit;
--Tristate pins
    DSTO[6]   , CSTO[6]   : out bit;

--I/O Pins
    TXCL[7]    : inout bit;
--Dedicated Input Pins
    RPOS[7]   , RNEG[7]   , EXCLi[7]   , 
     TXDL[7]   , RXMFB[7]   , DSTI[7]    ,
    CSTI[7]   , CKI[7]    , FPI[7]  : in bit;
--Output pins
    TPOS[7]   , TNEG[7]   , TXDLC[7]   , RXFB[7],RXDL[7],RXDLC[7] : out bit;
--Tristate pins
    DSTO[7]   , CSTO[7]   : out bit;

--Databus
    D      :inout bit_vector(0 to 15);
--Address bus
    A      :in bit_vector(0 to 11);--Input Pins
    CSB    , DSB    , RWB    , IRQB    , IMB    ,
    RESETB  , TAISB   , TXMFB , REST1, REST3  : in bit;

    --JTAG Ports
    TCK    , TMS    , TDI, TRSTn    : in bit;
    TDO    : out bit ;   
	--Pins not in the jtag port follow
    REST2: linkage bit;
--Power Pins
    VDD    : linkage bit_vector (1 to 10);
--Ground Pins
    VSS    : linkage bit_vector (1 to 10)
);

use STD_1149_1_1990.all;


-- *********************************************************************
-- *                             PIN MAPPING                           *
-- *                                                                   *
-- *********************************************************************

attribute PIN_MAP of MT9072AV : entity is PHYSICAL_PIN_MAP;
constant LBGA256 : PIN_MAP_STRING :=
"RPOS[0]:D1,  RPOS[1]:H3, RPOS[2]:N1, RPOS[3]:N7, RPOS[4]:P9, RPOS[5]:R15, RPOS[6]:K13, RPOS[7]:F15," &
"RNEG[0]:D2,  RNEG[1]:H4, RNEG[2]:N2, RNEG[3]:N8, RNEG[4]:P10, RNEG[5]:R16, RNEG[6]:K14, RNEG[7]:F16," &
"EXCLi[0]:D3, EXCLi[1]:J1, EXCLi[2]:N3, EXCLi[3]:P5, EXCLi[4]:P11, EXCLi[5]:P13, EXCLi[6]:K15, EXCLi[7]:E13," &
"TPOS[0]:D4,  TPOS[1]:J2, TPOS[2]:N4, TPOS[3]:P6, TPOS[4]:P12, TPOS[5]:P14, TPOS[6]:K16, TPOS[7]:E14," &
"TNEG[0]:E1, TNEG[1]:J3, TNEG[2]:P1, TNEG[3]:P7, TNEG[4]:R9, TNEG[5]:P15, TNEG[6]:J13, TNEG[7]:E15 ," &
"TXCL[0]:E2, TXCL[1]:J4, TXCL[2]:P2, TXCL[3]:P8, TXCL[4]:R10, TXCL[5]:P16, TXCL[6]:J14, TXCL[7]:E16 ," &
"RXDL[0]:E3, RXDL[1]:K1, RXDL[2]:P3, RXDL[3]:R5, RXDL[4]:R11, RXDL[5]:N13, RXDL[6]:J15, RXDL[7]:D13 ," &
"RXDLC[0]:E4, RXDLC[1]:K2, RXDLC[2]:P4, RXDLC[3]:R6, RXDLC[4]:R12, RXDLC[5]:N14, RXDLC[6]:J16, RXDLC[7]:D14 ," &
"TXDL[0]:F1, TXDL[1]:K3, TXDL[2]:R1, TXDL[3]:R7, TXDL[4]:T9, TXDL[5]:N15, TXDL[6]:H13, TXDL[7]:D15 ," &
"TXDLC[0]:F2, TXDLC[1]:K4, TXDLC[2]:R2, TXDLC[3]:R8, TXDLC[4]:T10, TXDLC[5]:N16, TXDLC[6]:H14, TXDLC[7]:D16 , " &
"RXMFB[0]:F3, RXMFB[1]:L1, RXMFB[2]:R3, RXMFB[3]:T5, RXMFB[4]:T11, RXMFB[5]:M13, RXMFB[6]:H15, RXMFB[7]:C13 ," &
"DSTI[0]:F4, DSTI[1]:L2, DSTI[2]:R4, DSTI[3]:T6, DSTI[4]:T12, DSTI[5]:M14, DSTI[6]:H16, DSTI[7]:C14 ," &
"DSTO[0]:G1, DSTO[1]:L3, DSTO[2]:T1, DSTO[3]:T7, DSTO[4]:T13, DSTO[5]:M15, DSTO[6]:G13, DSTO[7]:C15 ," &
"CSTI[0]:G2, CSTI[1]:L4, CSTI[2]:T2, CSTI[3]:T8, CSTI[4]:T14, CSTI[5]:M16, CSTI[6]:G14, CSTI[7]:C16 ," &
"CSTO[0]:G3, CSTO[1]:M1, CSTO[2]:T3, CSTO[3]:N9, CSTO[4]:T15, CSTO[5]:L13, CSTO[6]:G15, CSTO[7]:B13 ," &
"CKI[0]:G4, CKI[1]:M2, CKI[2]:T4, CKI[3]:N10, CKI[4]:T16, CKI[5]:L14, CKI[6]:G16, CKI[7]:B14 ," &
"FPI[0]:H1, FPI[1]:M3, FPI[2]:N5, FPI[3]:N11, FPI[4]:R13, FPI[5]:L15, FPI[6]:F13, FPI[7]:B15  ," &
"RXFB[0]:H2, RXFB[1]:M4, RXFB[2]:N6, RXFB[3]:N12, RXFB[4]:R14, RXFB[5]:L16, RXFB[6]:F14, RXFB[7]:B16 ," &

"D:(A13, A14, A15, A16, B12, A12, C12, D12, A11, B11, C11, D11, C10, D10, B10, A10 )," &
"A:( B9, A9, C9, D9, B8, C8, A8, D8, D7, B7, C7, A7 )," &
"CSB: A6," &
"DSB: D6," &
"RWB: B6," &
"IRQB: C6," &
"IMB:  D5," &
"RESETB: C5," &
"TAISB: A5," &
"TXMFB: B5," &
"REST1: A4," &
"REST3: B4," &

--JTAG ports
    " TDI:A3, TDO:A2, TMS:B3,TCK:B2, TRSTn:C3," &

--Power Pins
    "VDD    : (G5, H5, J5, K5, L5, G12, H12, J12, K12, L12), "&

--Ground Pins
    "VSS    : (E7, E8, E9, E10, E11, M7, M8, M9, M10, M11)";

--Scan port identification
attribute TAP_SCAN_IN of TDI      : signal is true;
attribute TAP_SCAN_MODE of TMS    : signal is true;
attribute TAP_SCAN_OUT of TDO     : signal is true;
attribute TAP_SCAN_RESET of TRSTn : signal is true;
attribute TAP_SCAN_CLOCK of TCK   : signal is (10.00e6,BOTH);

--TAP Description
attribute INSTRUCTION_LENGTH of MT9072AV : entity is 3;
attribute INSTRUCTION_OPCODE of MT9072AV: entity is
  "BYPASS   (111),"&
  "EXTEST   (000),"&
  "IDCODE   (001),"&
  "SAMPLE   (010)";
attribute INSTRUCTION_CAPTURE of MT9072AV: entity is "001";

attribute IDCODE_REGISTER of MT9072AV: entity is
  "0000"&               --4-bit Version
  "1001000001110010"&   --16-bit Part Number (hex 9072)
  "00010100101"&        --11-bit Manufacturer's Identity
  "1";                  --Mandatory LSB

attribute REGISTER_ACCESS of MT9072AV: entity is
  --"DEVICE_ID (IDCODE),"&
  "BYPASS(BYPASS),"&
  "BOUNDARY(EXTEST,SAMPLE)";

-- BOUNDARY SCAN CHAIN

attribute BOUNDARY_CELLS of MT9072AV: entity is "BC_1, BC_4";  
attribute BOUNDARY_LENGTH of MT9072AV: entity is 246;

attribute BOUNDARY_REGISTER of MT9072AV: entity is

--  num   cell    port      function  safe [ccell disval rslt]

   " 0    ( BC_4, RPOS[0],  input,    X)," &
   " 1    ( BC_4, RNEG[0],  input,    X)," &
   " 2    ( BC_4, EXCLi[0], input,    X)," &
   " 3    ( BC_1, TPOS[0],  output2,  X)," &
   " 4    ( BC_1, TNEG[0],  output2,  X)," &
   " 5    ( BC_4, TXCL[0],  input,    X)," &
   " 6    ( BC_1, TXCL[0],  output3,  X, 7, 1, Z)," &
   " 7    ( BC_1,       *,  control,  1)," &
   " 8    ( BC_1, RXDL[0],  output2,  X)," &
   " 9    ( BC_1, RXDLC[0], output2,  X)," &
   " 10   ( BC_4, TXDL[0],  input,    X)," &
   " 11   ( BC_1, TXDLC[0], output2,  X)," &
   " 12   ( BC_4, RXMFB[0], input,    X)," &
   " 13   ( BC_4, DSTI[0],  input,    X)," &
   " 14   ( BC_1, DSTO[0],  output3,  X, 15, 1, Z)," &
   " 15   ( BC_1,       *,  control,  1)," &
   " 16   ( BC_4, CSTI[0],  input,    X)," &
   " 17   ( BC_1, CSTO[0],  output3,  X, 18, 1, Z)," &
   " 18   ( BC_1,       *,  control,  1)," &
   " 19   ( BC_4, CKI[0],   input,    X)," &
   " 20   ( BC_4, FPI[0],   input,    X)," &
   " 21   ( BC_1, RXFB[0],  output2,  X)," &
   " 22   ( BC_4, RPOS[1],  input,    X)," &
   " 23   ( BC_4, RNEG[1],  input,    X)," &
   " 24   ( BC_4, EXCLi[1], input,    X)," &
   " 25   ( BC_1, TPOS[1],  output2,  X)," &
   " 26   ( BC_1, TNEG[1],  output2,  X)," &
   " 27   ( BC_4, TXCL[1],  input,    X)," &
   " 28   ( BC_1, TXCL[1],  output3,  X, 29, 1, Z)," &
   " 29   ( BC_1,       *,  control,  1)," &
   " 30   ( BC_1, RXDL[1],  output2,  X)," &
   " 31   ( BC_1, RXDLC[1], output2,  X)," &
   " 32   ( BC_4, TXDL[1],  input,    X)," &
   " 33   ( BC_1, TXDLC[1], output2,  X)," &
   " 34   ( BC_4, RXMFB[1], input,    X)," &
   " 35   ( BC_4, DSTI[1],  input,    X)," &
   " 36   ( BC_1, DSTO[1],  output3,  X, 37, 1, Z)," &
   " 37   ( BC_1,       *,  control,  1)," &
   " 38   ( BC_4, CSTI[1],  input,    X)," &
   " 39   ( BC_1, CSTO[1],  output3,  X, 40, 1, Z)," &
   " 40   ( BC_1,       *,  control,  1)," &
   " 41   ( BC_4, CKI[1],   input,    X)," &
   " 42   ( BC_4, FPI[1],   input,    X)," &
   " 43   ( BC_1, RXFB[1],  output2,  X), " &
   " 44   ( BC_4, RPOS[2],  input,    X)," &
   " 45   ( BC_4, RNEG[2],  input,    X)," &
   " 46   ( BC_4, EXCLi[2], input,    X)," &
   " 47   ( BC_1, TPOS[2],  output2,  X)," &
   " 48   ( BC_1, TNEG[2],  output2,  X)," &
   " 49   ( BC_4, TXCL[2],  input,    X)," &
   " 50   ( BC_1, TXCL[2],  output3,  X, 51, 1, Z)," &
   " 51   ( BC_1,      *,   control,  1)," &
   " 52   ( BC_1, RXDL[2],  output2,  X)," &
   " 53   ( BC_1, RXDLC[2], output2,  X)," &
   " 54   ( BC_4, TXDL[2],  input,    X)," &
   " 55   ( BC_1, TXDLC[2], output2,  X)," &
   " 56   ( BC_4, RXMFB[2], input,    X)," &
   " 57   ( BC_4, DSTI[2],  input,    X)," &
   " 58   ( BC_1, DSTO[2],  output3,  X, 59, 1, Z)," &
   " 59   ( BC_1,       *,  control,  1)," &
   " 60   ( BC_4, CSTI[2],  input,    X)," &
   " 61   ( BC_1, CSTO[2],  output3,  X, 62, 1, Z)," &
   " 62   ( BC_1,       *,  control,  1)," &
   " 63   ( BC_4, CKI[2],   input,    X)," &
   " 64   ( BC_4, FPI[2],   input,    X)," &
   " 65   ( BC_1, RXFB[2],  output2,  X)," &
   " 66   ( BC_4, RPOS[3],  input,    X)," &
   " 67   ( BC_4, RNEG[3],  input,    X)," &
   " 68   ( BC_4, EXCLi[3], input,    X)," &
   " 69   ( BC_1, TPOS[3],  output2,  X)," &
   " 70   ( BC_1, TNEG[3],  output2,  X)," &
   " 71   ( BC_4, TXCL[3],  input,    X)," &
   " 72   ( BC_1, TXCL[3],  output3,  X, 73, 1, Z)," &
   " 73   ( BC_1,       *,  control,  1)," &
   " 74   ( BC_1, RXDL[3],  output2,  X)," &
   " 75   ( BC_1, RXDLC[3], output2,  X)," &
   " 76   ( BC_4, TXDL[3],  input,    X)," &
   " 77   ( BC_1, TXDLC[3], output2,  X)," &
   " 78   ( BC_4, RXMFB[3], input,    X)," &
   " 79   ( BC_4, DSTI[3],  input,    X)," &
   " 80   ( BC_1, DSTO[3],  output3,  X, 81, 1, Z)," &
   " 81   ( BC_1,       *,  control,  1)," &
   " 82   ( BC_4, CSTI[3],  input,    X)," &
   " 83   ( BC_1, CSTO[3],  output3,  X, 84, 1, Z)," &
   " 84   ( BC_1,       *,  control,  1)," &
   " 85   ( BC_4, CKI[3],   input,    X)," &
   " 86   ( BC_4, FPI[3],   input,    X)," &
   " 87   ( BC_1, RXFB[3],  output2,  X)," &
   " 88   ( BC_4, RPOS[4],  input,    X)," &
   " 89   ( BC_4, RNEG[4],  input,    X)," &
   " 90   ( BC_4, EXCLi[4], input,    X)," &
   " 91   ( BC_1, TPOS[4],  output2,  X)," &
   " 92   ( BC_1, TNEG[4],  output2,  X)," &
   " 93   ( BC_4, TXCL[4],  input,    X)," &
   " 94   ( BC_1, TXCL[4],  output3,  X, 95, 1, Z)," &
   " 95   ( BC_1,       *,  control,  1)," &
   " 96   ( BC_1, RXDL[4],  output2,  X)," &
   " 97   ( BC_1, RXDLC[4], output2,  X)," &
   " 98   ( BC_4, TXDL[4],  input,    X)," &
   " 99   ( BC_1, TXDLC[4], output2,  X)," &
   " 100  ( BC_4, RXMFB[4], input,    X)," &
   " 101  ( BC_4, DSTI[4],  input,    X)," &
   " 102  ( BC_1, DSTO[4],  output3,  X, 103, 1, Z)," &
   " 103  ( BC_1,       *,  control,  1)," &
   " 104  ( BC_4, CSTI[4],  input,    X)," &
   " 105  ( BC_1, CSTO[4],  output3,  X, 106, 1, Z)," &
   " 106  ( BC_1,       *,  control,  1)," &
   " 107  ( BC_4, CKI[4],   input,    X)," &
   " 108  ( BC_4, FPI[4],   input,    X)," &
   " 109  ( BC_1, RXFB[4],  output2,  X)," &
   " 110  ( BC_4, RPOS[5],  input,    X)," &
   " 111  ( BC_4, RNEG[5],  input,    X)," &
   " 112  ( BC_4, EXCLi[5], input,    X)," &
   " 113  ( BC_1, TPOS[5],  output2,  X)," &
   " 114  ( BC_1, TNEG[5],  output2,  X)," &
   " 115  ( BC_4, txcl[5],  input,    X)," &
   " 116  ( BC_1, TXCL[5],  output3,  X, 117, 1, Z)," &
   " 117  ( BC_1,       *,  control,  1)," &
   " 118  ( BC_1, RXDL[5],  output2,  X)," &
   " 119  ( BC_1, RXDLC[5], output2,  X)," &
   " 120  ( BC_4, TXDL[5],  input,    X)," &
   " 121  ( BC_1, TXDLC[5], output2,  X)," &
   " 122  ( BC_4, RXMFB[5], input,    X)," &
   " 123  ( BC_4, DSTI[5],  input,    X)," &
   " 124  ( BC_1, DSTO[5],  output3,  X, 125, 1, Z)," &
   " 125  ( BC_1,       *,  control,  1)," &
   " 126  ( BC_4, CSTI[5],  input,    X)," &
   " 127  ( BC_1, CSTO[5],  output3,  X, 128, 1, Z)," &
   " 128  ( BC_1,       *,  control,  1)," &
   " 129  ( BC_4, CKI[5],   input,    X)," &
   " 130  ( BC_4, FPI[5],   input,    X)," &
   " 131  ( BC_1, RXFB[5],  output2,  X), " &
   " 132  ( BC_4, RPOS[6],  input,    X)," &
   " 133  ( BC_4, RNEG[6],  input,    X)," &
   " 134  ( BC_4, EXCLi[6], input,    X)," &
   " 135  ( BC_1, TPOS[6],  output2,  X)," &
   " 136  ( BC_1, TNEG[6],  output2,  X)," &
   " 137  ( BC_4, txcl[6],  input,    X)," &
   " 138  ( BC_1, TXCL[6],  output3,  X, 139, 1, Z)," &
   " 139  ( BC_1,      *,   control,  1)," &
   " 140  ( BC_1, RXDL[6],  output2,  X)," &
   " 141  ( BC_1, RXDLC[6], output2,  X)," &
   " 142  ( BC_4, TXDL[6],  input,    X)," &
   " 143  ( BC_1, TXDLC[6], output2,  X)," &
   " 144  ( BC_4, RXMFB[6], input,    X)," &
   " 145  ( BC_4, DSTI[6],  input,    X)," &
   " 146  ( BC_1, DSTO[6],  output3,  X, 147, 1, Z)," &
   " 147  ( BC_1,       *,  control,  1)," &
   " 148  ( BC_4, CSTI[6],  input,    X)," &
   " 149  ( BC_1, CSTO[6],  output3,  X, 150, 1, Z)," &
   " 150  ( BC_1,       *,  control,  1)," &
   " 151  ( BC_4, CKI[6],   input,    X)," &
   " 152  ( BC_4, FPI[6],   input,    X)," &
   " 153  ( BC_1, RXFB[6],  output2,  X)," &
   " 154  ( BC_4, RPOS[7],  input,    X)," &
   " 155  ( BC_4, RNEG[7],  input,    X)," &
   " 156  ( BC_4, EXCLi[7], input,    X)," &
   " 157  ( BC_1, TPOS[7],  output2,  X)," &
   " 158  ( BC_1, TNEG[7],  output2,  X)," &
   " 159  ( BC_4, TXCL[7],  input,    X)," &
   " 160  ( BC_1, TXCL[7],  output3,  X, 161, 1, Z)," &
   " 161  ( BC_1,      *,   control,  1)," &
   " 162  ( BC_1, RXDL[7],  output2,  X)," &
   " 163  ( BC_1, RXDLC[7], output2,  X)," &
   " 164  ( BC_4, TXDL[7],  input,    X)," &
   " 165  ( BC_1, TXDLC[7], output2,  X)," &
   " 166  ( BC_4, RXMFB[7], input,    X)," &
   " 167  ( BC_4, DSTI[7],  input,    X)," &
   " 168  ( BC_1, DSTO[7],  output3,  X, 169, 1, Z)," &
   " 169  ( BC_1,       *,  control,  1)," &
   " 170  ( BC_4, CSTI[7],  input,    X)," &
   " 171  ( BC_1, CSTO[7],  output3,  X, 172, 1, Z)," &
   " 172  ( BC_1,       *,  control,  1)," &
   " 173  ( BC_4, CKI[7],   input,    X)," &
   " 174  ( BC_4, FPI[7],   input,    X)," &
   " 175  ( BC_1, RXFB[7],  output2,  X)," &
   " 176  ( BC_4, D(0),     input,    X)," &
   " 177  ( BC_1, D(0),     output3,  X, 178, 1, Z)," &
   " 178  ( BC_1,       *,  control,  1)," &
   " 179  ( BC_4, D(1),     input,    X)," &
   " 180  ( BC_1, D(1),     output3,  X, 181, 1, Z)," &
   " 181  ( BC_1,       *,  control,  1)," &
   " 182  ( BC_4, D(2),     input,    X)," &
   " 183  ( BC_1, D(2),     output3,  X, 184, 1, Z)," &
   " 184  ( BC_1,      *,   control,  1)," &
   " 185  ( BC_4, D(3),     input,    X)," &
   " 186  ( BC_1, D(3),     output3,  X, 187, 1, Z)," &
   " 187  ( BC_1,       *,  control,  1)," &
   " 188  ( BC_4, D(4),     input,    X)," &
   " 189  ( BC_1, D(4),     output3,  X, 190, 1, Z)," &
   " 190  ( BC_1,       *,  control,  1)," &
   " 191  ( BC_4, D(5),     input,    X)," &
   " 192  ( BC_1, D(5),     output3,  X, 193, 1, Z)," &
   " 193  ( BC_1,       *,  control,  1)," &
   " 194  ( BC_4, D(6),     input,    X)," &
   " 195  ( BC_1, D(6),     output3,  X, 196, 1, Z)," &
   " 196  ( BC_1,       *,  control,  1)," &
   " 197  ( BC_4, D(7),     input,    X)," &
   " 198  ( BC_1, D(7),     output3,  X, 199, 1, Z)," &
   " 199  ( BC_1,       *,  control,  1)," &
   " 200  ( BC_4, D(8),     input,    X)," &
   " 201  ( BC_1, D(8),     output3,  X, 202, 1, Z)," &
   " 202  ( BC_1,       *,  control,  1)," &
   " 203  ( BC_4, D(9),     input,    X)," &
   " 204  ( BC_1, D(9),     output3,  X, 205, 1, Z)," &
   " 205  ( BC_1,       *,  control,  1)," &
   " 206  ( BC_4, D(10),    input,    X)," &
   " 207  ( BC_1, D(10),    output3,  X, 208, 1, Z)," &
   " 208  ( BC_1,       *,  control,  1)," &
   " 209  ( BC_4, D(11),    input,    X)," &
   " 210  ( BC_1, D(11),    output3,  X, 211, 1, Z)," &
   " 211  ( BC_1,       *,  control,  1)," &
   " 212  ( BC_4, D(12),    input,    X)," &
   " 213  ( BC_1, D(12),    output3,  X, 214, 1, Z)," &
   " 214  ( BC_1,       *,  control,  1)," &
   " 215  ( BC_4, D(13),    input,    X)," &
   " 216  ( BC_1, D(13),    output3,  X, 217, 1, Z)," &
   " 217  ( BC_1,       *,  control,  1)," &
   " 218  ( BC_4, D(14),    input,    X)," &
   " 219  ( BC_1, D(14),    output3,  X, 220, 1, Z)," &
   " 220  ( BC_1,       *,  control,  1)," &
   " 221  ( BC_4, D(15),    input,    X)," &
   " 222  ( BC_1, D(15),    output3,  X, 223, 1, Z)," &
   " 223  ( BC_1,       *,  control,  1)," &
   " 224  ( BC_4, A(0),     input,    X)," &
   " 225  ( BC_4, A(1),     input,    X)," &
   " 226  ( BC_4, A(2),     input,    X)," &
   " 227  ( BC_4, A(3),     input,    X)," &
   " 228  ( BC_4, A(4),     input,    X)," &
   " 229  ( BC_4, A(5),     input,    X)," &
   " 230  ( BC_4, A(6),     input,    X)," &
   " 231  ( BC_4, A(7),     input,    X)," &
   " 232  ( BC_4, A(8),     input,    X)," &
   " 233  ( BC_4, A(9),     input,    X)," &
   " 234  ( BC_4, A(10),    input,    X)," &
   " 235  ( BC_4, A(11),    input,    X)," &
   " 236  ( BC_4, CSB, 	    input,    X)," &
   " 237  ( BC_4, DSB, 	    input,    X)," &
   " 238  ( BC_4, RWB, 	    input,    X)," &
   " 239  ( BC_4, IRQB,     input,    X)," &
   " 240  ( BC_4, IMB,      input,    X)," &
   " 241  ( BC_4, RESETB,   input,    X)," &
   " 242  ( BC_4, TAISB,    input,    X)," &
   " 243  ( BC_4, TXMFB,    input,    X)," &
   " 244  ( BC_4, REST1,    input,    X)," &
   " 245  ( BC_4, REST3,    input,    X)";

end MT9072AV;