BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: STM32WB55_UFQFPN48

-- ****************** (C) COPYRIGHT 2019 STMicroelectronics **************************
-- * File Name          : STM32WB55_UFQFPN48.bsd                                     *
-- * Author             : STMicroelectronics www.st.com                              *
-- * Version            : V1.0                                                       *
-- * Date               : 11-February-2019                                           *
-- * Description        : Boundary Scan Description Language (BSDL) file for the     *
-- *                      STM32WB55_UFQFPN48 Microcontrollers.                       *
-- ***********************************************************************************
-- * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS     *
-- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.*
-- * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,        *
-- * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE   *
-- * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING         *
-- * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.                 *
-- ***********************************************************************************
-- * This BSDL file has been syntaxed checked and validated by:                      *                                                                 
-- * GOEPEL SyntaxChecker Version 3.1.2                                              *
-- ***********************************************************************************

 entity STM32WB55_UFQFPN48 is					
 -- This section identifies the default device package selected.
 generic (PHYSICAL_PIN_MAP: string:= "UFQFPN48_PACKAGE");
 -- This section declares all the ports in the design.	 

   port ( 
      JTDI          : in    bit;				  
      JTMS          : in    bit;				  
      JTCK          : in    bit;				  
      JTRST         : in    bit;				  
      JTDO          : out   bit;
      NRST          : in    bit;   
      PE4           : inout bit;
      VBAT          : linkage bit;
      PC14_OSC32_IN	: inout bit;
      PC15_OSC32_OUT: inout bit;
      VSSA          : linkage bit;
      VDDA          : linkage bit;
      PA0           : inout bit;
      PA1           : inout bit;
      PA2           : inout bit;
      PA3           : inout bit;
      PA4           : inout bit;
      PA5           : inout bit;
      PA6           : inout bit;
      PA7           : inout bit;
      PB0           : inout bit;
      PB1           : inout bit;
      PB2           : inout bit;
      RF1           : linkage bit; 
      VSSSMPS       : linkage bit;
      VDDSMPS       : linkage bit; 
      OSC_OUT       : linkage bit;
      OSC_IN        : linkage bit;
      VSSRF         : linkage bit;
      AT0           : linkage bit;
      AT1           : linkage bit;
      PA8           : inout bit;
      PA9           : inout bit;
      VDDRF         : linkage bit;
      VFBSMPS       : linkage bit;
      VLXSMPS       : linkage bit;
      PA10          : inout bit;
      PA11          : inout bit;
      PA12          : inout bit;
      VDDUSB        : linkage bit;
      PB5           : inout bit;
      PB6           : inout bit;
      PB7           : inout bit;
      PH3_BOOT0     : inout bit;
      PB8           : inout bit;
      PB9           : inout bit;				  
      VDD           : linkage bit_vector(0 to 2)
    );

--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
    use STD_1149_1_2001.all;

    attribute COMPONENT_CONFORMANCE of STM32WB55_UFQFPN48: entity is "STD_1149_1_2001";

    attribute PIN_MAP of STM32WB55_UFQFPN48 : entity is PHYSICAL_PIN_MAP;

-- This section specifies the pin map for each port. This information is extracted from the
-- port-to-pin map file that was read in using the "read_pin_map" command.

    constant UFQFPN48_PACKAGE: PIN_MAP_STRING :=   
      "JTMS           : 39  ," & 
      "JTCK           : 41  ," & 
      "JTDI           : 42  ," & 
      "JTDO           : 43  ," & 
      "JTRST          : 44  ," & 
      "PE4            : 30  ," & 
      "VBAT           : 1 ," & 
      "PC14_OSC32_IN  : 2 ," & 
      "PC15_OSC32_OUT : 3 ," & 
      "NRST           : 7  ," & 
      "VDDA           : 8  ," & 
      "PA0            : 9  ," & 
      "PA1            : 10  ," & 
      "PA2            : 11  ," & 
      "PA3            : 12  ," & 
      "PA4            : 13  ," & 
      "PA5            : 14  ," & 
      "PA6            : 15  ," & 
      "PA7            : 16  ," & 
      "PB0            : 28  ," & 
      "PB1            : 29  ," & 
      "PB2            : 19  ," & 
      "RF1            : 21  ," & 
      "VSSRF          : 22  ," & 
      "VDDRF          : 23  ," & 
      "OSC_OUT        : 24  ," & 
      "OSC_IN         : 25  ," & 
      "AT0            : 26 ," & 
      "AT1            : 27 ," & 
      "PA8            : 17 ," & 
      "PA9            : 18  ," & 
      "VFBSMPS        : 31  ," & 
      "VSSSMPS        : 32  ," & 
      "VLXSMPS        : 33  ," & 
      "VDDSMPS        : 34  ," & 
      "PA10           : 36  ," & 
      "PA11           : 37  ," & 
      "PA12           : 38  ," & 
      "VDDUSB         : 40  ," & 
      "PB5            : 45  ," & 
      "PB6            : 46  ," & 
      "PB7            : 47  ," & 
      "PH3_BOOT0      : 4  ," & 
      "PB8            : 5  ," & 
      "PB9            : 6  ," & 
      "VDD            : (20, 35, 48)" ;

-- This section specifies the TAP ports. For the TAP TCK port, the parameters in the brackets are:
--        First Field : Maximum  TCK frequency.
--        Second Field: Allowable states TCK may be stopped in.
   
   attribute TAP_SCAN_CLOCK of JTCK  : signal is (10.0e6, BOTH);
   attribute TAP_SCAN_IN    of JTDI  : signal is true;
   attribute TAP_SCAN_MODE  of JTMS  : signal is true;
   attribute TAP_SCAN_OUT   of JTDO  : signal is true;
   attribute TAP_SCAN_RESET of JTRST : signal is true;
   
-- Specifies the compliance enable patterns for the design. It lists a set of 
-- design ports and the values that they should be set to, in order to enable 
-- compliance to IEEE Std 1149.1

   
   attribute COMPLIANCE_PATTERNS of STM32WB55_UFQFPN48: entity is 
        "(NRST) (0)";

   
-- Specifies the number of bits in the instruction register.

   attribute INSTRUCTION_LENGTH of STM32WB55_UFQFPN48: entity is 5;

-- Specifies the boundary-scan instructions implemented in the design and their opcodes.
   
   attribute INSTRUCTION_OPCODE of STM32WB55_UFQFPN48: entity is 
     "BYPASS  (11111)," &
     "EXTEST  (00000)," &
     "SAMPLE  (00010)," &
     "PRELOAD (00010)," &
     "IDCODE  (00001)";
   
-- Specifies the bit pattern that is loaded into the instruction register when the TAP controller 
-- passes through the Capture-IR state. The standard mandates that the two LSBs must be "01". The 
-- remaining bits are design specific.
   
   attribute INSTRUCTION_CAPTURE of STM32WB55_UFQFPN48: entity is "XXX01";

-- Specifies the bit pattern that is loaded into the DEVICE_ID register during the IDCODE 
-- instruction when the TAP controller passes through the Capture-DR state.
   
   attribute IDCODE_REGISTER of STM32WB55_UFQFPN48: entity is 
     "XXXX" &              -- 4-bit version number
     "0110010010010101" &  -- 16-bit part number
     "00000100000" &       -- 11-bit identity of the manufacturer
     "1";                  -- Required by IEEE Std 1149.1

 -- This section specifies the test data register placed between TDI and TDO for each implemented 
-- instruction.
   
  attribute REGISTER_ACCESS of STM32WB55_UFQFPN48: entity is 
       "BYPASS    (BYPASS)," &
       "BOUNDARY  (EXTEST, SAMPLE, PRELOAD)," &
       "DEVICE_ID (IDCODE)";

-- Specifies the length of the boundary scan register.
   
   attribute BOUNDARY_LENGTH of STM32WB55_UFQFPN48: entity is 201;
 
-- The following list specifies the characteristics of each cell in the boundary scan register from 
-- TDI to TDO. The following is a description of the label fields:
--      num     : Is the cell number.
--      cell    : Is the cell type as defined by the standard.
--      port    : Is the design port name. Control cells do not have a port name.
--      function: Is the function of the cell as defined by the standard. Is one of input, output2, 
--                output3, bidir, control or controlr.
--      safe    : Specifies the value that the BSR cell should be loaded with for safe operation 
--                when the software might otherwise choose a random value.
--      ccell   : The control cell number. Specifies the control cell that drives the output enable 
--                for this port.
--      disval  : Specifies the value that is loaded into the control cell to disable the output 
--                enable for the corresponding port.
--      rslt    : Resulting state. Shows the state of the driver when it is disabled.
   
   attribute BOUNDARY_REGISTER of STM32WB55_UFQFPN48: entity is 
--     
--    num	cell	port		function	safe  [ccell  disval  rslt]
--     
--------------------------------------------------------------------------------	

      "200	(BC_1,   *, internal, 0 ),"   &
      "199	(BC_1,   *, internal, 0 ),"   &
      "198	(BC_1,   *, internal, 0 ),"   &
      "197	(BC_1,   *, internal, 0 ),"   &
      "196	(BC_1,   *, internal, 0 ),"   &
      "195	(BC_1,   *, internal, 0 ),"   &
      "194	(BC_1,  *,	       CONTROL,        1)			       ," &
      "193	(BC_1,  PE4,	       OUTPUT3,        X,      194,    1,      Z)      ," &
      "192	(BC_4,  PE4,	       INPUT,	       X)			       ," &
      "191	(BC_1,   *, internal, 0 ),"   &
      "190	(BC_1,   *, internal, 0 ),"   &
      "189	(BC_1,   *, internal, 0 ),"   &
      "188	(BC_1,  *,	       CONTROL,        1)			       ," &
      "187	(BC_1,  PC14_OSC32_IN,     OUTPUT3,        X,      188,    1,      Z)      ," &
      "186	(BC_4,  PC14_OSC32_IN,     INPUT,	       X)			       ," &
      "185	(BC_1,  *,	       CONTROL,        1)			       ," &
      "184	(BC_1,  PC15_OSC32_OUT,    OUTPUT3,        X,      185,    1,      Z)      ," &
      "183	(BC_4,  PC15_OSC32_OUT,    INPUT,	       X)			       ," &
      "182	(BC_1,   *, internal, 0 ),"   &
      "181	(BC_1,   *, internal, 0 ),"   &
      "180	(BC_1,   *, internal, 0 ),"   &
      "179	(BC_1,   *, internal, 0 ),"   &
      "178	(BC_1,   *, internal, 0 ),"   &
      "177	(BC_1,   *, internal, 0 ),"   &
      "176	(BC_1,   *, internal, 0 ),"   &
      "175	(BC_1,   *, internal, 0 ),"   &
      "174	(BC_1,   *, internal, 0 ),"   &
      "173	(BC_1,   *, internal, 0 ),"   &
      "172	(BC_1,   *, internal, 0 ),"   &
      "171	(BC_1,   *, internal, 0 ),"   &
      "170	(BC_1,   *, internal, 0 ),"   &
      "169	(BC_1,   *, internal, 0 ),"   &
      "168	(BC_1,   *, internal, 0 ),"   &
      "167	(BC_1,   *, internal, 0 ),"   &
      "166	(BC_1,   *, internal, 0 ),"   &
      "165	(BC_1,   *, internal, 0 ),"   &
      "164	(BC_1,  *,	       CONTROL,        1)			       ," &
      "163	(BC_1,  PA0,	       OUTPUT3,        X,      164,    1,      Z)      ," &
      "162	(BC_4,  PA0,	       INPUT,	       X)			       ," &
      "161	(BC_1,  *,	       CONTROL,        1)			       ," &
      "160	(BC_1,  PA1,	       OUTPUT3,        X,      161,    1,      Z)      ," &
      "159	(BC_4,  PA1,	       INPUT,	       X)			       ," &
      "158	(BC_1,  *,	       CONTROL,        1)			       ," &
      "157	(BC_1,  PA2,	       OUTPUT3,        X,      158,    1,      Z)      ," &
      "156	(BC_4,  PA2,	       INPUT,	       X)			       ," &
      "155	(BC_1,  *,	       CONTROL,        1)			       ," &
      "154	(BC_1,  PA3,	       OUTPUT3,        X,      155,    1,      Z)      ," &
      "153	(BC_4,  PA3,	       INPUT,	       X)			       ," &
      "152	(BC_1,  *,	       CONTROL,        1)			       ," &
      "151	(BC_1,  PA4,	       OUTPUT3,        X,      152,    1,      Z)      ," &
      "150	(BC_4,  PA4,	       INPUT,	       X)			       ," &
      "149	(BC_1,  *,	       CONTROL,        1)			       ," &
      "148	(BC_1,  PA5,	       OUTPUT3,        X,      149,    1,      Z)      ," &
      "147	(BC_4,  PA5,	       INPUT,	       X)			       ," &
      "146	(BC_1,  *,	       CONTROL,        1)			       ," &
      "145	(BC_1,  PA6,	       OUTPUT3,        X,      146,    1,      Z)      ," &
      "144	(BC_4,  PA6,	       INPUT,	       X)			       ," &
      "143	(BC_1,  *,	       CONTROL,        1)			       ," &
      "142	(BC_1,  PA7,	       OUTPUT3,        X,      143,    1,      Z)      ," &
      "141	(BC_4,  PA7,	       INPUT,	       X)			       ," &
      "140	(BC_1,   *, internal, 0 ),"   &
      "139	(BC_1,   *, internal, 0 ),"   &
      "138	(BC_1,   *, internal, 0 ),"   &
      "137	(BC_1,   *, internal, 0 ),"   &
      "136	(BC_1,   *, internal, 0 ),"   &
      "135	(BC_1,   *, internal, 0 ),"   &
      "134	(BC_1,  *,	       CONTROL,        1)			       ," &
      "133	(BC_1,  PB0,	       OUTPUT3,        X,      134,    1,      Z)      ," &
      "132	(BC_4,  PB0,	       INPUT,	       X)			       ," &
      "131	(BC_1,  *,	       CONTROL,        1)			       ," &
      "130	(BC_1,  PB1,	       OUTPUT3,        X,      131,    1,      Z)      ," &
      "129	(BC_4,  PB1,	       INPUT,	       X)			       ," &
      "128	(BC_1,  *,	       CONTROL,        1)			       ," &
      "127	(BC_1,  PB2,	       OUTPUT3,        X,      128,    1,      Z)      ," &
      "126	(BC_4,  PB2,	       INPUT,	       X)			       ," &
      "125	(BC_1,   *, internal, 0 ),"   &
      "124	(BC_1,   *, internal, 0 ),"   &
      "123	(BC_1,   *, internal, 0 ),"   &
      "122	(BC_1,   *, internal, 0 ),"   &
      "121	(BC_1,   *, internal, 0 ),"   &
      "120	(BC_1,   *, internal, 0 ),"   &
      "119	(BC_1,   *, internal, 0 ),"   &
      "118	(BC_1,   *, internal, 0 ),"   &
      "117	(BC_1,   *, internal, 0 ),"   &
      "116	(BC_1,   *, internal, 0 ),"   &
      "115	(BC_1,   *, internal, 0 ),"   &
      "114	(BC_1,   *, internal, 0 ),"   &
      "113	(BC_1,   *, internal, 0 ),"   &
      "112	(BC_1,   *, internal, 0 ),"   &
      "111	(BC_1,   *, internal, 0 ),"   &
      "110	(BC_1,   *, internal, 0 ),"   &
      "109	(BC_1,   *, internal, 0 ),"   &
      "108	(BC_1,   *, internal, 0 ),"   &
      "107	(BC_1,   *, internal, 0 ),"   &
      "106	(BC_1,   *, internal, 0 ),"   &
      "105	(BC_1,   *, internal, 0 ),"   &
      "104	(BC_1,   *, internal, 0 ),"   &
      "103	(BC_1,   *, internal, 0 ),"   &
      "102	(BC_1,   *, internal, 0 ),"   &
      "101	(BC_1,   *, internal, 0 ),"   &
      "100	(BC_1,   *, internal, 0 ),"   &
      "99	          (BC_1,   *, internal, 0 ),"   &
      "98	          (BC_1,   *, internal, 0 ),"   &
      "97	          (BC_1,   *, internal, 0 ),"   &
      "96	          (BC_1,   *, internal, 0 ),"   &
      "95	          (BC_1,   *, internal, 0 ),"   &
      "94	          (BC_1,   *, internal, 0 ),"   &
      "93	          (BC_1,   *, internal, 0 ),"   &
      "92	          (BC_1,   *, internal, 0 ),"   &
      "91	          (BC_1,   *, internal, 0 ),"   &
      "90	          (BC_1,   *, internal, 0 ),"   &
      "89	          (BC_1,   *, internal, 0 ),"   &
      "88	          (BC_1,   *, internal, 0 ),"   &
      "87	          (BC_1,   *, internal, 0 ),"   &
      "86	          (BC_1,   *, internal, 0 ),"   &
      "85	          (BC_1,   *, internal, 0 ),"   &
      "84	          (BC_1,   *, internal, 0 ),"   &
      "83	          (BC_1,   *, internal, 0 ),"   &
      "82	          (BC_1,   *, internal, 0 ),"   &
      "81	          (BC_1,   *, internal, 0 ),"   &
      "80	          (BC_1,   *, internal, 0 ),"   &
      "79	          (BC_1,   *, internal, 0 ),"   &
      "78	          (BC_1,   *, internal, 0 ),"   &
      "77	          (BC_1,   *, internal, 0 ),"   &
      "76	          (BC_1,   *, internal, 0 ),"   &
      "75	          (BC_1,   *, internal, 0 ),"   &
      "74	          (BC_1,   *, internal, 0 ),"   &
      "73	          (BC_1,   *, internal, 0 ),"   &
      "72	          (BC_1,   *, internal, 0 ),"   &
      "71	(BC_1,  *,	       CONTROL,        1)			       ," &
      "70	(BC_1,  PA8,		 OUTPUT3,	 X,	 71,	 1,	 Z)	 ," &
      "69	(BC_4,  PA8,		 INPUT, 	 X)				 ," &
      "68	(BC_1,  *,		 CONTROL,	 1)				 ," &
      "67	(BC_1,  PA9,		 OUTPUT3,	 X,	 68,	 1,	 Z)	 ," &
      "66	(BC_4,  PA9,		 INPUT, 	 X)				 ," &
      "65	(BC_1,  *,		 CONTROL,	 1)				 ," &
      "64	(BC_1,  PA10,		 OUTPUT3,	 X,	 65,	 1,	 Z)	 ," &
      "63	(BC_4,  PA10,		 INPUT, 	 X)				 ," &
      "62	(BC_1,  *,		 CONTROL,	 1)				 ," &
      "61	(BC_1,  PA11,		OUTPUT3,	X,	62,	1,	Z)	," &
      "60	(BC_4,  PA11,		INPUT,  	X)				," &
      "59	(BC_1,  *,		CONTROL,	1)				," &
      "58	(BC_1,  PA12,		OUTPUT3,	X,	59,	1,	Z)	," &
      "57	(BC_4,  PA12,		INPUT,  	X)				," &
      "56	(BC_1,   *, internal, 0 ),"   &
      "55	(BC_1,   *, internal, 0 ),"   &
      "54	(BC_1,   *, internal, 0 ),"   &
      "53	(BC_1,   *, internal, 0 ),"   &
      "52	(BC_1,   *, internal, 0 ),"   &
      "51	(BC_1,   *, internal, 0 ),"   &
      "50	(BC_1,   *, internal, 0 ),"   &
      "49	(BC_1,   *, internal, 0 ),"   &
      "48	(BC_1,   *, internal, 0 ),"   &
      "47 (BC_1,   *, internal, 0 ),"   &
      "46	(BC_1,   *, internal, 0 ),"   &
      "45	(BC_1,   *, internal, 0 ),"   &
      "44	(BC_1,   *, internal, 0 ),"   &
      "43	(BC_1,   *, internal, 0 ),"   &
      "42	(BC_1,   *, internal, 0 ),"   &
      "41	(BC_1,   *, internal, 0 ),"   &
      "40	(BC_1,   *, internal, 0 ),"   &
      "39	(BC_1,   *, internal, 0 ),"   &
      "38	(BC_1,   *, internal, 0 ),"   &
      "37	(BC_1,   *, internal, 0 ),"   &
      "36	(BC_1,   *, internal, 0 ),"   &
      "35	(BC_1,   *, internal, 0 ),"   &
      "34	(BC_1,   *, internal, 0 ),"   &
      "33	(BC_1,   *, internal, 0 ),"   &
      "32	(BC_1,   *, internal, 0 ),"   &
      "31 (BC_1,   *, internal, 0 ),"   &
      "30	(BC_1,   *, internal, 0 ),"   &
      "29	(BC_1,   *, internal, 0 ),"   &
      "28	(BC_1,   *, internal, 0 ),"   &
      "27	(BC_1,   *, internal, 0 ),"   &
      "26	(BC_1,   *, internal, 0 ),"   &
      "25	(BC_1,   *, internal, 0 ),"   &
      "24	(BC_1,   *, internal, 0 ),"   &
      "23	(BC_1,	*,		CONTROL,	1)				," &
      "22	(BC_1,	PB5,		OUTPUT3,	X,	23,	1,	Z)	," &
      "21	(BC_4,	PB5,		INPUT,  	X)				," &
      "20	(BC_1,	*,		CONTROL,	1)				," &
      "19	(BC_1,	PB6,		OUTPUT3,	X,	20,	1,	Z)	," &
      "18	(BC_4,	PB6,		INPUT,  	X)				," &
      "17	(BC_1,	*,		CONTROL,	1)				," &
      "16	(BC_1,	PB7,		OUTPUT3,	X,	17,	1,	Z)	," &
      "15	(BC_4,	PB7,		INPUT,  	X)				," &
      "14	(BC_1,	*,		CONTROL,	1)				," &
      "13	(BC_1,	PH3_BOOT0,	OUTPUT3,	X,	14,	1,	Z)	," &
      "12	(BC_4,	PH3_BOOT0,	INPUT,  	X)				," &
      "11	(BC_1,	*,		CONTROL,	1)				," &
      "10	(BC_1,	PB8,		OUTPUT3,	X,	11,	1,	Z)	," &
      "9	(BC_4,	PB8,		INPUT,  	X)				," &
      "8	(BC_1,	*,		CONTROL,	1)				," &
      "7	(BC_1,	PB9,		OUTPUT3,	X,	8,	1,	Z)	," &
      "6	(BC_4,	PB9,		INPUT,  	X)				," &
      "5	(BC_1,   *, internal, 0 ),"   &
      "4	(BC_1,   *, internal, 0 ),"   &
      "3	(BC_1,   *, internal, 0 ),"   &
      "2	(BC_1,   *, internal, 0 ),"   &
      "1	(BC_1,   *, internal, 0 ),"   &
      "0	(BC_1,   *, internal, 0 )				 " ;

        									      
      attribute DESIGN_WARNING of STM32WB55_UFQFPN48: entity is 				      
      "Device configuration can effect boundary scan behavior. " &		      
      "Keep the NRST pin low to ensure default boundary scan operation " &	      
      "as described in this file." ;

					      
end STM32WB55_UFQFPN48;

									      
-- ******************* (C) COPYRIGHT 2019 STMicroelectronics *****END OF FILE********