entity m70v3589 is
generic (PHYSICAL_PIN_MAP : string := "BGA256");
port (
a15l :in bit;
a15r :in bit;
a14l :in bit;
a14r :in bit;
a13l :in bit;
a13r :in bit;
a12l :in bit;
a12r :in bit;
a11l :in bit;
a11r :in bit;
a10l :in bit;
a10r :in bit;
a9l :in bit;
a9r :in bit;
a8l :in bit;
a8r :in bit;
a7l :in bit;
a7r :in bit;
a6l :in bit;
a6r :in bit;
a5l :in bit;
a5r :in bit;
a4l :in bit;
a4r :in bit;
a3l :in bit;
a3r :in bit;
a2l :in bit;
a2r :in bit;
a1l :in bit;
a1r :in bit;
a0l :in bit;
a0r :in bit;
rwl_l :in bit;
oel_l :in bit;
be0l_l:in bit;
be1l_l:in bit;
be2l_l:in bit;
be3l_l:in bit;
ftl_l :in bit;
ce0l_l:in bit;
ce1l :in bit;
cntenl_l :in bit;
adsl_l:in bit;
repeatl_l :in bit;
clkl :in bit;
rwr_l :in bit;
oer_l :in bit;
be0r_l:in bit;
be1r_l:in bit;
be2r_l:in bit;
be3r_l:in bit;
ftr_l :in bit;
ce0r_l:in bit;
ce1r :in bit;
cntenr_l :in bit;
adsr_l:in bit;
repeatr_l :in bit;
clkr :in bit;
jtag_tms :in bit;
jtag_tdi :in bit;
jtag_rst_l :in bit;
optl :in bit;
optr :in bit;
tck_in:in bit;
io35l :inout bit;
io35r :inout bit;
io34l :inout bit;
io34r :inout bit;
io33l :inout bit;
io33r :inout bit;
io32l :inout bit;
io32r :inout bit;
io31l :inout bit;
io31r :inout bit;
io30l :inout bit;
io30r :inout bit;
io29l :inout bit;
io29r :inout bit;
io28l :inout bit;
io28r :inout bit;
io27l :inout bit;
io27r :inout bit;
io26l :inout bit;
io26r :inout bit;
io25l :inout bit;
io25r :inout bit;
io24l :inout bit;
io24r :inout bit;
io23l :inout bit;
io23r :inout bit;
io22l :inout bit;
io22r :inout bit;
io21l :inout bit;
io21r :inout bit;
io20l :inout bit;
io20r :inout bit;
io19l :inout bit;
io19r :inout bit;
io18l :inout bit;
io18r :inout bit;
io17l :inout bit;
io17r :inout bit;
io16l :inout bit;
io16r :inout bit;
io15l :inout bit;
io15r :inout bit;
io14l :inout bit;
io14r :inout bit;
io13l :inout bit;
io13r :inout bit;
io12l :inout bit;
io12r :inout bit;
io11l :inout bit;
io11r :inout bit;
io10l :inout bit;
io10r :inout bit;
io9l :inout bit;
io9r :inout bit;
io8l :inout bit;
io8r :inout bit;
io7l :inout bit;
io7r :inout bit;
io6l :inout bit;
io6r :inout bit;
io5l :inout bit;
io5r :inout bit;
io4l :inout bit;
io4r :inout bit;
io3l :inout bit;
io3r :inout bit;
io2l :inout bit;
io2r :inout bit;
io1l :inout bit;
io1r :inout bit;
io0l :inout bit;
io0r :inout bit;
tdo :out bit;
vdd :linkage bit_vector(0 to 5);
vss :linkage bit_vector(0 to 52);
vddql :linkage bit_vector(0 to 17);
vddqr :linkage bit_vector(0 to 15)
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of m70v3589 : entity is
"STD_1149_1_1993";
attribute PIN_MAP of m70v3589 : entity is PHYSICAL_PIN_MAP;
-- Note 1:
-- Insert pin-map strings for different packages here.
-- An example pin-map string for this design is shown below:
constant BGA256 : PIN_MAP_STRING :=
"io18l:B1," &
"io18r:C1," &
"io20r:D1," &
"io21r:E1," &
"io23l:F1," &
"io24r:G1," &
"io26l:H1," &
"io27l:J1," &
"io29r:K1," &
"io30l:L1," &
"io32r:M1," &
"io33l:N1," &
"io35r:P1," &
"io35l:R1," &
"jtag_tdi:A2," &
"io19l:C2," &
"io19r:D2," &
"io21l:E2," &
"io22r:F2," &
"io24l:G2," &
"io25r:H2," &
"io28r:J2," &
"io29l:K2," &
"io31r:L2," &
"io32l:M2," &
"io34r:N2," &
"io34l:P2 ," &
"tck_in:T2," &
"tdo:B3," &
"io20l:D3," &
"io22l:E3," &
"io23r:F3," &
"io25l:G3," &
"io26r:H3," &
"io27r:J3," &
"io28l:K3," &
"io30r:L3," &
"io31l:M3," &
"io33r:N3," &
"jtag_tms:P3," &
"jtag_rst_l:R3," &
"ftl_l:D4," &
"ftr_l:N4," &
"a14l:A5," &
"a15l:B5," &
"a13l:C5," &
"a13r:P5," &
"a15r:R5," &
"a14r:T5," &
"a11l:A6," &
"a12l:B6," &
"a10l:C6," &
"a10r:P6," &
"a12r:R6," &
"a11r:T6," &
"a8l:A7," &
"a9l:B7," &
"a7l:C7," &
"a7r:P7," &
"a9r:R7," &
"a8r:T7," &
"be2l_l:A8," &
"be3l_l:B8," &
"be1l_l:C8," &
"be1r_l:P8," &
"be3r_l:R8," &
"be2r_l:T8," &
"ce1l:A9," &
"ce0l_l:B9," &
"be0l_l:C9," &
"be0r_l:P9," &
"ce0r_l:R9," &
"ce1r:T9," &
"oel_l:A10," &
"rwl_l:B10," &
"clkl:C10," &
"clkr:P10," &
"rwr_l:R10," &
"oer_l:T10," &
"cntenl_l:A11," &
"repeatl_l:B11," &
"adsl_l:C11," &
"adsr_l:P11," &
"repeatr_l:R11," &
"cntenr_l:T11," &
"a5l:A12," &
"a4l:B12," &
"a6l:C12," &
"a6r:P12," &
"a4r:R12," &
"a5r:T12," &
"a2l:A13," &
"a1l:B13," &
"a3l:C13," &
"a3r:P13," &
"a1r:R13," &
"a2r:T13," &
"a0l:A14," &
"optl:C14," &
"io15r:D14," &
"io13l:E14," &
"io12r:F14," &
"io10l:G14," &
"io9r:H14," &
"io8r:J14," &
"io6r:K14," &
"io5l:L14," &
"io3r:M14," &
"io2l:N14," &
"io0l:P14," &
"optr:R14," &
"a0r:T14," &
"io17l:B15," &
"io17r:C15," &
"io15l:D15," &
"io14l:E15," &
"io13r:F15," &
"io11l:G15," &
"io9l:H15," &
"io7r:J15," &
"io6l:K15," &
"io4r:L15," &
"io3l:M15," &
"io1r:N15," &
"io0r:P15," &
"io16l:C16," &
"io16r:D16," &
"io14r:E16," &
"io12l:F16," &
"io11r:G16," &
"io10r:H16," &
"io8l:J16," &
"io7l:K16," &
"io5r:L16," &
"io4l:M16," &
"io2r:N16," &
"io1l:P16," &
"vdd:(E5, F5, L5, M5, E6, M6)," &
"vss:(C3, G5, H5, J5, K5, F6, G6," &
"H6, J6, K6, L6, E7, F7, G7, H7," &
"J7, K7, L7, M7, E8, F8, G8, H8," &
"J8, K8, L8, M8, E9, F9, G9, H9," &
"J9, K9, L9, M9, E10, F10, G10," &
"H10, J10, K10, L10, M10, F11," &
"G11, H11, J11, K11, L11, G12," &
"H12, J12, K12)," &
"vddql:(E4, F4, J4, K4, N7, N8," &
"N11, N12, M13, L13, H13, G13," &
"D10, D9, D6, D5)," &
"vddqr:(G4, H4, L4, M4, N5, N6," &
"D7, D8, N9, N10, D11, D12, E13," &
"F13, J13, K13)";
attribute TAP_SCAN_IN of jtag_tdi : signal is true;
attribute TAP_SCAN_MODE of jtag_tms : signal is true;
attribute TAP_SCAN_OUT of tdo : signal is true;
-- Note 2:
-- Uncomment TAP_SCAN_CLOCK attribute below, and insert
-- maximum operating frequency of tck_in in Hertz.
attribute TAP_SCAN_CLOCK of tck_in : signal is (1.0e6, BOTH);
attribute TAP_SCAN_RESET of jtag_rst_l : signal is true;
attribute INSTRUCTION_LENGTH of m70v3589 : entity is 4;
attribute INSTRUCTION_OPCODE of m70v3589 : entity is
"BYPASS (1111)," &
"SAMPLE (0001)," &
"EXTEST (0000)," &
"HIGHZ (0011)," &
"IDCODE (0010)";
attribute INSTRUCTION_CAPTURE of m70v3589 : entity is "1101";
attribute IDCODE_REGISTER of m70v3589 : entity is
"0000" & -- version
"0000001100010011" & -- part number
"00000110011" & -- manufacturer's identity
"1"; -- required by 1149.1
attribute REGISTER_ACCESS of m70v3589 : entity is
"Bypass (BYPASS, HIGHZ)," &
"Boundary(SAMPLE, EXTEST)," &
"Device_ID (IDCODE)";
attribute BOUNDARY_LENGTH of m70v3589 : entity is 142;
attribute BOUNDARY_REGISTER of m70v3589 : entity is
--
-- num cell port function safe [ccell disval rslt]
--
"141 (BC_7, io35l, bidir, X, 123, 0, Z)," &
"140 (BC_7, io35r, bidir, X, 121, 0, Z)," &
"139 (BC_7, io34l, bidir, X, 123, 0, Z)," &
"138 (BC_7, io34r, bidir, X, 121, 0, Z)," &
"137 (BC_7, io33l, bidir, X, 123, 0, Z)," &
"136 (BC_7, io33r, bidir, X, 121, 0, Z)," &
"135 (BC_7, io32l, bidir, X, 123, 0, Z)," &
"134 (BC_7, io32r, bidir, X, 121, 0, Z)," &
"133 (BC_7, io31l, bidir, X, 123, 0, Z)," &
"132 (BC_7, io31r, bidir, X, 121, 0, Z)," &
"131 (BC_7, io30l, bidir, X, 123, 0, Z)," &
"130 (BC_7, io30r, bidir, X, 121, 0, Z)," &
"129 (BC_7, io29l, bidir, X, 123, 0, Z)," &
"128 (BC_7, io29r, bidir, X, 121, 0, Z)," &
"127 (BC_7, io28l, bidir, X, 123, 0, Z)," &
"126 (BC_7, io28r, bidir, X, 121, 0, Z)," &
"125 (BC_7, io27l, bidir, X, 123, 0, Z)," &
"124 (BC_7, io27r, bidir, X, 121, 0, Z)," &
"123 (BC_0, *, control, 0)," &
"122 (BC_0, *, control, 0)," &
"121 (BC_0, *, control, 0)," &
"120 (BC_0, *, control, 0)," &
"119 (BC_7, io26r, bidir, X, 120, 0, Z)," &
"118 (BC_7, io26l, bidir, X, 122, 0, Z)," &
"117 (BC_7, io25r, bidir, X, 120, 0, Z)," &
"116 (BC_7, io25l, bidir, X, 122, 0, Z)," &
"115 (BC_7, io24r, bidir, X, 120, 0, Z)," &
"114 (BC_7, io24l, bidir, X, 122, 0, Z)," &
"113 (BC_7, io23r, bidir, X, 120, 0, Z)," &
"112 (BC_7, io23l, bidir, X, 122, 0, Z)," &
"111 (BC_7, io22r, bidir, X, 120, 0, Z)," &
"110 (BC_7, io22l, bidir, X, 122, 0, Z)," &
"109 (BC_7, io21r, bidir, X, 120, 0, Z)," &
"108 (BC_7, io21l, bidir, X, 122, 0, Z)," &
"107 (BC_7, io20r, bidir, X, 120, 0, Z)," &
"106 (BC_7, io20l, bidir, X, 122, 0, Z)," &
"105 (BC_7, io19r, bidir, X, 120, 0, Z)," &
"104 (BC_7, io19l, bidir, X, 122, 0, Z)," &
"103 (BC_7, io18r, bidir, X, 120, 0, Z)," &
"102 (BC_7, io18l, bidir, X, 122, 0, Z)," &
"101 (BC_4, ftl_l, observe_only, X)," &
"100 (BC_4, *, internal, X)," &
"99 (BC_4, a15l, observe_only, X)," &
"98 (BC_4, a14l, observe_only, X)," &
"97 (BC_4, a13l, observe_only, X)," &
"96 (BC_4, a12l, observe_only, X)," &
"95 (BC_4, a11l, observe_only, X)," &
"94 (BC_4, a10l, observe_only, X)," &
"93 (BC_4, a9l, observe_only, X)," &
"92 (BC_4, a8l, observe_only, X)," &
"91 (BC_4, a7l, observe_only, X)," &
"90 (BC_4, be3l_l,observe_only, X)," &
"89 (BC_4, be2l_l,observe_only, X)," &
"88 (BC_4, be1l_l,observe_only, X)," &
"87 (BC_4, be0l_l,observe_only, X)," &
"86 (BC_4, ce1l, observe_only, X)," &
"85 (BC_4, ce0l_l,observe_only, X)," &
"84 (BC_4, clkl, observe_only, X)," &
"83 (BC_4, oel_l, observe_only, X)," &
"82 (BC_4, rwl_l, observe_only, X)," &
"81 (BC_4, adsl_l,observe_only, X)," &
"80 (BC_4, cntenl_l, observe_only, X)," &
"79 (BC_4, repeatl_l, observe_only, X)," &
"78 (BC_4, a6l, observe_only, X)," &
"77 (BC_4, a5l, observe_only, X)," &
"76 (BC_4, a4l, observe_only, X)," &
"75 (BC_4, a3l, observe_only, X)," &
"74 (BC_4, a2l, observe_only, X)," &
"73 (BC_4, a1l, observe_only, X)," &
"72 (BC_4, a0l, observe_only, X)," &
"71 (BC_4, optl, observe_only, X)," &
"70 (BC_7, io17l, bidir, X, 50, 0, Z)," &
"69 (BC_7, io17r, bidir, X, 52, 0, Z)," &
"68 (BC_7, io16l, bidir, X, 50, 0, Z)," &
"67 (BC_7, io16r, bidir, X, 52, 0, Z)," &
"66 (BC_7, io15l, bidir, X, 50, 0, Z)," &
"65 (BC_7, io15r, bidir, X, 52, 0, Z)," &
"64 (BC_7, io14l, bidir, X, 50, 0, Z)," &
"63 (BC_7, io14r, bidir, X, 52, 0, Z)," &
"62 (BC_7, io13l, bidir, X, 50, 0, Z)," &
"61 (BC_7, io13r, bidir, X, 52, 0, Z)," &
"60 (BC_7, io12l, bidir, X, 50, 0, Z)," &
"59 (BC_7, io12r, bidir, X, 52, 0, Z)," &
"58 (BC_7, io11l, bidir, X, 50, 0, Z)," &
"57 (BC_7, io11r, bidir, X, 52, 0, Z)," &
"56 (BC_7, io10l, bidir, X, 50, 0, Z)," &
"55 (BC_7, io10r, bidir, X, 52, 0, Z)," &
"54 (BC_7, io9l, bidir, X, 50, 0, Z)," &
"53 (BC_7, io9r, bidir, X, 52, 0, Z)," &
"52 (BC_0, *, control, 0)," &
"51 (BC_0, *, control, 0)," &
"50 (BC_0, *, control, 0)," &
"49 (BC_0, *, control, 0)," &
"48 (BC_7, io8r, bidir, X, 51, 0, Z)," &
"47 (BC_7, io8l, bidir, X, 49, 0, Z)," &
"46 (BC_7, io7r, bidir, X, 51, 0, Z)," &
"45 (BC_7, io7l, bidir, X, 49, 0, Z)," &
"44 (BC_7, io6r, bidir, X, 51, 0, Z)," &
"43 (BC_7, io6l, bidir, X, 49, 0, Z)," &
"42 (BC_7, io5r, bidir, X, 51, 0, Z)," &
"41 (BC_7, io5l, bidir, X, 49, 0, Z)," &
"40 (BC_7, io4r, bidir, X, 51, 0, Z)," &
"39 (BC_7, io4l, bidir, X, 49, 0, Z)," &
"38 (BC_7, io3r, bidir, X, 51, 0, Z)," &
"37 (BC_7, io3l, bidir, X, 49, 0, Z)," &
"36 (BC_7, io2r, bidir, X, 51, 0, Z)," &
"35 (BC_7, io2l, bidir, X, 49, 0, Z)," &
"34 (BC_7, io1r, bidir, X, 51, 0, Z)," &
"33 (BC_7, io1l, bidir, X, 49, 0, Z)," &
"32 (BC_7, io0r, bidir, X, 51, 0, Z)," &
"31 (BC_7, io0l, bidir, X, 49, 0, Z)," &
"30 (BC_4, optr, observe_only, X)," &
"29 (BC_4, a0r, observe_only, X)," &
"28 (BC_4, a1r, observe_only, X)," &
"27 (BC_4, a2r, observe_only, X)," &
"26 (BC_4, a3r, observe_only, X)," &
"25 (BC_4, a4r, observe_only, X)," &
"24 (BC_4, a5r, observe_only, X)," &
"23 (BC_4, a6r, observe_only, X)," &
"22 (BC_4, repeatr_l, observe_only, X)," &
"21 (BC_4, cntenr_l, observe_only, X)," &
"20 (BC_4, adsr_l,observe_only, X)," &
"19 (BC_4, rwr_l, observe_only, X)," &
"18 (BC_4, oer_l, observe_only, X)," &
"17 (BC_4, clkr, observe_only, X)," &
"16 (BC_4, ce0r_l,observe_only, X)," &
"15 (BC_4, ce1r, observe_only, X)," &
"14 (BC_4, be0r_l,observe_only, X)," &
"13 (BC_4, be1r_l,observe_only, X)," &
"12 (BC_4, be2r_l,observe_only, X)," &
"11 (BC_4, be3r_l,observe_only, X)," &
"10 (BC_4, a7r, observe_only, X)," &
"9 (BC_4, a8r, observe_only, X)," &
"8 (BC_4, a9r, observe_only, X)," &
"7 (BC_4, a10r, observe_only, X)," &
"6 (BC_4, a11r, observe_only, X)," &
"5 (BC_4, a12r, observe_only, X)," &
"4 (BC_4, a13r, observe_only, X)," &
"3 (BC_4, a14r, observe_only, X)," &
"2 (BC_4, a15r, observe_only, X)," &
"1 (BC_4, *, internal, X)," &
"0 (BC_4, ftr_l, observe_only, X)";
end m70v3589;
