-- ***** COPYRIGHT (C) 2017 NXP Semiconductor, Inc. All Rights Reserved. *******
--
-- Boundary Scan Description Language (BSDL) File
-- Generated by Daphne version: 2013.11.12 at: Fri Jan 10 17:07:37 2014
--
-- Device: K02F 100 MHz Mask Set xN36M
-- Package Type: K02F_64LQFP
-- Version: 1.0
-- Date:���������08/18/2017
--
-- This BSDL has been validated for syntax and semantics compliance to
-- IEEE 1149.1 using the JTAG Technologies CHKBSDL version 1.0.2.4.
--
--
-- THIS SOFTWARE IS PROVIDED BY FREESCALE "AS IS" AND ANY EXPRESSED OR
-- IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
-- OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
-- IN NO EVENT SHALL FREESCALE OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
-- INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-- HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-- STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
-- IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-- THE POSSIBILITY OF SUCH DAMAGE.
--
entity K02F is
generic (PHYSICAL_PIN_MAP : string := "K02F_64LQFP");
-- PORT DESCRIPTION TERMS
-- in = input only
-- out = three-state output (0, Z, 1)
-- buffer = two-state output (0, 1)
-- inout = bidirectional
-- linkage = OTHER (vdd, vss, analog)
--
-- bit = single pin
-- bit_vector = group of pins with suffix 0 to n
port (
PTA0: in bit;
PTA1: in bit;
PTA12: inout bit;
PTA13: inout bit;
PTA18: inout bit;
PTA19: inout bit;
PTA2: out bit;
PTA3: in bit;
PTA4: inout bit;
PTB0: inout bit;
PTB1: inout bit;
PTB16: inout bit;
PTB17: inout bit;
PTB18: inout bit;
PTB19: inout bit;
PTB2: inout bit;
PTB3: inout bit;
PTC0: inout bit;
PTC1: inout bit;
PTC10: inout bit;
PTC11: inout bit;
PTC2: inout bit;
PTC3: inout bit;
PTC4: inout bit;
PTC5: inout bit;
PTC6: inout bit;
PTC7: inout bit;
PTC8: inout bit;
PTC9: inout bit;
PTD0: inout bit;
PTD1: inout bit;
PTD2: inout bit;
PTD3: inout bit;
PTD4: inout bit;
PTD5: inout bit;
PTD6: inout bit;
PTD7: inout bit;
PTE0: inout bit;
PTE1: inout bit;
PTE16: inout bit;
PTE17: inout bit;
PTE18: inout bit;
PTE19: inout bit;
PTE24: inout bit;
PTE25: inout bit;
RESETB: inout bit;
ADC0DM0_ADC1DM3: linkage bit;
ADC0DP0_ADC1DP3: linkage bit;
ADC1DM0_ADC0DM3: linkage bit;
ADC1DP0_ADC0DP3: linkage bit;
CMP0IN4_ADC1SE23: linkage bit;
DAC0OUT_CMP1IN3_ADC0SE23: linkage bit;
PTA5: linkage bit;
VDD: linkage bit_vector(0 to 2);
VDDA: linkage bit;
VREFH: linkage bit;
VREFL: linkage bit;
VREFOUT_CMP1IN5_CMP0IN5_ADC1SE18: linkage bit;
VSS: linkage bit_vector(0 to 2);
VSSA: linkage bit);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of K02F: entity is "STD_1149_1_2001";
attribute PIN_MAP of K02F: entity is PHYSICAL_PIN_MAP;
constant K02F_64LQFP :PIN_MAP_STRING :=
"PTA0: 22," &
"PTA1: 23," &
"PTA12: 28," &
"PTA13: 29," &
"PTA18: 32," &
"PTA19: 33," &
"PTA2: 24," &
"PTA3: 25," &
"PTA4: 26," &
"PTB0: 35," &
"PTB1: 36," &
"PTB16: 39," &
"PTB17: 40," &
"PTB18: 41," &
"PTB19: 42," &
"PTB2: 37," &
"PTB3: 38," &
"PTC0: 43," &
"PTC1: 44," &
"PTC10: 55," &
"PTC11: 56," &
"PTC2: 45," &
"PTC3: 46," &
"PTC4: 49," &
"PTC5: 50," &
"PTC6: 51," &
"PTC7: 52," &
"PTC8: 53," &
"PTC9: 54," &
"PTD0: 57," &
"PTD1: 58," &
"PTD2: 59," &
"PTD3: 60," &
"PTD4: 61," &
"PTD5: 62," &
"PTD6: 63," &
"PTD7: 64," &
"PTE0: 1," &
"PTE1: 2," &
"PTE16: 5," &
"PTE17: 6," &
"PTE18: 7," &
"PTE19: 8," &
"PTE24: 20," &
"PTE25: 21," &
"RESETB: 34," &
"ADC0DM0_ADC1DM3: 10," &
"ADC0DP0_ADC1DP3: 9," &
"ADC1DM0_ADC0DM3: 12," &
"ADC1DP0_ADC0DP3: 11," &
"CMP0IN4_ADC1SE23: 19," &
"DAC0OUT_CMP1IN3_ADC0SE23: 18," &
"PTA5: 27," &
"VDD: (3, 30, 48)," &
"VDDA: 13," &
"VREFH: 14," &
"VREFL: 15," &
"VREFOUT_CMP1IN5_CMP0IN5_ADC1SE18: 17," &
"VSS: (4, 31, 47)," &
"VSSA: 16" ;
attribute TAP_SCAN_OUT of PTA2 : signal is true;
attribute TAP_SCAN_CLOCK of PTA0 : signal is (2.00e+07,BOTH);
attribute TAP_SCAN_MODE of PTA3 : signal is true;
attribute TAP_SCAN_IN of PTA1 : signal is true;
attribute INSTRUCTION_LENGTH of K02F: entity is 4;
attribute INSTRUCTION_OPCODE of K02F: entity is
"BYPASS (1111)," &
"CLAMP (1100)," &
"EXTEST (0100)," &
"HIGHZ (1001)," &
"SOC_IDCODE (0000)," &
"PRELOAD (0010)," &
"SAMPLE (0011)," &
"ENABLE_CENSOR_CTRL (0111)," &
"ENABLE_TEST_CTRL (0110)," &
"EZPORT (1101)," &
"JTAGDP_ABORT (1000)," &
"JTAGDP_APACC (1011)," &
"JTAGDP_DPACC (1010)," &
"IDCODE (1110)";
attribute INSTRUCTION_CAPTURE of K02F: entity is "xx01";
attribute INSTRUCTION_PRIVATE of K02F: entity is
"ENABLE_CENSOR_CTRL," &
"ENABLE_TEST_CTRL," &
"EZPORT," &
"JTAGDP_ABORT," &
"JTAGDP_APACC," &
"JTAGDP_DPACC," &
"SOC_IDCODE";
-- By default the ARM JTAG controller's IDCODE is selected. The
-- information below describes the IDCODE for the ARM JTAG
-- that is returned if you execute the IDCODE instruction
-- (IR = 1110).
--
attribute IDCODE_REGISTER of K02F: entity is
"0100" & -- Version (Cortex M4)
"1011101000000000" & -- Part Number (ARM Cortex M)
"01000111011" & -- Manufacturer Identity (ARM)
"1"; -- IEEE 1149.1 Requirement
-- The information below describes the SOC_IDCODE value
-- that is returned if you execute the SOC_IDCODE instruction
-- (IR = 0000).
--
-- attribute IDCODE_REGISTER of K02F: entity is
-- "0000" & -- Version
-- "1011001011110101" & -- Part Number
-- "00000001110" & -- Manufacturer Identity
-- "1"; -- IEEE 1149.1 Requirement
attribute REGISTER_ACCESS of K02F: entity is
"BYPASS (BYPASS)," &
"DEVICE_ID (IDCODE)";
attribute BOUNDARY_LENGTH of K02F: entity is 84;
attribute BOUNDARY_REGISTER of K02F: entity is
-- BSR DESCRIPTION TERMS
-- cell type = BC_0 - BC_99
-- port = port name
-- function
-- input = input only
-- bidir = bidirectional
-- output2 = two state ouput
-- output3 = three state ouput
-- control = control cell
-- controlr = control cell
-- internal = placeholder cell
-- safe = value that turns off drivers in control cells
-- ccell = controlling cell number for I/O direction
-- dsval = disabling (input) value
-- rslt = result if disabled (input = Z)
--
-- num cell port/* function safe [ccell dis rslt]
" 0 (BC_2, *, control, 1) ," &
" 1 (BC_8, PTE0, bidir, X, 0, 1, Z) ," &
" 2 (BC_2, *, control, 1) ," &
" 3 (BC_8, PTE1, bidir, X, 2, 1, Z) ," &
" 4 (BC_2, *, control, 1) ," &
" 5 (BC_8, PTE16, bidir, X, 4, 1, Z) ," &
" 6 (BC_2, *, control, 1) ," &
" 7 (BC_8, PTE17, bidir, X, 6, 1, Z) ," &
" 8 (BC_2, *, control, 1) ," &
" 9 (BC_8, PTE18, bidir, X, 8, 1, Z) ," &
" 10 (BC_2, *, control, 1) ," &
" 11 (BC_8, PTE19, bidir, X, 10, 1, Z) ," &
" 12 (BC_2, *, control, 1) ," &
" 13 (BC_8, PTE24, bidir, X, 12, 1, Z) ," &
" 14 (BC_2, *, control, 1) ," &
" 15 (BC_8, PTE25, bidir, X, 14, 1, Z) ," &
" 16 (BC_2, *, control, 1) ," &
" 17 (BC_8, PTA4, bidir, X, 16, 1, Z) ," &
" 18 (BC_2, *, control, 1) ," &
" 19 (BC_8, PTA12, bidir, X, 18, 1, Z) ," &
" 20 (BC_2, *, control, 1) ," &
" 21 (BC_8, PTA13, bidir, X, 20, 1, Z) ," &
" 22 (BC_2, *, control, 1) ," &
" 23 (BC_8, PTA18, bidir, X, 22, 1, Z) ," &
" 24 (BC_2, *, control, 1) ," &
" 25 (BC_8, PTA19, bidir, X, 24, 1, Z) ," &
" 26 (BC_2, *, control, 1) ," &
" 27 (BC_8, RESETB, bidir, X, 26, 1, Z) ," &
" 28 (BC_2, *, control, 1) ," &
" 29 (BC_8, PTB0, bidir, X, 28, 1, Z) ," &
" 30 (BC_2, *, control, 1) ," &
" 31 (BC_8, PTB1, bidir, X, 30, 1, Z) ," &
" 32 (BC_2, *, control, 1) ," &
" 33 (BC_8, PTB2, bidir, X, 32, 1, Z) ," &
" 34 (BC_2, *, control, 1) ," &
" 35 (BC_8, PTB3, bidir, X, 34, 1, Z) ," &
" 36 (BC_2, *, control, 1) ," &
" 37 (BC_8, PTB16, bidir, X, 36, 1, Z) ," &
" 38 (BC_2, *, control, 1) ," &
" 39 (BC_8, PTB17, bidir, X, 38, 1, Z) ," &
" 40 (BC_2, *, control, 1) ," &
" 41 (BC_8, PTB18, bidir, X, 40, 1, Z) ," &
" 42 (BC_2, *, control, 1) ," &
" 43 (BC_8, PTB19, bidir, X, 42, 1, Z) ," &
" 44 (BC_2, *, control, 1) ," &
" 45 (BC_8, PTC0, bidir, X, 44, 1, Z) ," &
" 46 (BC_2, *, control, 1) ," &
" 47 (BC_8, PTC1, bidir, X, 46, 1, Z) ," &
" 48 (BC_2, *, control, 1) ," &
" 49 (BC_8, PTC2, bidir, X, 48, 1, Z) ," &
" 50 (BC_2, *, control, 1) ," &
" 51 (BC_8, PTC3, bidir, X, 50, 1, Z) ," &
" 52 (BC_2, *, control, 1) ," &
" 53 (BC_8, PTC4, bidir, X, 52, 1, Z) ," &
" 54 (BC_2, *, control, 1) ," &
" 55 (BC_8, PTC5, bidir, X, 54, 1, Z) ," &
" 56 (BC_2, *, control, 1) ," &
" 57 (BC_8, PTC6, bidir, X, 56, 1, Z) ," &
" 58 (BC_2, *, control, 1) ," &
" 59 (BC_8, PTC7, bidir, X, 58, 1, Z) ," &
" 60 (BC_2, *, control, 1) ," &
" 61 (BC_8, PTC8, bidir, X, 60, 1, Z) ," &
" 62 (BC_2, *, control, 1) ," &
" 63 (BC_8, PTC9, bidir, X, 62, 1, Z) ," &
" 64 (BC_2, *, control, 1) ," &
" 65 (BC_8, PTC10, bidir, X, 64, 1, Z) ," &
" 66 (BC_2, *, control, 1) ," &
" 67 (BC_8, PTC11, bidir, X, 66, 1, Z) ," &
" 68 (BC_2, *, control, 1) ," &
" 69 (BC_8, PTD0, bidir, X, 68, 1, Z) ," &
" 70 (BC_2, *, control, 1) ," &
" 71 (BC_8, PTD1, bidir, X, 70, 1, Z) ," &
" 72 (BC_2, *, control, 1) ," &
" 73 (BC_8, PTD2, bidir, X, 72, 1, Z) ," &
" 74 (BC_2, *, control, 1) ," &
" 75 (BC_8, PTD3, bidir, X, 74, 1, Z) ," &
" 76 (BC_2, *, control, 1) ," &
" 77 (BC_8, PTD4, bidir, X, 76, 1, Z) ," &
" 78 (BC_2, *, control, 1) ," &
" 79 (BC_8, PTD5, bidir, X, 78, 1, Z) ," &
" 80 (BC_2, *, control, 1) ," &
" 81 (BC_8, PTD6, bidir, X, 80, 1, Z) ," &
" 82 (BC_2, *, control, 1) ," &
" 83 (BC_8, PTD7, bidir, X, 82, 1, Z) ";
end K02F;