BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: top

-- Generated by boundaryScanGenerate 7.0.SP01-Build20090319.EP02 on 06/03/09 08:08:34
-- BSDL Version 2001

entity top is 
    generic (PHYSICAL_PIN_MAP : string := "DRQFN_132");

    port (
        -- Port List
        mdc              : inout    bit;
        mdio             : inout    bit;
        miso             : inout    bit;
        mosi             : inout    bit;
        sck              : inout    bit;
        ss               : inout    bit;
        mii1_txd3        : inout    bit;
        mii1_txd2        : inout    bit;
        mii1_txd1        : inout    bit;
        mii1_txd0        : inout    bit;
        mii1_txen        : inout    bit;
        mii1_txc         : inout    bit;
        mii1_rxc         : inout    bit;
        mii1_rxd0        : inout    bit;
        mii1_rxd1        : inout    bit;
        mii1_rxd2        : inout    bit;
        mii1_rxd3        : inout    bit;
        mii1_rxer        : inout    bit;
        mii1_rxdv        : inout    bit;
        mii2_txd0        : inout    bit;
        mii2_txd1        : inout    bit;
        mii2_txen        : inout    bit;
        mii2_txc         : inout    bit;
        mii2_txd2        : inout    bit;
        mii2_txd3        : inout    bit;
        mii2_rxd0        : inout    bit;
        mii2_rxd1        : inout    bit;
        mii2_rxc         : inout    bit;
        mii2_rxd2        : inout    bit;
        mii2_rxd3        : inout    bit;
        mii2_rxdv        : inout    bit;
        mii2_rxer        : inout    bit;
        pllavdd          : linkage  bit;
        vddxtal          : linkage  bit;
        xtali            : linkage  bit;
        xtalo            : linkage  bit;
        mii1_mode0       : inout    bit;
        mii1_mode1       : inout    bit;
        mii1_mode2       : inout    bit;
        mii2_mode1       : inout    bit;
        mii2_mode0       : inout    bit;
        vdda             : linkage  bit_vector (2 downto 0);
        tdp0             : linkage  bit;
        tdn0             : linkage  bit;
        rdn0             : linkage  bit;
        rdp0             : linkage  bit;
        rdp1             : linkage  bit;
        rdn1             : linkage  bit;
        tdn1             : linkage  bit;
        tdp1             : linkage  bit;
        tdp2             : linkage  bit;
        tdn2             : linkage  bit;
        rdn2             : linkage  bit;
        rdp2             : linkage  bit;
        plldvdd          : linkage  bit;
        vddbias          : linkage  bit;
        vddbias          : linkage  bit;
        rdac             : linkage  bit;
        rdp3             : linkage  bit;
        rdn3             : linkage  bit;
        tdn3             : linkage  bit;
        tdp3             : linkage  bit;
        tdp4             : linkage  bit;
        tdn4             : linkage  bit;
        rdn4             : linkage  bit;
        rdp4             : linkage  bit;
        tck              : in       bit;
        tdi              : in       bit;
        tdo              : out      bit;
        tms              : in       bit;
        trst_b           : in       bit;
        led0a            : inout    bit;
        led0b            : inout    bit;
        led0c            : inout    bit;
        led1a            : inout    bit;
        led1b            : inout    bit;
        led1c            : inout    bit;
        led2a            : inout    bit;
        led2b            : inout    bit;
        led2c            : inout    bit;
        led3a            : inout    bit;
        led3b            : inout    bit;
        led3c            : inout    bit;
        led4a            : inout    bit;
        led4b            : inout    bit;
        led4c            : inout    bit;
        ledclk           : inout    bit;
        leddata          : inout    bit;
        resetb           : linkage  bit;
        vddo             : linkage  bit_vector (4 downto 0);
        vddc             : linkage  bit_vector (6 downto 0);
        vddo2            : linkage  bit_vector (2 downto 0);
        vddo3            : linkage  bit_vector (2 downto 0);
        vddo1            : linkage  bit_vector (2 downto 0));

    use STD_1149_1_2001.all;
    use LVS_BSCAN_CELLS.all;

    attribute COMPONENT_CONFORMANCE of top: entity is "STD_1149_1_2001";

    --Pin mappings

    attribute PIN_MAP of top: entity is PHYSICAL_PIN_MAP;

    constant DRQFN_132: PIN_MAP_STRING := 
    "mdc              : B1    , " &
    "mdio             : A3    , " &
    "miso             : A4    , " &
    "mosi             : A5    , " &
    "sck              : B4   , " &
    "ss               : A6   , " &
    "mii1_txd3        : B5   , " &
    "mii1_txd2        : A7   , " &
    "mii1_txd1        : A8   , " &
    "mii1_txd0        : B7   , " &
    "mii1_txen        : A9   , " &
    "mii1_txc         : A10   , " &
    "mii1_rxc         : A11   , " &
    "mii1_rxd0        : B10   , " &
    "mii1_rxd1        : A12   , " &
    "mii1_rxd2        : B11   , " &
    "mii1_rxd3        : A13   , " &
    "mii1_rxer        : A14   , " &
    "mii1_rxdv        : A15   , " &
    "mii2_txd0        : B14   , " &
    "mii2_txd1        : A16   , " &
    "mii2_txen        : B15   , " &
    "mii2_txc         : A21   , " &
    "mii2_txd2        : B17   , " &
    "mii2_txd3        : A22   , " &
    "mii2_rxd0        : A23   , " &
    "mii2_rxd1        : B19   , " &
    "mii2_rxc         : A24   , " &
    "mii2_rxd2        : A25   , " &
    "mii2_rxd3        : B21   , " &
    "mii2_rxdv        : A26   , " &
    "mii2_rxer        : A27   , " &
    "pllavdd          : B23   , " &
    "vddxtal          : B24   , " &
    "xtali            : A29   , " &
    "xtalo            : B25   , " &
    "mii1_mode0       : A32   , " &
    "mii1_mode1       : A33   , " &
    "mii1_mode2       : B29   , " &
    "mii2_mode1       : A34   , " &
    "mii2_mode0       : B31  , " &
    "vdda             :(A39  , " &
                       "B36  , " &
                       "B43) , " &
    "tdp0             : B32  , " &
    "tdn0             : A40  , " &
    "rdn0             : B33  , " &
    "rdp0             : A41  , " &
    "rdp1             : B34  , " &
    "rdn1             : A42  , " &
    "tdn1             : B35  , " &
    "tdp1             : A43  , " &
    "tdp2             : A44  , " &
    "tdn2             : B37  , " &
    "rdn2             : A45  , " &
    "rdp2             : B38  , " &
    "plldvdd          : B39  , " &
    "vddbias          : A47  , " &
    "vddbias          : B40  , " &
    "rdac             : A48  , " &
    "rdp3             : B41  , " &
    "rdn3             : A49  , " &
    "tdn3             : B42  , " &
    "tdp3             : A50  , " &
    "tdp4             : A51  , " &
    "tdn4             : B44  , " &
    "rdn4             : A52  , " &
    "rdp4             : B45  , " &
    "tck              : B46  , " &
    "tdi              : A57  , " &
    "tdo              : B47  , " &
    "tms              : A58  , " &
    "trst_b           : A59  , " &
    "led0a            : B49  , " &
    "led0b            : A60  , " &
    "led0c            : A61  , " &
    "led1a            : B51  , " &
    "led1b            : A62  , " &
    "led1c            : A63  , " &
    "led2a            : B53  , " &
    "led2b            : A64  , " &
    "led2c            : B54  , " &
    "led3a            : A65  , " &
    "led3b            : A66  , " &
    "led3c            : A67  , " &
    "led4a            : B57  , " &
    "led4b            : A68  , " &
    "led4c            : A69  , " &
    "ledclk           : B59  , " &
    "leddata          : A70  , " &
    "resetb           : B60  , " &
    "vddo             :( B2    , " &
                        "B48    , " &
                        "B52    , " &
                        "B55    , " &
                        "B58)    , " &
    "vddc             :( B13    , " &
                        "B22    , " &
                        "B27    , " &
                        "B3    , " &
                        "B50    , " &
                        "B56    , " &
                        "B9)    , " &
    "vddo2            :( B12   , " &
                        "B6    , " &
                        "B8)    , " &
    "vddo3            :( B16   , " &
                        "B18    , " &
                        "B20)    , " &
    "vddo1            :( B26   ,  " &
                        "B28    , " &
                        "B30)       " ;

   attribute TAP_SCAN_RESET of trst_b                   : signal is true;
   attribute TAP_SCAN_IN    of tdi                      : signal is true;
   attribute TAP_SCAN_MODE  of tms                      : signal is true;
   attribute TAP_SCAN_OUT   of tdo                      : signal is true;
   attribute TAP_SCAN_CLOCK of tck                      : signal is (2.5000000000000000000e+07, BOTH);


   attribute INSTRUCTION_LENGTH of top: entity is 32;
 
   attribute INSTRUCTION_OPCODE of top: entity is
      "IDCODE       (11111111111111111111111111111110)," &
      "BYPASS       (00000000000000000000000000000000, 11111111111111111111111111111111)," &
      "EXTEST       (11111111111111111111111111101000)," &
      "SAMPLE       (11111111111111111111111111111000)," &
      "PRELOAD      (11111111111111111111111111111000)," &
      "HIGHZ        (11111111111111111111111111001111)," &
      "CLAMP        (11111111111111111111111111101111) " ;
 
   attribute INSTRUCTION_CAPTURE of top: entity is "xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx01";
 
   attribute IDCODE_REGISTER of top: entity is
      "0000"             & -- version
      "0000000011011111" & -- part number
      "00101111111"      & -- manufacturer's identity
      "1";                   -- required by 1149.1
 
   attribute REGISTER_ACCESS of top: entity is
      "BOUNDARY     ( SAMPLE, PRELOAD )," &
      "BYPASS       ( HIGHZ, CLAMP, BYPASS ) " ;


    --Boundary scan definition
    attribute BOUNDARY_LENGTH of top: entity is 84;

    attribute BOUNDARY_REGISTER of top: entity is 
    -- num  cell         port               function       safe     [ccell disval  rslt]
    "  83   (BC_2       , *                , control      , 1   )                          ,"&
    "  82   (LV_BC_7    , mdc          , bidir        , X    ,   83     , 1     , Z   ),"&
    "  81   (BC_2       , *                , control      , 1   )                          ,"&
    "  80   (LV_BC_7    , mdio         , bidir        , X    ,   81     , 1     , Z   ),"&
    "  79   (BC_2       , *                , control      , 1   )                          ,"&
    "  78   (LV_BC_7    , miso         , bidir        , X    ,   79     , 1     , Z   ),"&
    "  77   (BC_2       , *                , control      , 1   )                          ,"&
    "  76   (LV_BC_7    , mosi         , bidir        , X    ,   77     , 1     , Z   ),"&
    "  75   (LV_BC_7    , sck          , bidir        , X    ,   77     , 1     , Z   ),"&
    "  74   (LV_BC_7    , ss           , bidir        , X    ,   77     , 1     , Z   ),"&
    "  73   (BC_2       , *                , control      , 1   )                          ,"&
    "  72   (LV_BC_7    , mii1_txd3    , bidir        , X    ,   73     , 1     , Z   ),"&
    "  71   (LV_BC_7    , mii1_txd2    , bidir        , X    ,   73     , 1     , Z   ),"&
    "  70   (BC_2       , *                , control      , 1   )                          ,"&
    "  69   (LV_BC_7    , mii1_txd1    , bidir        , X    ,   70     , 1     , Z   ),"&
    "  68   (LV_BC_7    , mii1_txd0    , bidir        , X    ,   70     , 1     , Z   ),"&
    "  67   (LV_BC_7    , mii1_txen    , bidir        , X    ,   70     , 1     , Z   ),"&
    "  66   (BC_2       , *                , control      , 1   )                          ,"&
    "  65   (LV_BC_7    , mii1_txc     , bidir        , X    ,   66     , 1     , Z   ),"&
    "  64   (BC_2       , *                , control      , 1   )                          ,"&
    "  63   (LV_BC_7    , mii1_rxc     , bidir        , X    ,   64     , 1     , Z   ),"&
    "  62   (BC_2       , *                , control      , 1   )                          ,"&
    "  61   (LV_BC_7    , mii1_rxd0    , bidir        , X    ,   62     , 1     , Z   ),"&
    "  60   (BC_2       , *                , control      , 1   )                          ,"&
    "  59   (LV_BC_7    , mii1_rxd1    , bidir        , X    ,   60     , 1     , Z   ),"&
    "  58   (BC_2       , *                , control      , 1   )                          ,"&
    "  57   (LV_BC_7    , mii1_rxd2    , bidir        , X    ,   58     , 1     , Z   ),"&
    "  56   (BC_2       , *                , control      , 1   )                          ,"&
    "  55   (LV_BC_7    , mii1_rxd3    , bidir        , X    ,   56     , 1     , Z   ),"&
    "  54   (BC_2       , *                , control      , 1   )                          ,"&
    "  53   (LV_BC_7    , mii1_rxer    , bidir        , X    ,   54     , 1     , Z   ),"&
    "  52   (BC_2       , *                , control      , 1   )                          ,"&
    "  51   (LV_BC_7    , mii1_rxdv    , bidir        , X    ,   52     , 1     , Z   ),"&
    "  50   (BC_2       , *                , control      , 1   )                          ,"&
    "  49   (LV_BC_7    , mii2_txd0    , bidir        , X    ,   50     , 1     , Z   ),"&
    "  48   (LV_BC_7    , mii2_txd1    , bidir        , X    ,   50     , 1     , Z   ),"&
    "  47   (LV_BC_7    , mii2_txen    , bidir        , X    ,   50     , 1     , Z   ),"&
    "  46   (BC_2       , *                , control      , 1   )                          ,"&
    "  45   (LV_BC_7    , mii2_txc     , bidir        , X    ,   46     , 1     , Z   ),"&
    "  44   (BC_2       , *                , control      , 1   )                          ,"&
    "  43   (LV_BC_7    , mii2_txd2    , bidir        , X    ,   44     , 1     , Z   ),"&
    "  42   (LV_BC_7    , mii2_txd3    , bidir        , X    ,   44     , 1     , Z   ),"&
    "  41   (BC_2       , *                , control      , 1   )                          ,"&
    "  40   (LV_BC_7    , mii2_rxd0    , bidir        , X    ,   41     , 1     , Z   ),"&
    "  39   (LV_BC_7    , mii2_rxd1    , bidir        , X    ,   41     , 1     , Z   ),"&
    "  38   (BC_2       , *                , control      , 1   )                          ,"&
    "  37   (LV_BC_7    , mii2_rxc     , bidir        , X    ,   38     , 1     , Z   ),"&
    "  36   (LV_BC_7    , mii2_rxd2    , bidir        , X    ,   41     , 1     , Z   ),"&
    "  35   (LV_BC_7    , mii2_rxd3    , bidir        , X    ,   41     , 1     , Z   ),"&
    "  34   (BC_2       , *                , control      , 1   )                          ,"&
    "  33   (LV_BC_7    , mii2_rxdv    , bidir        , X    ,   34     , 1     , Z   ),"&
    "  32   (LV_BC_7    , mii2_rxer    , bidir        , X    ,   34     , 1     , Z   ),"&
    "  31   (BC_2       , *                , control      , 1   )                          ,"&
    "  30   (LV_BC_7    , mii1_mode0   , bidir        , X    ,   31     , 1     , Z   ),"&
    "  29   (BC_2       , *                , control      , 0   )                          ,"&
    "  28   (LV_BC_7    , mii1_mode1   , bidir        , X    ,   29     , 0     , Z   ),"&
    "  27   (LV_BC_7    , mii1_mode2   , bidir        , X    ,   29     , 0     , Z   ),"&
    "  26   (LV_BC_7    , mii2_mode1   , bidir        , X    ,   29     , 0     , Z   ),"&
    "  25   (LV_BC_7    , mii2_mode0   , bidir        , X    ,   29     , 0     , Z   ),"&
    "  24   (BC_2       , *                , control      , 1   )                          ,"&
    "  23   (LV_BC_7    , led0a        , bidir        , X    ,   24     , 1     , Z   ),"&
    "  22   (LV_BC_7    , led0b        , bidir        , X    ,   24     , 1     , Z   ),"&
    "  21   (BC_2       , *                , control      , 0   )                          ,"&
    "  20   (LV_BC_7    , led0c        , bidir        , X    ,   21     , 0     , Z   ),"&
    "  19   (BC_2       , *                , control      , 1   )                          ,"&
    "  18   (LV_BC_7    , led1a        , bidir        , X    ,   19     , 1     , Z   ),"&
    "  17   (LV_BC_7    , led1b        , bidir        , X    ,   21     , 0     , Z   ),"&
    "  16   (LV_BC_7    , led1c        , bidir        , X    ,   21     , 0     , Z   ),"&
    "  15   (LV_BC_7    , led2a        , bidir        , X    ,   21     , 0     , Z   ),"&
    "  14   (BC_2       , *                , control      , 1   )                          ,"&
    "  13   (LV_BC_7    , led2b        , bidir        , X    ,   14     , 1     , Z   ),"&
    "  12   (LV_BC_7    , led2c        , bidir        , X    ,   21     , 0     , Z   ),"&
    "  11   (BC_2       , *                , control      , 1   )                          ,"&
    "  10   (LV_BC_7    , led3a        , bidir        , X    ,   11     , 1     , Z   ),"&
    "  9    (LV_BC_7    , led3b        , bidir        , X    ,   11     , 1     , Z   ),"&
    "  8    (BC_2       , *                , control      , 1   )                          ,"&
    "  7    (LV_BC_7    , led3c        , bidir        , X    ,   8      , 1     , Z   ),"&
    "  6    (BC_2       , *                , control      , 1   )                          ,"&
    "  5    (LV_BC_7    , led4a        , bidir        , X    ,   6      , 1     , Z   ),"&
    "  4    (BC_2       , *                , control      , 1   )                          ,"&
    "  3    (LV_BC_7    , led4b        , bidir        , X    ,   4      , 1     , Z   ),"&
    "  2    (LV_BC_7    , led4c        , bidir        , X    ,   21     , 0     , Z   ),"&
    "  1    (LV_BC_7    , ledclk       , bidir        , X    ,   21     , 0     , Z   ),"&
    "  0    (LV_BC_7    , leddata      , bidir        , X    ,   21     , 0     , Z   ) ";

end top;