----------------------------------------------------------------------
--TI TMS320VC5510 16-Bit 240-pin Fixed-Point DSP with Boundary Scan --
----------------------------------------------------------------------
-- Supported Devices: TMS320VC5510 240-pin Revisions 2.1, 2.2 --
----------------------------------------------------------------------
-- Created by : Texas Instruments Incorporated --
-- Documentation : TMS320VC55x Users Guide --
-- BSDL Revision : 1.3 --
-- --
-- BSDL Status : Production --
-- Date Created : 05/06/2002 --
-- Revision History : --
-- 1.01 06/12/2002 --
-- - Added "Notes" comments below. --
-- - Added "Device Pins not testable by Boundary Scan" below --
-- 1.2 06/13/2002 --
-- - Added IDCODE support --
-- 1.3 11/20/2002 --
-- - Added references that this file is also applicable --
-- for silicon revision 2.2. --
-- --
--====================================================================
-- --
-- Notes: --
-- ====== --
-- This BSDL file represents VC5510 revisions 2.1 and 2.2 only. --
-- --
-- Initialization Requirements for Boundary Scan Test --
-- -------------------------------------------------- --
-- The 5510 uses the JTAG port for boundary scan tests, emulation
-- capability and factory test purposes. To use boundary scan test,
-- the EMU0 and EMU1/OFF pins must be held LOW through a rising edge
-- of the TRST- signal prior to the first scan. This operation
-- selects the appropriate TAP control for boundary scan. If at any
-- time during a boundary scan test a rising edge of TRST occurs when
-- EMU0 or EMU1 are not low, a factory test mode may be selected
-- preventing boundary scan test from being completed. For this reason,
-- it is recommended that EMU0 and EMU1/OFF be pulled or driven low at
-- all times during boundary scan test.
--====================================================================
--
-- Device Pins not testable by Boundary Scan
-- ------------------------------------------------------------------
--
-- The following pins cannot be tested through boundary scan:
-- EMU0, EMU1/OFF, X1, RSVD[1:9], IACK/NC
--
--====================================================================
-- --
-- IMPORTANT NOTICE
-- Texas Instruments Incorporated (TI) reserves the right to make
-- changes to its products or to discontinue any semiconductor
-- product or service without notice, and advises its customers to
-- obtain the latest version of the relevant information to
-- verify, before placing orders, that the information being
-- relied on is current.
-- TI warrants performance of its semiconductor products and
-- related software to the specifications applicable at the time
-- of sale in accordance with TI's standard warranty. Testing and
-- other quality control techniques are utilized to the extent TI
-- deems necessary to support this warranty. Specific testing of
-- all parameters of each device is not necessarily performed,
-- except those mandated by government requirements.
--
-- Certain applications using semiconductor devices may involve
-- potential risks of death, personal injury, or severe property
-- or environmental damage ("Critical Applications").
-- TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED,
-- AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN
-- LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER
-- CRITICAL APPLICATIONS.
-- Inclusion of TI products in such applications is understood
-- to be fully at the risk of the customer. Use of TI products
-- in such applications requires the written approval of an
-- appropriate TI officer. Questions concerning potential risk
-- applications should be directed to TI through a local SC sales
-- office.
-- In order to minimize risks associated with the customer's
-- applications, adequate design and operating safeguards should
-- be provided by the
-- customer to minimize inherent or procedural hazards.
-- TI assumes no liability for applications assistance, customer
-- product design, software performance, or infringement of
-- patents or services described herein. Nor does TI warrant or
-- represent that any license, either express or implied, is
-- granted under any patent right, copyright, mask work right, or
-- other intellectual property right of TI covering or relating
-- to any combination, machine, or process in which such
-- semiconductor products or services might be or are used.
-- Copyright (c) 2001, Texas Instruments Incorporated
-------------------------------------------------------------------
entity TMS320VC5510 is
generic (PHYSICAL_PIN_MAP : string := "GGW");
port (A : out bit_vector(0 to 21);
CE3 : out bit;
CE2 : out bit;
CE1 : out bit;
CE0 : out bit;
BE3 : out bit;
BE2 : out bit;
BE1 : out bit;
BE0 : out bit;
CLKMEM : out bit;
D : inout bit_vector(0 to 31);
HOLD : in bit;
HOLDA : out bit;
ARE : out bit;
AOE : out bit;
AWE : out bit;
ARDY : in bit;
SSADS : out bit;
SSOE : out bit;
SSWE : out bit;
SDRAS : out bit;
SDCAS : out bit;
SDWE : out bit;
SDA10 : out bit;
CLKR0 : inout bit;
DR0 : in bit;
FSR0 : inout bit;
CLKX0 : inout bit;
DX0 : out bit;
FSX0 : inout bit;
CLKS0 : in bit;
CLKR1 : inout bit;
DR1 : in bit;
FSR1 : inout bit;
CLKX1 : inout bit;
DX1 : out bit;
FSX1 : inout bit;
CLKS1 : in bit;
CLKR2 : inout bit;
DR2 : in bit;
FSR2 : inout bit;
CLKX2 : inout bit;
DX2 : out bit;
FSX2 : inout bit;
CLKS2 : in bit;
HA : in bit_vector(0 to 19);
HD : inout bit_vector(0 to 15);
HCS : in bit;
HRNW : in bit;
HDS1 : in bit;
HDS2 : in bit;
HRDY : out bit;
HBE0 : in bit;
HBE1 : in bit;
HMODE : in bit;
HCNTL0 : in bit;
RSTMODE : in bit;
HINT : out bit;
RESET : in bit;
INT5 : in bit;
INT4 : in bit;
INT3 : in bit;
INT2 : in bit;
INT1 : in bit;
INT0 : in bit;
NMI : in bit;
IACK_NC : linkage bit;
TCK : in bit;
TDI : in bit;
TDO : out bit;
TMS : in bit;
TRST : in bit;
EMU0 : in bit;
EMU1 : in bit;
BOOTM3 : in bit;
RSVD1 : linkage bit;
RSVD2 : linkage bit;
RSVD3 : linkage bit;
RSVD4 : linkage bit;
RSVD5 : linkage bit;
RSVD6 : linkage bit;
RSVD7 : linkage bit;
RSVD8 : linkage bit;
RSVD9 : linkage bit;
CLKIN : in bit;
CLKOUT : out bit;
CLKMD : in bit;
TINOUT0 : inout bit;
TINOUT1 : inout bit;
IO7 : inout bit;
IO6 : inout bit;
IO5 : inout bit;
IO4 : inout bit;
IO3 : inout bit;
IO2 : inout bit;
IO1 : inout bit;
IO0 : inout bit;
XF : out bit;
CVDD : linkage bit_vector(1 to 18);
DVDD : linkage bit_vector(1 to 10);
VSS : linkage bit_vector(1 to 16);
NC : linkage bit_vector(1 to 12) );
use STD_1149_1_1994.all; -- Get standard attributes and definitions
attribute COMPONENT_CONFORMANCE of TMS320VC5510: entity is
"STD_1149_1_1993";
attribute PIN_MAP of TMS320VC5510: entity is PHYSICAL_PIN_MAP;
constant GGW : PIN_MAP_STRING :=
" A:(B8,D8,B7,C7,A6,C6,C4,C5,A4,A2,C1,E1,F3,F2,G4,G3,F4, " &
" G2,H4,H3,J4,J3), " &
" CE0 : J2, " &
" CE1 : H2, " &
" CE2 : G1, " &
" CE3 : E4, " &
" BE0 : K2, " &
" BE1 : K3, " &
" BE2 : L3, " &
" BE3 : L4, " &
" CLKMEM : B9, " &
" D:(C8,D7,A8,B6,D6,B5,D5,B4,D4,B3,C3,D3,E3, C2,D2, E2, " &
" N3,T1,R3,P4,R4,T4,P5,P6,P7,T7,R8,T8,P11,T9,T10,P10), " &
" HOLD : U16, " &
" HOLDA : P14, " &
" ARE : R14, " &
" AOE : U15, " &
" AWE : T13, " &
" ARDY : P13, " &
" SSADS : N4, " &
" SSOE : M3, " &
" SSWE : M2, " &
" SDRAS : A11, " &
" SDCAS : A13, " &
" SDWE : B12, " &
" SDA10 : B10, " &
" CLKR0 : U3, " &
" DR0 : T6, " &
" FSR0 : T5, " &
" CLKX0 : U7, " &
" DX0 : R10, " &
" FSX0 : P9, " &
" CLKS0 : U5, " &
" CLKR1 : T3, " &
" DR1 : P3, " &
" FSR1 : R2, " &
" CLKX1 : R15, " &
" DX1 : T16, " &
" FSX1 : T15, " &
" CLKS1 : P2, " &
" CLKR2 : R5, " &
" DR2 : R7, " &
" FSR2 : R6, " &
" CLKX2 : U8, " &
" DX2 : U11, " &
" FSX2 : R9, " &
" CLKS2 : P8, " &
" HA:(D16,E16,F15,G15,H14,J14,K17,J16,G14,F14, " &
" E15,D15,E14,G17,H16,J15,K16,M15,M14,N17), " &
" HD:(B16,B13,B11,B15,C9,C10,C11,C12, " &
" C13,C14,A15,D13,D12,D11,D10,D9), " &
" HCS : C16, " &
" HRNW : C15, " &
" HDS1 : B17, " &
" HDS2 : D14, " &
" HRDY : B14, " &
" HBE0 : K15, " &
" HBE1 : M16, " &
" HMODE : N16, " &
" HCNTL0 : N15, " &
" RSTMODE : E17, " &
" HINT : N14, " &
" RESET : G16, " &
" INT0 : R12, " &
" INT1 : U13, " &
" INT2 : R13, " &
" INT3 : T14, " &
" INT4 : P12, " &
" INT5 : R11, " &
" NMI : T12, " &
" IACK_NC : T11, " &
" TCK : L17, " &
" TDI : L16, " &
" TDO : L15, " &
" TMS : K14, " &
" TRST : C17, " &
" EMU0 : R16, " &
" EMU1 : L14, " &
" BOOTM3 : E5, " &
" RSVD1 : N13, " &
" RSVD2 : M13, " &
" RSVD3 : L13, " &
" RSVD4 : K13, " &
" RSVD5 : J13, " &
" RSVD6 : H13, " &
" RSVD7 : G13, " &
" RSVD8 : F13, " &
" RSVD9 : E13, " &
" CLKIN : F16, " &
" CLKOUT : H15, " &
" CLKMD : P16, " &
" TINOUT0 : P15, " &
" TINOUT1 : R17, " &
" IO7 : K1, " &
" IO6 : L2, " &
" IO5 : M1, " &
" IO4 : N2, " &
" IO3 : P1, " &
" IO2 : T2, " &
" IO1 : M4, " &
" IO0 : K4, " &
" XF : B2, " &
" CVDD: (R1,U12,P17,F17,A14,F5,K5,N6,N10,E10,E7,L1,A5,"&
" U4,E11,E12,N11,N12), "&
" DVDD: (D1,F1,N1,U6,U14,M17,D17,A12,A7,A3), "&
" VSS: (B1,H1,J1,U1,U2,U9,U10,U17,T17,J17,H17,A17,A16,A10,A9,A1), "&
" NC:(E6,E8,E9,G5,H5,J5,L5,M5,N5,N7,N8,N9)" ;
-- *********************************************************
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_RESET of TRST : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (25.00e6, BOTH);
attribute COMPLIANCE_PATTERNS of TMS320VC5510: entity is
"(EMU1,EMU0)(00)";
attribute INSTRUCTION_LENGTH of TMS320VC5510: entity is 10;
attribute INSTRUCTION_OPCODE of TMS320VC5510: entity is
"EXTEST (0000000000), " &
"BYPASS (1111111111), " &
"HIGHZ (0000011000), " &
"IDCODE (0000001100), " &
"SAMPLE (0000000100) " ;
attribute INSTRUCTION_CAPTURE of TMS320VC5510: entity is "XXXXXXXX01";
attribute IDCODE_REGISTER of TMS320VC5510 : entity is
"00011000000001010000000000101111";
attribute REGISTER_ACCESS of TMS320VC5510: entity is
"BOUNDARY (EXTEST, SAMPLE)," &
"BYPASS (BYPASS, HIGHZ) " ;
attribute BOUNDARY_LENGTH of TMS320VC5510: entity is 302;
attribute BOUNDARY_REGISTER of TMS320VC5510: entity is
----------------------------------------------------------------
-- CELL CELL PIN CELL CNTRL
-- # NAME ,NAME ,TYPE , ,CELL
----------------------------------------------------------------
"0 (BC_1 ,* ,CONTROL ,1 ), " &
"1 (BC_2 ,D(13) ,INPUT ,X ), " &
"2 (BC_1 ,* ,CONTROL ,1 ), " &
"3 (BC_1 ,D(13) ,OUTPUT3 ,X ,2 ,1 ,Z ), " &
"4 (BC_1 ,A(10) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"5 (BC_2 ,D(11) ,INPUT ,X ), " &
"6 (BC_1 ,* ,CONTROL ,1 ), " &
"7 (BC_1 ,D(11) ,OUTPUT3 ,X ,6 ,1 ,Z ), " &
"8 (BC_2 ,D(14) ,INPUT ,X ), " &
"9 (BC_1 ,* ,CONTROL ,1 ), " &
"10 (BC_1 ,D(14) ,OUTPUT3 ,X ,9 ,1 ,Z ), " &
"11 (BC_1 ,CE3 ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"12 (BC_2 ,D(12) ,INPUT ,X ), " &
"13 (BC_1 ,* ,CONTROL ,1 ), " &
"14 (BC_1 ,D(12) ,OUTPUT3 ,X ,13 ,1 ,Z ), " &
"15 (BC_2 ,D(15) ,INPUT ,X ), " &
"16 (BC_1 ,* ,CONTROL ,1 ), " &
"17 (BC_1 ,D(15) ,OUTPUT3 ,X ,16 ,1 ,Z ), " &
"18 (BC_1 ,A(11) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"19 (BC_1 ,A(16) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"20 (BC_1 ,A(12) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"21 (BC_1 ,A(13) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"22 (BC_1 ,A(14) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"23 (BC_1 ,A(15) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"24 (BC_1 ,A(17) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"25 (BC_1 ,CE2 ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"26 (BC_1 ,A(18) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"27 (BC_1 ,A(19) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"28 (BC_1 ,CE1 ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"29 (BC_1 ,A(20) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"30 (BC_1 ,A(21) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"31 (BC_1 ,CE0 ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"32 (BC_2 ,IO0 ,INPUT ,X ), " &
"33 (BC_1 ,IO0 ,OUTPUT3 ,X ,34 ,1 ,Z ), " &
"34 (BC_1 ,* ,CONTROL ,1 ), " &
"35 (BC_1 ,BE1 ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"36 (BC_1 ,BE0 ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"37 (BC_2 ,IO7 ,INPUT ,X ), " &
"38 (BC_1 ,IO7 ,OUTPUT3 ,X ,39 ,1 ,Z ), " &
"39 (BC_1 ,* ,CONTROL ,1 ), " &
"40 (BC_1 ,BE3 ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"41 (BC_1 ,BE2 ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"42 (BC_2 ,IO6 ,INPUT ,X ), " &
"43 (BC_1 ,IO6 ,OUTPUT3 ,X ,44 ,1 ,Z ), " &
"44 (BC_1 ,* ,CONTROL ,1 ), " &
"45 (BC_2 ,IO1 ,INPUT ,X ), " &
"46 (BC_1 ,IO1 ,OUTPUT3 ,X ,47 ,1 ,Z ), " &
"47 (BC_1 ,* ,CONTROL ,1 ), " &
"48 (BC_1 ,SSOE ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"49 (BC_1 ,SSWE ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"50 (BC_2 ,IO5 ,INPUT ,X ), " &
"51 (BC_1 ,IO5 ,OUTPUT3 ,X ,52 ,1 ,Z ), " &
"52 (BC_1 ,* ,CONTROL ,1 ), " &
"53 (BC_1 ,SSADS ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"54 (BC_2 ,D(19) ,INPUT ,X ), " &
"55 (BC_1 ,* ,CONTROL ,1 ), " &
"56 (BC_1 ,D(19) ,OUTPUT3 ,X ,55 ,1 ,Z ), " &
"57 (BC_2 ,D(16) ,INPUT ,X ), " &
"58 (BC_1 ,* ,CONTROL ,1 ), " &
"59 (BC_1 ,D(16) ,OUTPUT3 ,X ,58 ,1 ,Z ), " &
"60 (BC_2 ,IO4 ,INPUT ,X ), " &
"61 (BC_1 ,IO4 ,OUTPUT3 ,X ,62 ,1 ,Z ), " &
"62 (BC_1 ,* ,CONTROL ,1 ), " &
"63 (BC_2 ,IO3 ,INPUT ,X ), " &
"64 (BC_1 ,IO3 ,OUTPUT3 ,X ,65 ,1 ,Z ), " &
"65 (BC_1 ,* ,CONTROL ,1 ), " &
"66 (BC_2 ,DR1 ,INPUT ,X ), " &
"67 (BC_2 ,CLKS1 ,INPUT ,X ), " &
"68 (BC_2 ,D(17) ,INPUT ,X ), " &
"69 (BC_1 ,* ,CONTROL ,1 ), " &
"70 (BC_1 ,D(17) ,OUTPUT3 ,X ,69 ,1 ,Z ), " &
"71 (BC_2 ,D(18) ,INPUT ,X ), " &
"72 (BC_1 ,* ,CONTROL ,1 ), " &
"73 (BC_1 ,D(18) ,OUTPUT3 ,X ,72 ,1 ,Z ), " &
"74 (BC_2 ,FSR1 ,INPUT ,X ), " &
"75 (BC_1 ,FSR1 ,OUTPUT3 ,X ,76 ,1 ,Z ), " &
"76 (BC_1 ,* ,CONTROL ,1 ), " &
"77 (BC_2 ,CLKR1 ,INPUT ,X ), " &
"78 (BC_1 ,CLKR1 ,OUTPUT3 ,X ,79 ,1 ,Z ), " &
"79 (BC_1 ,* ,CONTROL ,1 ), " &
"80 (BC_2 ,IO2 ,INPUT ,X ), " &
"81 (BC_1 ,IO2 ,OUTPUT3 ,X ,82 ,1 ,Z ), " &
"82 (BC_1 ,* ,CONTROL ,1 ), " &
"83 (BC_2 ,CLKR0 ,INPUT ,X ), " &
"84 (BC_1 ,CLKR0 ,OUTPUT3 ,X ,85 ,1 ,Z ), " &
"85 (BC_1 ,* ,CONTROL ,1 ), " &
"86 (BC_2 ,D(20) ,INPUT ,X ), " &
"87 (BC_1 ,* ,CONTROL ,1 ), " &
"88 (BC_1 ,D(20) ,OUTPUT3 ,X ,87 ,1 ,Z ), " &
"89 (BC_2 ,D(21) ,INPUT ,X ), " &
"90 (BC_1 ,* ,CONTROL ,1 ), " &
"91 (BC_1 ,D(21) ,OUTPUT3 ,X ,90 ,1 ,Z ), " &
"92 (BC_2 ,D(22) ,INPUT ,X ), " &
"93 (BC_1 ,* ,CONTROL ,1 ), " &
"94 (BC_1 ,D(22) ,OUTPUT3 ,X ,93 ,1 ,Z ), " &
"95 (BC_2 ,CLKR2 ,INPUT ,X ), " &
"96 (BC_1 ,CLKR2 ,OUTPUT3 ,X ,97 ,1 ,Z ), " &
"97 (BC_1 ,* ,CONTROL ,1 ), " &
"98 (BC_2 ,FSR0 ,INPUT ,X ), " &
"99 (BC_1 ,FSR0 ,OUTPUT3 ,X ,100 ,1 ,Z ), " &
"100 (BC_1 ,* ,CONTROL ,1 ), " &
"101 (BC_2 ,CLKS0 ,INPUT ,X ), " &
"102 (BC_2 ,D(23) ,INPUT ,X ), " &
"103 (BC_1 ,* ,CONTROL ,1 ), " &
"104 (BC_1 ,D(23) ,OUTPUT3 ,X ,103 ,1 ,Z ), " &
"105 (BC_2 ,FSR2 ,INPUT ,X ), " &
"106 (BC_1 ,FSR2 ,OUTPUT3 ,X ,107 ,1 ,Z ), " &
"107 (BC_1 ,* ,CONTROL ,1 ), " &
"108 (BC_2 ,DR0 ,INPUT ,X ), " &
"109 (BC_2 ,D(24) ,INPUT ,X ), " &
"110 (BC_1 ,* ,CONTROL ,1 ), " &
"111 (BC_1 ,D(24) ,OUTPUT3 ,X ,110 ,1 ,Z ), " &
"112 (BC_2 ,DR2 ,INPUT ,X ), " &
"113 (BC_2 ,D(25) ,INPUT ,X ), " &
"114 (BC_1 ,* ,CONTROL ,1 ), " &
"115 (BC_1 ,D(25) ,OUTPUT3 ,X ,114 ,1 ,Z ), " &
"116 (BC_2 ,CLKX0 ,INPUT ,X ), " &
"117 (BC_1 ,CLKX0 ,OUTPUT3 ,X ,118 ,1 ,Z ), " &
"118 (BC_1 ,* ,CONTROL ,1 ), " &
"119 (BC_2 ,CLKS2 ,INPUT ,X ), " &
"120 (BC_2 ,D(26) ,INPUT ,X ), " &
"121 (BC_1 ,* ,CONTROL ,1 ), " &
"122 (BC_1 ,D(26) ,OUTPUT3 ,X ,121 ,1 ,Z ), " &
"123 (BC_2 ,D(27) ,INPUT ,X ), " &
"124 (BC_1 ,* ,CONTROL ,1 ), " &
"125 (BC_1 ,D(27) ,OUTPUT3 ,X ,124 ,1 ,Z ), " &
"126 (BC_2 ,CLKX2 ,INPUT ,X ), " &
"127 (BC_1 ,CLKX2 ,OUTPUT3 ,X ,128 ,1 ,Z ), " &
"128 (BC_1 ,* ,CONTROL ,1 ), " &
"129 (BC_2 ,FSX0 ,INPUT ,X ), " &
"130 (BC_1 ,FSX0 ,OUTPUT3 ,X ,131 ,1 ,Z ), " &
"131 (BC_1 ,* ,CONTROL ,1 ), " &
"132 (BC_2 ,FSX2 ,INPUT ,X ), " &
"133 (BC_1 ,FSX2 ,OUTPUT3 ,X ,134 ,1 ,Z ), " &
"134 (BC_1 ,* ,CONTROL ,1 ), " &
"135 (BC_2 ,D(29) ,INPUT ,X ), " &
"136 (BC_1 ,* ,CONTROL ,1 ), " &
"137 (BC_1 ,D(29) ,OUTPUT3 ,X ,136 ,1 ,Z ), " &
"138 (BC_2 ,D(31) ,INPUT ,X ), " &
"139 (BC_1 ,* ,CONTROL ,1 ), " &
"140 (BC_1 ,D(31) ,OUTPUT3 ,X ,139 ,1 ,Z ), " &
"141 (BC_1 ,DX0 ,OUTPUT3 ,X ,142 ,1 ,Z ), " &
"142 (BC_1 ,* ,CONTROL ,1 ), " &
"143 (BC_2 ,D(30) ,INPUT ,X ), " &
"144 (BC_1 ,* ,CONTROL ,1 ), " &
"145 (BC_1 ,D(30) ,OUTPUT3 ,X ,144 ,1 ,Z ), " &
"146 (BC_2 ,D(28) ,INPUT ,X ), " &
"147 (BC_1 ,* ,CONTROL ,1 ), " &
"148 (BC_1 ,D(28) ,OUTPUT3 ,X ,147 ,1 ,Z ), " &
"149 (BC_2 ,INT5 ,INPUT ,X ), " &
"150 (BC_1 ,CLKMEM ,OUTPUT3 ,X ,173 ,1 ,Z ), " &
"151 (BC_1 ,DX2 ,OUTPUT3 ,X ,152 ,1 ,Z ), " &
"152 (BC_1 ,* ,CONTROL ,1 ), " &
"153 (BC_2 ,INT4 ,INPUT ,X ), " &
"154 (BC_2 ,INT0 ,INPUT ,X ), " &
"155 (BC_2 ,NMI ,INPUT ,X ), " &
"156 (BC_2 ,ARDY ,INPUT ,X ), " &
"157 (BC_1 ,HOLDA ,OUTPUT3 ,X ,173 ,1 ,Z ), " &
"158 (BC_2 ,INT2 ,INPUT ,X ), " &
"159 (BC_1 ,AWE ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"160 (BC_2 ,INT1 ,INPUT ,X ), " &
"161 (BC_1 ,AOE ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"162 (BC_1 ,ARE ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"163 (BC_2 ,INT3 ,INPUT ,X ), " &
"164 (BC_2 ,HOLD ,INPUT ,X ), " &
"165 (BC_2 ,CLKX1 ,INPUT ,X ), " &
"166 (BC_1 ,CLKX1 ,OUTPUT3 ,X ,167 ,1 ,Z ), " &
"167 (BC_1 ,* ,CONTROL ,1 ), " &
"168 (BC_2 ,FSX1 ,INPUT ,X ), " &
"169 (BC_1 ,FSX1 ,OUTPUT3 ,X ,170 ,1 ,Z ), " &
"170 (BC_1 ,* ,CONTROL ,1 ), " &
"171 (BC_1 ,DX1 ,OUTPUT3 ,X ,172 ,1 ,Z ), " &
"172 (BC_1 ,* ,CONTROL ,1 ), " &
"173 (BC_1 ,* ,CONTROL ,1 ), " &
"174 (BC_1 ,TINOUT1 ,OUTPUT3 ,X ,176 ,1 ,Z ), " &
"175 (BC_2 ,TINOUT1 ,INPUT ,X ), " &
"176 (BC_1 ,* ,CONTROL ,1 ), " &
"177 (BC_1 ,TINOUT0 ,OUTPUT3 ,X ,179 ,1 ,Z ), " &
"178 (BC_2 ,TINOUT0 ,INPUT ,X ), " &
"179 (BC_1 ,* ,CONTROL ,1 ), " &
"180 (BC_2 ,CLKMD ,INPUT ,X ), " &
"181 (BC_1 ,HINT ,OUTPUT3 ,X ,173 ,1 ,Z ), " &
"182 (BC_2 ,HCNTL0 ,INPUT ,X ), " &
"183 (BC_2 ,HMODE ,INPUT ,X ), " &
"184 (BC_2 ,HA(19) ,INPUT ,X ), " &
"185 (BC_2 ,HA(18) ,INPUT ,X ), " &
"186 (BC_2 ,HA(17) ,INPUT ,X ), " &
"187 (BC_2 ,HBE1 ,INPUT ,X ), " &
"188 (BC_2 ,HBE0 ,INPUT ,X ), " &
"189 (BC_2 ,HA(16) ,INPUT ,X ), " &
"190 (BC_2 ,HA(6) ,INPUT ,X ), " &
"191 (BC_2 ,HA(5) ,INPUT ,X ), " &
"192 (BC_2 ,HA(15) ,INPUT ,X ), " &
"193 (BC_2 ,HA(7) ,INPUT ,X ), " &
"194 (BC_2 ,HA(4) ,INPUT ,X ), " &
"195 (BC_1 ,CLKOUT ,OUTPUT3 ,X ,173 ,1 ,Z ), " &
"196 (BC_2 ,HA(14) ,INPUT ,X ), " &
"197 (BC_2 ,HA(8) ,INPUT ,X ), " &
"198 (BC_2 ,HA(3) ,INPUT ,X ), " &
"199 (BC_2 ,RESET ,INPUT ,X ), " &
"200 (BC_2 ,HA(13) ,INPUT ,X ), " &
"201 (BC_2 ,HA(9) ,INPUT ,X ), " &
"202 (BC_2 ,HA(2) ,INPUT ,X ), " &
"203 (BC_2 ,CLKIN ,INPUT ,X ), " &
"204 (BC_2 ,HA(12) ,INPUT ,X ), " &
"205 (BC_2 ,HDS2 ,INPUT ,X ), " &
"206 (BC_2 ,HA(10) ,INPUT ,X ), " &
"207 (BC_2 ,HA(1) ,INPUT ,X ), " &
"208 (BC_2 ,RSTMODE ,INPUT ,X ), " &
"209 (BC_2 ,HA(11) ,INPUT ,X ), " &
"210 (BC_2 ,HA(0) ,INPUT ,X ), " &
"211 (BC_2 ,HDS1 ,INPUT ,X ), " &
"212 (BC_2 ,HRNW ,INPUT ,X ), " &
"213 (BC_2 ,HCS ,INPUT ,X ), " &
"214 (BC_2 ,HD(3) ,INPUT ,X ), " &
"215 (BC_1 ,HD(3) ,OUTPUT3 ,X ,234 ,1 ,Z ), " &
"216 (BC_2 ,HD(0) ,INPUT ,X ), " &
"217 (BC_1 ,HD(0) ,OUTPUT3 ,X ,234 ,1 ,Z ), " &
"218 (BC_2 ,HD(10) ,INPUT ,X ), " &
"219 (BC_1 ,HD(10) ,OUTPUT3 ,X ,233 ,1 ,Z ), " &
"220 (BC_2 ,HD(9) ,INPUT ,X ), " &
"221 (BC_1 ,HD(9) ,OUTPUT3 ,X ,233 ,1 ,Z ), " &
"222 (BC_1 ,* ,CONTROL ,1 ), " &
"223 (BC_1 ,HRDY ,OUTPUT3 ,X ,222 ,1 ,Z ), " &
"224 (BC_2 ,HD(11) ,INPUT ,X ), " &
"225 (BC_1 ,HD(11) ,OUTPUT3 ,X ,233 ,1 ,Z ), " &
"226 (BC_2 ,HD(8) ,INPUT ,X ), " &
"227 (BC_1 ,HD(8) ,OUTPUT3 ,X ,233 ,1 ,Z ), " &
"228 (BC_2 ,HD(1) ,INPUT ,X ), " &
"229 (BC_1 ,HD(1) ,OUTPUT3 ,X ,234 ,1 ,Z ), " &
"230 (BC_1 ,SDCAS ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"231 (BC_2 ,HD(12) ,INPUT ,X ), " &
"232 (BC_1 ,HD(12) ,OUTPUT3 ,X ,233 ,1 ,Z ), " &
"233 (BC_1 ,* ,CONTROL ,1 ), " &
"234 (BC_1 ,* ,CONTROL ,1 ), " &
"235 (BC_2 ,HD(7) ,INPUT ,X ), " &
"236 (BC_1 ,HD(7) ,OUTPUT3 ,X ,234 ,1 ,Z ), " &
"237 (BC_1 ,SDWE ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"238 (BC_2 ,HD(13) ,INPUT ,X ), " &
"239 (BC_1 ,HD(13) ,OUTPUT3 ,X ,233 ,1 ,Z ), " &
"240 (BC_2 ,HD(6) ,INPUT ,X ), " &
"241 (BC_1 ,HD(6) ,OUTPUT3 ,X ,234 ,1 ,Z ), " &
"242 (BC_2 ,HD(2) ,INPUT ,X ), " &
"243 (BC_1 ,HD(2) ,OUTPUT3 ,X ,234 ,1 ,Z ), " &
"244 (BC_1 ,SDRAS ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"245 (BC_2 ,HD(14) ,INPUT ,X ), " &
"246 (BC_1 ,HD(14) ,OUTPUT3 ,X ,233 ,1 ,Z ), " &
"247 (BC_2 ,HD(5) ,INPUT ,X ), " &
"248 (BC_1 ,HD(5) ,OUTPUT3 ,X ,234 ,1 ,Z ), " &
"249 (BC_1 ,SDA10 ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"250 (BC_2 ,HD(15) ,INPUT ,X ), " &
"251 (BC_1 ,HD(15) ,OUTPUT3 ,X ,233 ,1 ,Z ), " &
"252 (BC_2 ,HD(4) ,INPUT ,X ), " &
"253 (BC_1 ,HD(4) ,OUTPUT3 ,X ,234 ,1 ,Z ), " &
"254 (BC_1 ,* ,INTERNAL ,1 ), " & -- previously CLKMEM
"255 (BC_1 ,A(1) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"256 (BC_2 ,D(0) ,INPUT ,X ), " &
"257 (BC_1 ,* ,CONTROL ,1 ), " &
"258 (BC_1 ,D(0) ,OUTPUT3 ,X ,257 ,1 ,Z ), " &
"259 (BC_1 ,A(0) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"260 (BC_2 ,D(2) ,INPUT ,X ), " &
"261 (BC_1 ,* ,CONTROL ,1 ), " &
"262 (BC_1 ,D(2) ,OUTPUT3 ,X ,261 ,1 ,Z ), " &
"263 (BC_2 ,D(1) ,INPUT ,X ), " &
"264 (BC_1 ,* ,CONTROL ,1 ), " &
"265 (BC_1 ,D(1) ,OUTPUT3 ,X ,264 ,1 ,Z ), " &
"266 (BC_1 ,A(3) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"267 (BC_1 ,A(2) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"268 (BC_2 ,D(4) ,INPUT ,X ), " &
"269 (BC_1 ,* ,CONTROL ,1 ), " &
"270 (BC_1 ,D(4) ,OUTPUT3 ,X ,269 ,1 ,Z ), " &
"271 (BC_1 ,A(5) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"272 (BC_2 ,D(3) ,INPUT ,X ), " &
"273 (BC_1 ,* ,CONTROL ,1 ), " &
"274 (BC_1 ,D(3) ,OUTPUT3 ,X ,273 ,1 ,Z ), " &
"275 (BC_1 ,A(4) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"276 (BC_2 ,D(6) ,INPUT ,X ), " &
"277 (BC_1 ,* ,CONTROL ,1 ), " &
"278 (BC_1 ,D(6) ,OUTPUT3 ,X ,277 ,1 ,Z ), " &
"279 (BC_2 ,D(8) ,INPUT ,X ), " &
"280 (BC_1 ,* ,CONTROL ,1 ), " &
"281 (BC_1 ,D(8) ,OUTPUT3 ,X ,280 ,1 ,Z ), " &
"282 (BC_1 ,A(7) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"283 (BC_2 ,D(5) ,INPUT ,X ), " &
"284 (BC_1 ,* ,CONTROL ,1 ), " &
"285 (BC_1 ,D(5) ,OUTPUT3 ,X ,284 ,1 ,Z ), " &
"286 (BC_1 ,A(8) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"287 (BC_1 ,A(6) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"288 (BC_2 ,D(7) ,INPUT ,X ), " &
"289 (BC_1 ,* ,CONTROL ,1 ), " &
"290 (BC_1 ,D(7) ,OUTPUT3 ,X ,289 ,1 ,Z ), " &
"291 (BC_1 ,A(9) ,OUTPUT3 ,X ,0 ,1 ,Z ), " &
"292 (BC_2 ,D(10) ,INPUT ,X ), " &
"293 (BC_1 ,* ,CONTROL ,1 ), " &
"294 (BC_1 ,D(10) ,OUTPUT3 ,X ,293 ,1 ,Z ), " &
"295 (BC_2 ,D(9) ,INPUT ,X ), " &
"296 (BC_1 ,* ,CONTROL ,1 ), " &
"297 (BC_1 ,D(9) ,OUTPUT3 ,X ,296 ,1 ,Z ), " &
"298 (BC_2 ,* ,INTERNAL ,X ), " &
"299 (BC_2 ,* ,INTERNAL ,X ), " &
"300 (BC_2 ,BOOTM3 ,INPUT ,X ), " &
"301 (BC_1 ,XF ,OUTPUT3 ,X ,173 ,1 ,Z ) " ;
end TMS320VC5510;