BSDL Files Library for JTAG

The only free public library that contains thousands of BSDL (Boundary Scan Description Language) models to use with BScan/JTAG tools

BSDL model: MPC8545E

--------------------------------------------------------------------------------
--               Freescale Boundary Scan Description Language                 --
--------------------------------------------------------------------------------
-- Boundary Scan Description Language (IEEE 1149.1b)                          --
--                                                                            --
-- Device        : MPC8545E Revision 2.0                                      --
-- File Version  : B                                                          --
-- File Name     : MPC8545E.R2B                                               --
-- File created  : September 15, 2006                                         --
-- Package type  : FC-PBGA 783 pins                                           --
-- Voltage Level : 1.2V                                                       --
-- BSDL_status   : preliminary                                                --
-- 1149.1 Device Test : tested                                                --
-- System Level Test  : tested                                                --
--                                                                            --
--------------------------------------------------------------------------------
-- Revision History:                                                          --
-- A - Original version                                                       --
-- B - Made HRESET_L a compliance pin.  See note below.                       --
--                                                                            --
-- NOTE: Active low ports are designated with a "_L" suffix.                  --
--                                                                            --
-- NOTE: The IEEE 1149.1 standard optional instructions HIGHZ and             --
--       IDCODE are supported.                                                --
--                                                                            --
-- NOTE: Some busses are broken out bitwise because different pin elements    --
--       have different port directions                                       --
--                                                                            --
-- NOTE: For assistance with this file, contact your sales office.            --
--                                                                            --
-- NOTE: MPC8545E is non-compliant to IEEE 1149.1 due to an issue with the    --
--       HRESET_L pin.  BSDL has been modified to work around this issue.     --
--       The patterns generated with this BSDL will be compliant except that  --
--       HRESET_L has been declared as compliance pin and the board           --
--       interconnect for this pin cannot be tested.                          --
--------------------------------------------------------------------------------
--                                                                            --
--------------------------------------------------------------------------------
--                                                                            --
--============================================================================--
--                             IMPORTANT NOTICE                               --
--  This information is provided on an AS IS basis and without warranty.      --
--  IN NO EVENT SHALL FREESCALE BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL     --
--  DAMAGES ARISING FROM USE OF THIS INFORMATION. THIS DISCLAIMER OF          --
--  WARRANTY EXTENDS TO THE USER OF THE INFORMATION, AND TO THEIR CUSTOMERS   --
--  OR USERS OF PRODUCTS  AND IS IN LIEU OF ALL WARRANTIES WHETHER EXPRESS,   --
--  IMPLIED, OR STATUTORY, INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY    --
--  OR FITNESS FOR PARTICULAR PURPOSE.                                        --
--                                                                            --
--  FREESCALE does not represent or warrant that the information furnished    --
--  hereunder is free of infringement of any third party patents,             --
--  copyrights, trade secrets, or other intellectual property rights.         --
--                                                                            --
--  FREESCALE does not represent or warrant that the information is free of   --
--  defect, or that it meets any particular standard, requirements or need    --
--  of the user of the infomation or their customers.                         --
--                                                                            --
--  FREESCALE reserves the right to change the information in this file       --
--  without notice. The BSDL files are also available at:                     --
--                                                                            --
--           http://www.freescale.com                                         --
--                                                                            --
--============================================================================--


entity MPC8545E is
  generic (PHYSICAL_PIN_MAP : string := "PBGA");

-- PORT DESCRIPTION TERMS
-- in         = input only
-- out        = three-state output (0, Z, 1)
-- buffer     = two-state output (0, 1)
-- inout      = bidirectional
-- linkage    = OTHER (vdd, vss, analog)
-- bit        = single pin
-- bit_vector = group of pins with suffix 0 to n

 port (
           TDI: 			in	bit;
           TDO:				out	bit;
           TMS:				in	bit;
           TCK:				in	bit;
           TRST_L:			in	bit;

           LSSD_MODE_L:			in	bit;
           TEST_SEL_L:			in	bit;

           ASLEEP:			inout	bit;
           CFG_DRAM_TYPE0:              inout   bit;
           CFG_DRAM_TYPE1:		inout	bit;
           CKSTP_IN_L:			in	bit;
           CKSTP_OUT_L:			out	bit;
           CLK_OUT:			out	bit;
           DMA_DACK_L:			inout	bit_vector(0 to 1);
           DMA_DDONE_L:			out	bit_vector(0 to 1);
           DMA_DREQ_L:			in	bit_vector(0 to 1);
           EC_GTX_CLK125:		in	bit;
           EC_MDC:			inout	bit;
           EC_MDIO:			inout	bit;
           FIFO1_RXC2:			in	bit;
           FIFO1_TXC2:			out	bit;
           GPIN:			in	bit_vector(0 to 7);
           GPOUT:			out	bit_vector(24 to 31);
           GPOUT_0:                     inout	bit;
           GPOUT_1:                     inout	bit;
           GPOUT_2:                     inout	bit;
           GPOUT_3:                     inout	bit;
           GPOUT_4:                     inout	bit;
           GPOUT_5:                     inout	bit;
           GPOUT_7:                     inout   bit;
           HRESET_L:			in	bit;
           HRESET_REQ_L:		inout	bit;
           IIC1_SCL:			inout	bit;
           IIC1_SDA:			inout	bit;
           IIC2_SCL:			inout	bit;
           IIC2_SDA:			inout	bit;
           IRQ:				in	bit_vector(0 to 7);
           IRQ_10:			inout	bit;
           IRQ_11:			inout	bit;
           IRQ_8:			inout	bit;
           IRQ_9:			in	bit;
           IRQ_OUT_L:			out	bit;
           L1_TSTCLK:			in	bit;
           L2_TSTCLK:			in	bit;
           LA:				inout	bit_vector(27 to 31);		
           LAD:				inout	bit_vector(0 to 31); 
           LALE:			inout	bit;
           LBCTL:			inout	bit;
           LCKE:			out	bit;
           LCLK:			out	bit_vector(0 to 2);
           LCS_L:			out	bit_vector(0 to 4);
           LCS_L_5:			inout	bit;
           LCS_L_6:			out	bit;
           LCS_L_7:			out	bit;
           LDP:				inout	bit_vector(0 to 3);
           LGPL0:			inout	bit;
           LGPL1:			inout	bit;
           LGPL2:			inout	bit;
           LGPL3:			inout	bit;
           LGPL4:			inout	bit;
           LGPL5:			inout	bit;
           LSYNC_IN:			in	bit;
           LSYNC_OUT:			out	bit;
           LWE_L:			inout	bit_vector(0 to 3);
           MA:				inout	bit_vector(0 to 14);
           MA_15:			out	bit;
           MBA:				inout	bit_vector(0 to 2);
           MCAS_L:			inout	bit;
           MCK:				out	bit_vector(0 to 5);
           MCKE:			out	bit_vector(1 to 3);
           MCKE_0:			inout	bit;	
           MCK_L:			out	bit_vector(0 to 5);
           MCP_L:			in	bit;
           MCS_L:			inout	bit_vector(0 to 3);
           MDIC:			inout	bit_vector(0 to 1);
           MDM:            		inout	bit_vector(0 to 8);
           MDQ:				inout	bit_vector(0 to 63);
           MDQS:           		inout	bit_vector(0 to 8);
           MDQS_L:			inout	bit_vector(0 to 8);
           MDVAL:			out	bit;
           MECC:			inout	bit_vector(0 to 7);
           MODT:			out	bit_vector(0 to 3);
           MRAS_L:			inout	bit;
           MSRCID:			inout	bit_vector(0 to 4);
           MWE_L:			inout	bit;
           PCI1_AD:			inout	bit_vector(31 downto 0); 
           PCI1_CLK:			in	bit;
           PCI1_C_BE_L:			inout	bit_vector(3 downto 0);
           PCI1_DEVSEL_L:		inout	bit;
           PCI1_FRAME_L:		inout	bit;
           PCI1_GNT_L:			inout	bit_vector(4 downto 0);
           PCI1_IDSEL:			in	bit;
           PCI1_IRDY_L:			inout	bit;
           PCI1_PAR:			inout	bit;
           PCI1_PERR_L:			inout	bit;
           PCI1_REQ_L:			in	bit_vector(1 to 4);
           PCI1_REQ_L_0:		inout	bit;
           PCI1_SERR_L:			inout	bit;
           PCI1_STOP_L:			inout	bit;
           PCI1_TRDY_L:			inout	bit;
           PCI2_AD:			inout	bit_vector(31 downto 0);
           PCI2_CLK:			in	bit;
           PCI2_C_BE_L:			inout	bit_vector(3 downto 0);
           PCI2_DEVSEL_L:		inout	bit;
           PCI2_FRAME_L:		inout	bit;
           PCI2_GNT_L:			inout	bit_vector(4 downto 0);
           PCI2_IRDY_L:			inout	bit;
           PCI2_PAR:			inout	bit;
           PCI2_PERR_L:			inout	bit;
           PCI2_REQ_L:			in	bit_vector(4 downto 1);
           PCI2_REQ_L_0:		inout	bit;
           PCI2_SERR_L:			inout	bit;
           PCI2_STOP_L:			inout	bit;
           PCI2_TRDY_L:			inout	bit;
           RTC:				in	bit;
           SD_PLL_TPD:  	       	out 	bit;
           SD_REF_CLK:  	       	in 	bit;
           SD_REF_CLK_L:  	       	in 	bit;
	   SD_RX:	       		in      bit_vector(3 downto 0);
           SD_RX_L:			in      bit_vector(3 downto 0);
           SD_TX: 	       		out 	bit_vector(3 downto 0);
           SD_TX_L:			out	bit_vector(3 downto 0);
           SRESET_L:			in	bit;
           SYSCLK:			in	bit;
           TRIG_IN:			in	bit;
           TRIG_OUT:			inout	bit;
           TSEC1_COL:			in	bit;
           TSEC1_CRS:			inout	bit;
           TSEC1_GTX_CLK:		out	bit;
           TSEC1_RXD:			in	bit_vector(7 downto 0);
           TSEC1_RX_CLK:		in	bit;
           TSEC1_RX_DV:			in	bit;
           TSEC1_RX_ER:			in	bit;
           TSEC1_TXD:			inout	bit_vector(7 downto 0);
           TSEC1_TX_CLK:		in	bit;
           TSEC1_TX_EN:			out	bit;
           TSEC1_TX_ER:			out	bit;
           TSEC3_COL:		        in	bit;
           TSEC3_CRS:			inout	bit;
           TSEC3_GTX_CLK:		out	bit;
           TSEC3_RXD:			in	bit_vector(7 downto 0);
           TSEC3_RX_CLK:		in	bit;
           TSEC3_RX_DV:			in	bit;
           TSEC3_RX_ER:			in	bit;
           TSEC3_TXD:			inout	bit_vector(7 downto 0);
           TSEC3_TX_CLK:		in	bit;
           TSEC3_TX_EN:			out	bit;
           TSEC3_TX_ER:			out	bit;
           UART_CTS_L:			in	bit_vector(0 to 1);
           UART_RTS_L:			out	bit_vector(0 to 1);
           UART_SIN:			in	bit_vector(0 to 1);
           UART_SOUT:			out	bit_vector(0 to 1);
           UDE_L:			in	bit;

           RESERVED1:                   in      bit;
           RESERVED2:                   inout	bit;
           RESERVED3:                   out     bit;
           RESERVED4:                   in      bit;
           RESERVED5:                   in      bit;
           RESERVED6:                   in      bit;
           RESERVED7:                   out     bit;
           RESERVED8:                   in      bit;
           RESERVED9:                   in      bit;
           RESERVED10:                  in      bit;
           RESERVED11:                  in      bit;
           RESERVED12:                  in      bit;
           RESERVED13:                  in      bit;
           RESERVED14:                  in      bit;
           RESERVED15:                  in      bit;
           RESERVED16:                  out     bit;
           RESERVED17:                  out     bit;
           RESERVED18:                  out     bit;
           RESERVED19:                  out     bit;
           RESERVED20:                  out     bit;
           RESERVED21:                  out     bit;
           RESERVED22:                  out     bit;
           RESERVED23:                  out     bit; 
            

-- Linkage pins
    
           MVREF:			linkage	bit;
           THERM0:			linkage	bit;
           THERM1:			linkage	bit;
           SD_IMP_CAL_RX:         	linkage bit;
           SD_IMP_CAL_TX:         	linkage bit;
           SD_PLL_TPA_ANA:        	linkage bit;
           AVDD_CORE: 			linkage bit;
	   AVDD_LBIU: 			linkage bit;
	   AVDD_PCI1: 			linkage bit;
	   AVDD_PCI2: 			linkage bit;
	   AVDD_PLAT: 			linkage bit;
	   AVDD_SRDS: 			linkage bit;
           BVDD:      			linkage bit_vector(0 to 8);
           GND:                         linkage bit_vector(0 to 128);
           GVDD:                        linkage bit_vector(0 to 33);
           LVDD:      			linkage bit_vector(0 to 3);
	   OVDD:      			linkage bit_vector(0 to 23);
           SENSEVDD:			linkage bit;
           SENSEVSS:                    linkage bit;
	   SVDD:      			linkage bit_vector(0 to 15);
           TVDD:      			linkage bit_vector(0 to 1);
 	   VDD:	      			linkage bit_vector(0 to 24);
	   XVDD:      			linkage bit_vector(0 to 9);

	   NC:				linkage bit_vector(0 to 9)
);

  use STD_1149_1_2001.all;

  attribute COMPONENT_CONFORMANCE of MPC8545E : entity is  "STD_1149_1_2001";

  attribute PIN_MAP of MPC8545E : entity is PHYSICAL_PIN_MAP;

  constant PBGA:   PIN_MAP_STRING :=

"ASLEEP:               AH18,"&
"CFG_DRAM_TYPE0:       R8,"&
"CFG_DRAM_TYPE1:       R10,"&
"CKSTP_IN_L:           AA9,"&
"CKSTP_OUT_L:          AA8,"&
"CLK_OUT:              AE21,"&
"DMA_DACK_L:          (AD3, AE1),"&
"DMA_DDONE_L:         (AD2, AD1),"&
"DMA_DREQ_L:          (AD4, AE2),"&
"EC_GTX_CLK125:        V11,"&
"EC_MDC:               AB9,"&
"EC_MDIO:              AC8,"&
"FIFO1_RXC2:           P5,"&
"FIFO1_TXC2:           P7,"&
"GPIN:                (P2, R2, N1, N2, P3, M2, M1, N3),"&
"GPOUT:               (K26, K25, H27, G28, H25, J26, K24, K23),"&
"GPOUT_0:              N9,"&
"GPOUT_1:              N10,"&
"GPOUT_2:              P8,"&
"GPOUT_3:              N7,"&
"GPOUT_4:              R9,"&
"GPOUT_5:              N5,"&
"GPOUT_7:              N6,"&
"HRESET_L:             AG17,"&
"HRESET_REQ_L:         AG16,"&
"IIC1_SCL:             AG22,"&
"IIC1_SDA:             AG21,"&
"IIC2_SCL:             AG15,"&
"IIC2_SDA:             AG14,"&
"IRQ:                 (AG23, AF18, AE18, AF20, AG18, AF17, AH24, AE20),"&
"IRQ_10:               AE19,"&
"IRQ_11:               AD20,"&
"IRQ_8:                AF19,"&
"IRQ_9:                AF21,"&
"IRQ_OUT_L:            AD18,"&
"L1_TSTCLK:            AC25,"&
"L2_TSTCLK:            AE22,"&
"LA:                  (H21, H20, A27, D26, A28),"&
"LAD:                 (E27, B20, H19, F25, A20, C19, E28, J23, A25, K22,"&
"                      B28, D27, D19, J22, K20, D28, D25, B25, E22, F22,"&
"                      F21, C25, C22, B23, F20, A23, A22, E19, A21, D21,"&
"                      F19, B21),"&
"LALE:                 H24,"&
"LBCTL:                G27,"&
"LCKE:                 E24,"&
"LCLK:                (E23, D24, H22),"&
"LCS_L:               (J25, C20, J24, G26, A26),"&
"LCS_L_5:              D23,"&
"LCS_L_6:              G20,"&
"LCS_L_7:              E21,"&
"LDP:                 (K21, C28, B26, B22),"&
"LGPL0:                F23,"&
"LGPL1:                G22,"&
"LGPL2:                B27,"&
"LGPL3:                F24,"&
"LGPL4:                H23,"&
"LGPL5:                E26,"&
"LSSD_MODE_L:          AH20,"&
"LSYNC_IN:             F27,"&
"LSYNC_OUT:            F28,"&
"LWE_L:               (G25, C23, J21, A24),"&
"MA:                  (A8, F9, D9, B9, A9, L10, M10, H10, K10,"&
"                      G10, B8, E10, B10, G6, A10),"&
"MA_15:                L11,"&
"MBA:                 (F7, J7, M11),"&
"MCAS_L:               H7,"&
"MCK:                 (H9, B15, G2, M9, A14, F1),"&  
"MCKE_0:               F10,"&
"MCKE:                (C10, J11, H11),"&
"MCK_L:               (J9, A15, G1, L9, B14, F2),"&  
"MCP_L:                AG19,"&
"MCS_L:               (K8, J8, G8, F8),"&
"MDIC:	              (A19, B19),"&
"MDM:                 (M17, C16, K17, E16, B6, C4, H4, K1, E13),"&
"MDQ:                 (L18, J18, K14, L13, L19, M18, L15, L14, A17, B17,"&
"                      A13, B12, C18, B18, B13, A12, H18, F18, J14, F15,"&
"                      K19, J19, H16, K15, D17, G16, K13, D14, D18, F17,"&
"                      F14, E14, A7,  A6,  D5,  A4,  C8,  D7,  B5,  B4,"& 
"                      A2,  B1,  D1,  E4,  A3,  B2,  D2,  E3,  F3,  G4,"&
"                      J5,  K5,  F6,  G5,  J6,  K4,  J1,  K2,  M5,  M3,"&
"                      J3,  J2,  L1,  M6),"& 
"MDQS:                (M15, A16, G17, G14, A5,  D3,  H1,  L2,  C13),"&
"MDQS_L:              (L17, B16, J16, H14, C6,  C2,  H3,  L4,  D13),"&
"MDVAL:                AE5,"&
"MECC:                (H13, F13, F11, C11, J13, G13, D12, M12),"&
"MODT:                (E6,  K6,  L7, M7),"&
"MRAS_L:               L8,"&
"MSRCID:              (AE4, AG2, AF3, AF1, AF2),"&
"MVREF:                A18,"&
"MWE_L:                E7,"&
"PCI1_AD:             (AH6,  AE7,  AF7,  AG7,  AH7,  AF8,  AH8,  AE9,  AH9, "&
"                      AC10, AB10, AD10, AG10, AA10, AH10, AA11, AB12, AE12,"&
"                      AG12, AH12, AB13, AA12, AC13, AE13, Y14,  W13,  AG13,"&
"                      V14,  AH13, AC14, Y15,  AB15),"&
"PCI1_C_BE_L:         (AF9,  AD11, Y12,  Y13),"& 
"PCI1_CLK:             AH26,"&
"PCI1_DEVSEL_L:        AH11,"&
"PCI1_FRAME_L:         AE11,"&
"PCI1_GNT_L:          (AG6, AE6, AF5, AH5, AG5),"&
"PCI1_IDSEL:           AG9,"&
"PCI1_IRDY_L:          AF11,"&
"PCI1_PAR:             AD12,"&
"PCI1_PERR_L:          AC12,"&
"PCI1_REQ_L:          (AH4, AG3, AG4, AH2),"&
"PCI1_REQ_L_0:         AH3,"&
"PCI1_SERR_L:          V13,"&
"PCI1_STOP_L:          W12,"&
"PCI1_TRDY_L:          AG11,"&
"PCI2_AD:             (AB14, AC15, AA15, Y16,  W16,  AB16, AC16, AA16,"&
"		       AE17, AA18, W18,  AC17, AD16, AE16, Y17,  AC18,"&
"		       AB18, AA19, AB19, AB21, AA20, AC20, AB20, AB22,"&
"		       AC22, AD21, AB23, AF23, AD23, AE23, AC23, AC24),"&
"PCI2_C_BE_L:         (AF15, AD14, AE15, AD15),"&
"PCI2_CLK:             AE28,"&
"PCI2_DEVSEL_L:        V15,"&
"PCI2_FRAME_L:         AF14,"&
"PCI2_GNT_L:          (AE26, AG24, AF25, AE25, AG25),"&
"PCI2_IRDY_L:          AD26,"&
"PCI2_PAR:             W15,"&
"PCI2_PERR_L:          AD25,"&
"PCI2_REQ_L:          (AD28, AE27, W17, AF26),"&
"PCI2_REQ_L_0:         AH25,"&
"PCI2_SERR_L:          AD24,"&
"PCI2_STOP_L:          AF24,"&
"PCI2_TRDY_L:          AD27,"&
"RTC:                  AF16,"&
"SD_IMP_CAL_RX:        L28,"& 
"SD_IMP_CAL_TX:        AB26,"&
"SD_PLL_TPA_ANA:       U26,"&
"SD_PLL_TPD:  	       U28,"&
"SD_RX:	              (R26, P28, N26, M28),"&
"SD_RX_L:	      (R25, P27, N25, M27),"&
"SD_REF_CLK:  	       T28,"&
"SD_REF_CLK_L:         T27,"&
"SD_TX_L: 	      (R21, P23, N21, M23),"&
"SD_TX: 	      (R20, P22, N20, M22),"&
"SRESET_L:             AG20,"&
"SYSCLK:               AH17,"&
"TCK:	               AG28,"&
"TDI:	               AH28,"&
"TDO:	               AF28,"&
"TEST_SEL_L:           AH14,"&
"THERM0:               AG1,"&
"THERM1:               AH1,"&
"TMS:                  AH27,"&
"TRIG_IN:              AB2,"&
"TRIG_OUT:             AB1,"&
"TRST_L:               AH23,"&
"TSEC1_COL:            R4,"&
"TSEC1_CRS:            V5,"&
"TSEC1_GTX_CLK:        U7,"&
"TSEC1_RX_CLK:         U3,"&
"TSEC1_RX_DV:          V2,"&
"TSEC1_RX_ER:          T1,"&
"TSEC1_RXD:           (R5, U1, R3, U2, V3, V1, T3, T2),"&
"TSEC1_TX_CLK:         T6,"&
"TSEC1_TX_EN:          U9,"&
"TSEC1_TX_ER:          T7,"&
"TSEC1_TXD:           (T10, V7, U10, U5, U4, V6, T5, T8),"&
"TSEC3_COL:            Y5,"&
"TSEC3_CRS:            AA3,"&
"TSEC3_GTX_CLK:        W8,"&
"TSEC3_RX_CLK:         W2,"&
"TSEC3_RX_DV:          W1,"&
"TSEC3_RX_ER:          Y2,"&
"TSEC3_RXD:           (AA1, Y3, AA2, AA4, Y1, W3, W5, W4),"&
"TSEC3_TX_CLK:         V10,"&
"TSEC3_TX_EN:          V9,"&
"TSEC3_TX_ER:          AB6,"&
"TSEC3_TXD:           (AB8, Y7, AA7, Y8, V8, W10, Y10, W7),"&
"UART_CTS_L:          (AB3, AC5),"&
"UART_RTS_L:          (AC6, AD7),"&
"UART_SIN:            (AB5, AC7),"&
"UART_SOUT:           (AB7, AD8),"&
"UDE_L:                AH16,"&

"RESERVED1:	       P1,"&
"RESERVED2:            R6,"&
"RESERVED3:            P6,"&
"RESERVED4:            N4,"&
"RESERVED5:            R1,"&
"RESERVED6:            P10,"&
"RESERVED7:            AA5,"&
"RESERVED8:            W26,"&  
"RESERVED9:            Y28,"&  
"RESERVED10:           AA26,"&  
"RESERVED11:           AB28,"&    
"RESERVED12:           W25,"&                      
"RESERVED13:           Y27,"&                      
"RESERVED14:           AA25,"&                      
"RESERVED15:           AB27,"&                      

"RESERVED16:           Y22,"&                
"RESERVED17:           W20,"&
"RESERVED18:           V22,"&
"RESERVED19:           U20,"&

"RESERVED20:           Y23,"&
"RESERVED21:	       W21,"&
"RESERVED22:	       V23,"&
"RESERVED23:	       U21,"&

"AVDD_CORE:            AH15,"&
"AVDD_LBIU:            J28,"&
"AVDD_PCI1:            AH21,"&
"AVDD_PCI2:            AH22,"&
"AVDD_PLAT:            AH19,"&
"AVDD_SRDS:            U25,"&
"BVDD:                (C21, C24, C27, E20, E25, G19, G23, H26, J20),"&
"GND:                 (A11, B7, B24, C1, C3, C5, C12, C15, C26, D8,"&   
"                      D11, D16, D20, D22, E1, E5, E9, E12, E15, E17,"&  
"                      F4, F26, G12, G15, G18, G21, G24, H2, H6, H8,"&   
"                      H28, J4, J12, J15, J17, J27, K7, K9, K11, K27,"&  
"                      L3, L5, L12, L16, N11, N13, N15, N17, N19, P4,"&   
"                      P9, P12, P14, P16, P18, R11, R13, R15, R17, R19,"&  
"                      T4, T12, T14, T16, T18, U8, U11, U13, U15, U17,"&  
"                      U19, V4, V12, V18, W6, W19, Y4, Y9, Y11, Y19,"&  
"                      AA6, AA14, AA17, AA22, AA23, AB4, AC2, AC11, AC19,"& 
"                      AC26, AD5, AD9, AD22, AE3, AE14, AF6, AF10 , AF13,"& 
"                      AG8, AG27,"& 
"                      K28, L24, L26, N24, N27, P25, R28, T24, T26, U24,"& 
"                      V25, W28, Y24, Y26, AA24, AA27, AB25, AC28,"&
"                      L21, L23, N22, P20, R23, T21, U22, V20, W23, Y21, U27),"&
"GVDD:                (B3, B11, C7, C9, C14, C17, D4, D6, D10, D15,"&
"                      E2, E8, E11, E18, F5, F12, F16, G3, G7, G9,"&
"                      G11, H5, H12, H15, H17, J10, K3, K12, K16, K18,"&
"                      L6, M4, M8, M13),"&
"LVDD:                (N8, R7, T9, U6),"&     
"OVDD:                (V16, W11, W14, Y18, AA13, AA21, AB11, AB17, AB24,"&
"                      AC4, AC9, AC21, AD6, AD13, AD17, AD19, AE8, AE10,"&
"                      AE24, AF4, AF12, AF22, AF27, AG26),"&
"SENSEVDD:             M14,"&
"SENSEVSS:             M16,"&
"SVDD:                (L25, L27, M24, N28, P24, P26, R24, R27, T25, V24,"&
"                      V26, W24, W27, Y25, AA28, AC27),"&
"TVDD:                (W9, Y6),"&   
"VDD:                 (M19, N12, N14, N16, N18, P11, P13, P15, P17, P19,"&
"                      R12, R14, R16, R18, T11, T13, T15, T17, T19, U12,"&
"                      U14, U16, U18, V17, V19),"&
"XVDD:                (L20, L22, N23, P21, R22, T20, U23, V21, W22, Y20),"&
"NC:                  (T22, T23, M20, M21, M26, M25, V28, V27, AC1, AC3)";

    attribute PORT_GROUPING of MPC8545E : entity is
    "Differential_Voltage ("&
                          "(SD_RX(0), SD_RX_L(0)),"&
		          "(SD_RX(1), SD_RX_L(1)),"&	   
		          "(SD_RX(2), SD_RX_L(2)),"&	   
		          "(SD_RX(3), SD_RX_L(3)),"&	   
		          "(RESERVED8, RESERVED12),"&	   
		          "(RESERVED9, RESERVED13),"&	   
		          "(RESERVED10, RESERVED14),"&	   
		          "(RESERVED11, RESERVED15),"&         
                          "(SD_TX(0), SD_TX_L(0)),"&
                          "(SD_TX(1), SD_TX_L(1)),"&
                          "(SD_TX(2), SD_TX_L(2)),"&
                          "(SD_TX(3), SD_TX_L(3)),"&
                          "(RESERVED19, RESERVED23),"&
                          "(RESERVED18, RESERVED22),"&
                          "(RESERVED17, RESERVED21),"&
                          "(RESERVED16, RESERVED20),"&
                          "(SD_REF_CLK, SD_REF_CLK_L))";

  attribute TAP_SCAN_IN    of TDI   : signal is true;
  attribute TAP_SCAN_MODE  of TMS   : signal is true;
  attribute TAP_SCAN_OUT   of TDO   : signal is true;
  attribute TAP_SCAN_CLOCK of TCK   : signal is (30.0e6, BOTH);
  attribute TAP_SCAN_RESET of TRST_L : signal is true;

  attribute COMPLIANCE_PATTERNS of MPC8545E : entity is
       "(LSSD_MODE_L, TEST_SEL_L, HRESET_L) (110)";

  attribute INSTRUCTION_LENGTH of MPC8545E : entity is 8;

  attribute INSTRUCTION_OPCODE of MPC8545E : entity is 
-- Public instructions:
       "EXTEST          (00000000), "&     -- Hex 00
       "SAMPLE          (11110000), "&     -- Hex F0
       "PRELOAD         (11110000), "&     -- Hex F0
       "BYPASS          (11111111), "&     -- Hex FF
       "HIGHZ           (11110010), "&     -- Hex F2
       "IDCODE          (11110011), "&     -- Hex F3
       "CLAMP           (11110001), "&     -- Hex F1

-- Private instructions:
        "PRIVATE000(11111110), "&   -- Hex FE
        "PRIVATE001(00000101), "&   -- Hex 05
        "PRIVATE002(00000110), "&   -- Hex 06
        "PRIVATE003(00000111), "&   -- Hex 07
        "PRIVATE004(00000011), "&   -- Hex 03
        "PRIVATE005(00000100), "&   -- Hex 04
        "PRIVATE006(00110000), "&   -- Hex 30
        "PRIVATE007(00001010), "&   -- Hex 0A
        "PRIVATE008(00111000), "&   -- Hex 38        
        "PRIVATE009(00110100), "&   -- Hex 34        
        "PRIVATE010(00110101), "&   -- Hex 35
        "PRIVATE011(00110110), "&   -- Hex 36
        "PRIVATE012(00110111), "&   -- Hex 37
        "PRIVATE013(01000100), "&   -- Hex 44
        "PRIVATE014(00001001), "&   -- Hex 09
        "PRIVATE015(00001011), "&   -- Hex 0B
        "PRIVATE016(00001100), "&   -- Hex 0C
        "PRIVATE017(00001110), "&   -- Hex 0E
        "PRIVATE018(00010000), "&   -- Hex 10
        "PRIVATE019(00010001), "&   -- Hex 11
        "PRIVATE020(00010010), "&   -- Hex 12
        "PRIVATE021(00010011), "&   -- Hex 13
        "PRIVATE022(00010100)  ";   -- Hex 14

                                    
  attribute INSTRUCTION_CAPTURE of MPC8545E : entity is "xxxxxx01";
                                                
-- Use of some private opcodes can result in damage to the circuit,
-- board, or system.
  attribute INSTRUCTION_PRIVATE of MPC8545E : entity is
        "PRIVATE000, PRIVATE001, PRIVATE002, PRIVATE003, "& 
        "PRIVATE004, PRIVATE005, PRIVATE006, PRIVATE007, "& 
        "PRIVATE008, PRIVATE009, PRIVATE010, PRIVATE011, "& 
        "PRIVATE012, PRIVATE013, PRIVATE014, PRIVATE015, "& 
        "PRIVATE016, PRIVATE017, PRIVATE018, PRIVATE019, "& 
        "PRIVATE020, PRIVATE021, PRIVATE022"; 

  attribute IDCODE_REGISTER of MPC8545E : entity is
      "0000" &              -- Version
      "0000000000111001" &  -- Part number
      "00000001110" &       -- Manufacturer Identity
      "1";                  -- Mandatory LSB

  attribute REGISTER_ACCESS of MPC8545E : entity is
        "BYPASS(BYPASS),"&
        "BOUNDARY (SAMPLE)";
  attribute BOUNDARY_LENGTH of MPC8545E : entity is 769;

  attribute BOUNDARY_REGISTER of MPC8545E : entity is

-- PORT DESCRIPTION TERMS
-- cell type: BC_6 bidirectional else BC_2
-- port: port name with index if port description says bit_vector
-- function
--     input        = input only
--     bidir        = bidirectional
--     control      = control cell
--     buffer       = output only
--     output3      = three state ouput
--     observe_only = observe only
-- safe = value in control cell to make input = 0 for bidir and controlr
-- ccell = controlling cell number for I/O direction
-- dsval = disabling (input) value
-- rslt  = result if disabled (input = Z)

-- tdo = first cell shifted out during ShiftDR
-- num   cell            port          function    safe   ccell dsval rslt
  "0    (BC_6,     PCI2_REQ_L_0,          bidir,    0,       1,   0,   Z), "&
  "1    (BC_2,                *,        control,    0),                    "&
  "2    (BC_2,    PCI2_REQ_L(3),          input,    X),                    "&
  "3    (BC_2,    PCI2_REQ_L(1),          input,    X),                    "&
  "4    (BC_2,    PCI2_REQ_L(4),          input,    X),                    "&
  "5    (BC_6,    PCI2_GNT_L(3),          bidir,    0,       6,   0,   Z), "&
  "6    (BC_2,                *,        control,    0),                    "&
  "7    (BC_6,      PCI2_TRDY_L,          bidir,    0,       8,   0,   Z), "&
  "8    (BC_2,                *,        control,    0),                    "&
  "9    (BC_6,    PCI2_GNT_L(0),          bidir,    0,      10,   0,   Z), "&
  "10   (BC_2,                *,        control,    0),                    "&
  "11   (BC_6,    PCI2_GNT_L(2),          bidir,    0,      12,   0,   Z), "&
  "12   (BC_2,                *,        control,    0),                    "&
  "13   (BC_6,    PCI2_GNT_L(4),          bidir,    0,      14,   0,   Z), "&
  "14   (BC_2,                *,        control,    0),                    "&
  "15   (BC_6,    PCI2_GNT_L(1),          bidir,    0,      16,   0,   Z), "&
  "16   (BC_2,                *,        control,    0),                    "&
  "17   (BC_6,      PCI2_PERR_L,          bidir,    0,      18,   0,   Z), "&
  "18   (BC_2,                *,        control,    0),                    "&
  "19   (BC_6,      PCI2_IRDY_L,          bidir,    0,      20,   0,   Z), "&
  "20   (BC_2,                *,        control,    0),                    "&
  "21   (BC_6,      PCI2_SERR_L,          bidir,    0,      22,   0,   Z), "&
  "22   (BC_2,                *,        control,    0),                    "&
  "23   (BC_6,      PCI2_STOP_L,          bidir,    0,      24,   0,   Z), "&
  "24   (BC_2,                *,        control,    0),                    "&
  "25   (BC_6,       PCI2_AD(3),          bidir,    0,      27,   0,   Z), "&
  "26   (BC_6,       PCI2_AD(5),          bidir,    0,      27,   0,   Z), "&
  "27   (BC_2,                *,        control,    0),                    "&
  "28   (BC_6,       PCI2_AD(0),          bidir,    0,      27,   0,   Z), "&
  "29   (BC_6,       PCI2_AD(1),          bidir,    0,      37,   0,   Z), "&
  "30   (BC_6,       PCI2_AD(2),          bidir,    0,      37,   0,   Z), "&
  "31   (BC_6,      PCI2_AD(12),          bidir,    0,      32,   0,   Z), "&
  "32   (BC_2,                *,        control,    0),                    "&
  "33   (BC_6,       PCI2_AD(7),          bidir,    0,      37,   0,   Z), "&
  "34   (BC_6,      PCI2_AD(13),          bidir,    0,      35,   0,   Z), "&
  "35   (BC_2,                *,        control,    0),                    "&
  "36   (BC_6,       PCI2_AD(6),          bidir,    0,      37,   0,   Z), "&
  "37   (BC_2,                *,        control,    0),                    "&
  "38   (BC_2,          CLK_OUT,        output3,    0,      39,   0,   Z), "&
  "39   (BC_2,                *,        control,    0),                    "&
  "40   (BC_2,        L1_TSTCLK,          input,    X),                    "&
  "41   (BC_6,      PCI2_AD(11),          bidir,    0,      32,   0,   Z), "&
  "42   (BC_6,      PCI2_AD(10),          bidir,    0,      32,   0,   Z), "&
  "43   (BC_6,       PCI2_AD(8),          bidir,    0,      44,   0,   Z), "&
  "44   (BC_2,                *,        control,    0),                    "&
  "45   (BC_6,         IIC1_SCL,          bidir,    0,      46,   0,   Z), "&
  "46   (BC_2,                *,        control,    0),                    "&
  "47   (BC_6,         IIC1_SDA,          bidir,    0,      48,   0,   Z), "&
  "48   (BC_2,                *,        control,    0),                    "&
  "49   (BC_2,           IRQ(6),          input,    X),                    "&
  "50   (BC_2,           IRQ(0),          input,    X),                    "&
  "51   (BC_2,           IRQ(7),          input,    X),                    "&
  "52   (BC_2,           IRQ(3),          input,    X),                    "&
  "53   (BC_2,        L2_TSTCLK,          input,    X),                    "&
  "54   (BC_2,         PCI2_CLK,          input,    X),                    "&
  "55   (BC_6,           IRQ_10,          bidir,    0,      56,   0,   Z), "&
  "56   (BC_2,                *,        control,    0),                    "&
  "57   (BC_2,            IRQ_9,          input,    X),                    "&
  "58   (BC_6,            IRQ_8,          bidir,    0,      59,   0,   Z), "&
  "59   (BC_2,                *,        control,    0),                    "&
  "60   (BC_2,           IRQ(2),          input,    X),                    "&
  "61   (BC_2,        IRQ_OUT_L,        output3,    0,      62,   0,   Z), "&
  "62   (BC_2,                *,        control,    0),                    "&
  "63   (BC_6,           IRQ_11,          bidir,    0,      64,   0,   Z), "&
  "64   (BC_2,                *,        control,    0),                    "&
  "65   (BC_2,         SRESET_L,          input,    X),                    "&
  "66   (BC_2,         PCI1_CLK,          input,    X),                    "&
  "67   (BC_2,           IRQ(5),          input,    X),                    "&
  "68   (BC_2,           IRQ(1),          input,    X),                    "&
  "69   (BC_2,           IRQ(4),          input,    X),                    "&
  "70   (BC_6,           ASLEEP,          bidir,    0,      71,   0,   Z), "&
  "71   (BC_2,                *,        control,    0),                    "&
  "72   (BC_2,            MCP_L,          input,    X),                    "&
  "73   (BC_2,    PCI2_REQ_L(2),          input,    X),                    "&
  "74   (BC_2,           SYSCLK,          input,    X),                    "&
  "75   (BC_2,                *,       internal,    X),                    "&
  "76   (BC_6,     HRESET_REQ_L,          bidir,    0,      77,   0,   Z), "&
  "77   (BC_2,                *,        control,    0),                    "&
  "78   (BC_6,      PCI2_AD(22),          bidir,    0,      89,   0,   Z), "&
  "79   (BC_6,       PCI2_AD(9),          bidir,    0,      85,   0,   Z), "&
  "80   (BC_6,      PCI2_AD(23),          bidir,    0,      89,   0,   Z), "&
  "81   (BC_6,       PCI2_AD(4),          bidir,    0,      82,   0,   Z), "&
  "82   (BC_2,                *,        control,    0),                    "&
  "83   (BC_2,            UDE_L,          input,    X),                    "&
  "84   (BC_6,      PCI2_AD(15),          bidir,    0,      85,   0,   Z), "&
  "85   (BC_2,                *,        control,    0),                    "&
  "86   (BC_6,      PCI2_AD(19),          bidir,    0,      93,   0,   Z), "&
  "87   (BC_6,      PCI2_AD(21),          bidir,    0,      89,   0,   Z), "&
  "88   (BC_6,      PCI2_AD(20),          bidir,    0,      89,   0,   Z), "&
  "89   (BC_2,                *,        control,    0),                    "&
  "90   (BC_6,      PCI2_AD(26),          bidir,    0,      98,   0,   Z), "&
  "91   (BC_6,      PCI2_AD(27),          bidir,    0,      93,   0,   Z), "&
  "92   (BC_6,      PCI2_AD(16),          bidir,    0,      93,   0,   Z), "&
  "93   (BC_2,                *,        control,    0),                    "&
  "94   (BC_6,      PCI2_AD(17),          bidir,    0,      93,   0,   Z), "&
  "95   (BC_6,      PCI2_AD(18),          bidir,    0,      98,   0,   Z), "&
  "96   (BC_6,      PCI2_AD(30),          bidir,    0,     101,   0,   Z), "&
  "97   (BC_6,      PCI2_AD(31),          bidir,    0,      98,   0,   Z), "&
  "98   (BC_2,                *,        control,    0),                    "&
  "99   (BC_6,      PCI2_AD(25),          bidir,    0,      98,   0,   Z), "&
  "100  (BC_6,      PCI2_AD(24),          bidir,    0,     101,   0,   Z), "&
  "101  (BC_2,                *,        control,    0),                    "&
  "102  (BC_6,   PCI2_C_BE_L(0),          bidir,    0,     113,   0,   Z), "&
  "103  (BC_6,         PCI2_PAR,          bidir,    0,     104,   0,   Z), "&
  "104  (BC_2,                *,        control,    0),                    "&
  "105  (BC_6,      PCI2_AD(29),          bidir,    0,     101,   0,   Z), "&
  "106  (BC_6,      PCI2_AD(28),          bidir,    0,     101,   0,   Z), "&
  "107  (BC_6,   PCI2_C_BE_L(1),          bidir,    0,     113,   0,   Z), "&
  "108  (BC_6,     PCI2_FRAME_L,          bidir,    0,     109,   0,   Z), "&
  "109  (BC_2,                *,        control,    0),                    "&
  "110  (BC_6,    PCI2_DEVSEL_L,          bidir,    0,     111,   0,   Z), "&
  "111  (BC_2,                *,        control,    0),                    "&
  "112  (BC_6,   PCI2_C_BE_L(2),          bidir,    0,     113,   0,   Z), "&
  "113  (BC_2,                *,        control,    0),                    "&
  "114  (BC_6,       PCI1_AD(4),          bidir,    0,     115,   0,   Z), "&
  "115  (BC_2,                *,        control,    0),                    "&
  "116  (BC_6,       PCI1_AD(6),          bidir,    0,     115,   0,   Z), "&
  "117  (BC_6,       PCI1_AD(7),          bidir,    0,     115,   0,   Z), "&
  "118  (BC_6,      PCI2_AD(14),          bidir,    0,     119,   0,   Z), "&
  "119  (BC_2,                *,        control,    0),                    "&
  "120  (BC_2,              RTC,          input,    X),                    "&
  "121  (BC_6,   PCI2_C_BE_L(3),          bidir,    0,     113,   0,   Z), "&
  "122  (BC_6,         IIC2_SCL,          bidir,    0,     123,   0,   Z), "&
  "123  (BC_2,                *,        control,    0),                    "&
  "124  (BC_6,         IIC2_SDA,          bidir,    0,     125,   0,   Z), "&
  "125  (BC_2,                *,        control,    0),                    "&
  "126  (BC_6,       PCI1_AD(1),          bidir,    0,     130,   0,   Z), "&
  "127  (BC_6,      PCI1_AD(12),          bidir,    0,     115,   0,   Z), "&
  "128  (BC_6,      PCI1_AD(13),          bidir,    0,     130,   0,   Z), "&
  "129  (BC_6,       PCI1_AD(0),          bidir,    0,     130,   0,   Z), "&
  "130  (BC_2,                *,        control,    0),                    "&
  "131  (BC_6,      PCI1_AD(14),          bidir,    0,     130,   0,   Z), "&
  "132  (BC_6,   PCI1_C_BE_L(1),          bidir,    0,     134,   0,   Z), "&
  "133  (BC_6,   PCI1_C_BE_L(0),          bidir,    0,     134,   0,   Z), "&
  "134  (BC_2,                *,        control,    0),                    "&
  "135  (BC_6,       PCI1_AD(5),          bidir,    0,     138,   0,   Z), "&
  "136  (BC_6,       PCI1_AD(2),          bidir,    0,     138,   0,   Z), "&
  "137  (BC_6,       PCI1_AD(8),          bidir,    0,     138,   0,   Z), "&
  "138  (BC_2,                *,        control,    0),                    "&
  "139  (BC_6,      PCI1_TRDY_L,          bidir,    0,     140,   0,   Z), "&
  "140  (BC_2,                *,        control,    0),                    "&
  "141  (BC_6,      PCI1_AD(15),          bidir,    0,     142,   0,   Z), "&
  "142  (BC_2,                *,        control,    0),                    "&
  "143  (BC_6,       PCI1_AD(3),          bidir,    0,     138,   0,   Z), "&
  "144  (BC_6,       PCI1_AD(9),          bidir,    0,     142,   0,   Z), "&
  "145  (BC_6,      PCI1_AD(11),          bidir,    0,     142,   0,   Z), "&
  "146  (BC_6,    PCI1_DEVSEL_L,          bidir,    0,     147,   0,   Z), "&
  "147  (BC_2,                *,        control,    0),                    "&
  "148  (BC_6,      PCI1_STOP_L,          bidir,    0,     149,   0,   Z), "&
  "149  (BC_2,                *,        control,    0),                    "&
  "150  (BC_6,      PCI1_AD(10),          bidir,    0,     142,   0,   Z), "&
  "151  (BC_6,      PCI1_AD(16),          bidir,    0,     152,   0,   Z), "&
  "152  (BC_2,                *,        control,    0),                    "&
  "153  (BC_6,      PCI1_PERR_L,          bidir,    0,     154,   0,   Z), "&
  "154  (BC_2,                *,        control,    0),                    "&
  "155  (BC_6,      PCI1_AD(17),          bidir,    0,     152,   0,   Z), "&
  "156  (BC_6,      PCI1_SERR_L,          bidir,    0,     157,   0,   Z), "&
  "157  (BC_2,                *,        control,    0),                    "&
  "158  (BC_6,      PCI1_IRDY_L,          bidir,    0,     159,   0,   Z), "&
  "159  (BC_2,                *,        control,    0),                    "&
  "160  (BC_6,         PCI1_PAR,          bidir,    0,     161,   0,   Z), "&
  "161  (BC_2,                *,        control,    0),                    "&
  "162  (BC_6,     PCI1_FRAME_L,          bidir,    0,     163,   0,   Z), "&
  "163  (BC_2,                *,        control,    0),                    "&
  "164  (BC_6,   PCI1_C_BE_L(2),          bidir,    0,     165,   0,   Z), "&
  "165  (BC_2,                *,        control,    0),                    "&
  "166  (BC_6,      PCI1_AD(22),          bidir,    0,     172,   0,   Z), "&
  "167  (BC_6,      PCI1_AD(21),          bidir,    0,     179,   0,   Z), "&
  "168  (BC_6,      PCI1_AD(18),          bidir,    0,     152,   0,   Z), "&
  "169  (BC_6,      PCI1_AD(19),          bidir,    0,     152,   0,   Z), "&
  "170  (BC_6,      PCI1_AD(20),          bidir,    0,     172,   0,   Z), "&
  "171  (BC_6,      PCI1_AD(23),          bidir,    0,     172,   0,   Z), "&
  "172  (BC_2,                *,        control,    0),                    "&
  "173  (BC_6,   PCI1_C_BE_L(3),          bidir,    0,     165,   0,   Z), "&
  "174  (BC_6,      PCI1_AD(24),          bidir,    0,     179,   0,   Z), "&
  "175  (BC_6,      PCI1_AD(25),          bidir,    0,     181,   0,   Z), "&
  "176  (BC_6,      PCI1_AD(26),          bidir,    0,     181,   0,   Z), "&
  "177  (BC_6,      PCI1_AD(27),          bidir,    0,     183,   0,   Z), "&
  "178  (BC_6,      PCI1_AD(28),          bidir,    0,     179,   0,   Z), "&
  "179  (BC_2,                *,        control,    0),                    "&
  "180  (BC_6,      PCI1_AD(29),          bidir,    0,     181,   0,   Z), "&
  "181  (BC_2,                *,        control,    0),                    "&
  "182  (BC_6,      PCI1_AD(30),          bidir,    0,     183,   0,   Z), "&
  "183  (BC_2,                *,        control,    0),                    "&
  "184  (BC_6,      PCI1_AD(31),          bidir,    0,     183,   0,   Z), "&
  "185  (BC_2,       PCI1_IDSEL,          input,    X),                    "&
  "186  (BC_6,    PCI1_GNT_L(0),          bidir,    0,     187,   0,   Z), "&
  "187  (BC_2,                *,        control,    0),                    "&
  "188  (BC_6,    PCI1_GNT_L(1),          bidir,    0,     189,   0,   Z), "&
  "189  (BC_2,                *,        control,    0),                    "&
  "190  (BC_6,    PCI1_GNT_L(2),          bidir,    0,     191,   0,   Z), "&
  "191  (BC_2,                *,        control,    0),                    "&
  "192  (BC_6,    PCI1_GNT_L(3),          bidir,    0,     193,   0,   Z), "&
  "193  (BC_2,                *,        control,    0),                    "&
  "194  (BC_6,    PCI1_GNT_L(4),          bidir,    0,     195,   0,   Z), "&
  "195  (BC_2,                *,        control,    0),                    "&
  "196  (BC_6,     PCI1_REQ_L_0,          bidir,    0,     197,   0,   Z), "&
  "197  (BC_2,                *,        control,    0),                    "&
  "198  (BC_2,    PCI1_REQ_L(1),          input,    X),                    "&
  "199  (BC_2,    PCI1_REQ_L(2),          input,    X),                    "&
  "200  (BC_2,    PCI1_REQ_L(3),          input,    X),                    "&
  "201  (BC_2,    PCI1_REQ_L(4),          input,    X),                    "&
  "202  (BC_6,           EC_MDC,          bidir,    0,     203,   0,   Z), "&
  "203  (BC_2,                *,        control,    0),                    "&
  "204  (BC_6,        MSRCID(3),          bidir,    0,     209,   0,   Z), "&
  "205  (BC_6,        MSRCID(0),          bidir,    0,     206,   0,   Z), "&
  "206  (BC_2,                *,        control,    0),                    "&
  "207  (BC_6,        MSRCID(1),          bidir,    0,     206,   0,   Z), "&
  "208  (BC_6,        MSRCID(2),          bidir,    0,     209,   0,   Z), "&
  "209  (BC_2,                *,        control,    0),                    "&
  "210  (BC_6,          EC_MDIO,          bidir,    0,     211,   0,   Z), "&
  "211  (BC_2,                *,        control,    0),                    "&
  "212  (BC_6,        MSRCID(4),          bidir,    0,     209,   0,   Z), "&
  "213  (BC_2,            MDVAL,        output3,    0,     214,   0,   Z), "&
  "214  (BC_2,                *,        control,    0),                    "&
  "215  (BC_2,    DMA_DREQ_L(0),          input,    X),                    "&
  "216  (BC_2,   DMA_DDONE_L(1),        output3,    0,     217,   0,   Z), "&
  "217  (BC_2,                *,        control,    0),                    "&
  "218  (BC_2,   DMA_DDONE_L(0),        output3,    0,     219,   0,   Z), "&
  "219  (BC_2,                *,        control,    0),                    "&
  "220  (BC_2,    DMA_DREQ_L(1),          input,    X),                    "&
  "221  (BC_2,      CKSTP_OUT_L,        output3,    0,     222,   0,   Z), "&
  "222  (BC_2,                *,        control,    0),                    "&
  "223  (BC_2,    UART_CTS_L(1),          input,    X),                    "&
  "224  (BC_2,       CKSTP_IN_L,          input,    X),                    "&
  "225  (BC_2,          TRIG_IN,          input,    X),                    "&
  "226  (BC_6,    DMA_DACK_L(0),          bidir,    0,     227,   0,   Z), "&
  "227  (BC_2,                *,        control,    0),                    "&
  "228  (BC_6,    DMA_DACK_L(1),          bidir,    0,     227,   0,   Z), "&
  "229  (BC_6,         TRIG_OUT,          bidir,    0,     230,   0,   Z), "&
  "230  (BC_2,                *,        control,    0),                    "&
  "231  (BC_2,     UART_SOUT(1),        output3,    0,     233,   0,   Z), "&
  "232  (BC_2,     UART_SOUT(0),        output3,    0,     233,   0,   Z), "&
  "233  (BC_2,                *,        control,    0),                    "&
  "234  (BC_2,    UART_RTS_L(0),        output3,    0,     235,   0,   Z), "&
  "235  (BC_2,                *,        control,    0),                    "&
  "236  (BC_2,      UART_SIN(1),          input,    X),                    "&
  "237  (BC_2,    UART_RTS_L(1),        output3,    0,     235,   0,   Z), "&
  "238  (BC_2,      UART_SIN(0),          input,    X),                    "&
  "239  (BC_2,    UART_CTS_L(0),          input,    X),                    "&
  "240  (BC_2,                *,       internal,    X),                    "&
  "241  (BC_2,                *,       internal,    X),                    "&
  "242  (BC_2,                *,       internal,    X),                    "&
  "243  (BC_2,                *,       internal,    X),                    "&
  "244  (BC_6,        TSEC3_CRS,          bidir,    0,     245,   0,   Z), "&
  "245  (BC_2,                *,        control,    0),                    "&
  "246  (BC_2,     TSEC3_RXD(4),          input,    X),                    "&
  "247  (BC_2,        TSEC3_COL,          input,    X),                    "&
  "248  (BC_2,     TSEC3_RXD(5),          input,    X),                    "&
  "249  (BC_2,     TSEC3_RXD(6),          input,    X),                    "&
  "250  (BC_2,      TSEC3_TX_ER,        output3,    0,     251,   0,   Z), "&
  "251  (BC_2,                *,        control,    0),                    "&
  "252  (BC_2,        RESERVED7,        output3,    0,     253,   0,   Z), "&
  "253  (BC_2,                *,        control,    0),                    "&
  "254  (BC_2,     TSEC3_RXD(7),          input,    X),                    "&
  "255  (BC_6,     TSEC3_TXD(4),          bidir,    0,     256,   0,   Z), "&
  "256  (BC_2,                *,        control,    0),                    "&
  "257  (BC_6,     TSEC3_TXD(5),          bidir,    0,     256,   0,   Z), "&
  "258  (BC_6,     TSEC3_TXD(7),          bidir,    0,     260,   0,   Z), "&
  "259  (BC_6,     TSEC3_TXD(6),          bidir,    0,     260,   0,   Z), "&
  "260  (BC_2,                *,        control,    0),                    "&
  "261  (BC_2,      TSEC3_RX_ER,          input,    X),                    "&
  "262  (BC_2,     TSEC3_RX_CLK,          input,    X),                    "&
  "263  (BC_2,     TSEC3_RXD(1),          input,    X),                    "&
  "264  (BC_2,     TSEC3_RXD(0),          input,    X),                    "&
  "265  (BC_2,      TSEC3_RX_DV,          input,    X),                    "&
  "266  (BC_2,     TSEC3_RXD(2),          input,    X),                    "&
  "267  (BC_2,     TSEC3_RXD(3),          input,    X),                    "&
  "268  (BC_2,      TSEC3_TX_EN,        output3,    0,     269,   0,   Z), "&
  "269  (BC_2,                *,        control,    0),                    "&
  "270  (BC_2,     TSEC3_TX_CLK,          input,    X),                    "&
  "271  (BC_6,     TSEC3_TXD(0),          bidir,    0,     272,   0,   Z), "&
  "272  (BC_2,                *,        control,    0),                    "&
  "273  (BC_6,     TSEC3_TXD(1),          bidir,    0,     272,   0,   Z), "&
  "274  (BC_6,     TSEC3_TXD(3),          bidir,    0,     276,   0,   Z), "&
  "275  (BC_6,     TSEC3_TXD(2),          bidir,    0,     276,   0,   Z), "&
  "276  (BC_2,                *,        control,    0),                    "&
  "277  (BC_2,    TSEC3_GTX_CLK,        output3,    0,     278,   0,   Z), "&
  "278  (BC_2,                *,        control,    0),                    "&
  "279  (BC_6,     TSEC1_TXD(4),          bidir,    0,     280,   0,   Z), "&
  "280  (BC_2,                *,        control,    0),                    "&
  "281  (BC_2,     TSEC1_RXD(4),          input,    X),                    "&
  "282  (BC_2,        TSEC1_COL,          input,    X),                    "&
  "283  (BC_2,      TSEC1_RX_ER,          input,    X),                    "&
  "284  (BC_6,     TSEC1_TXD(1),          bidir,    0,     280,   0,   Z), "&
  "285  (BC_2,    EC_GTX_CLK125,          input,    X),                    "&
  "286  (BC_2,     TSEC1_RXD(7),          input,    X),                    "&
  "287  (BC_2,      TSEC1_RX_DV,          input,    X),                    "&
  "288  (BC_6,     TSEC1_TXD(2),          bidir,    0,     289,   0,   Z), "&
  "289  (BC_2,                *,        control,    0),                    "&
  "290  (BC_2,     TSEC1_RXD(1),          input,    X),                    "&
  "291  (BC_2,     TSEC1_RX_CLK,          input,    X),                    "&
  "292  (BC_2,     TSEC1_RXD(0),          input,    X),                    "&
  "293  (BC_2,     TSEC1_RXD(3),          input,    X),                    "&
  "294  (BC_2,     TSEC1_RXD(2),          input,    X),                    "&
  "295  (BC_6,        TSEC1_CRS,          bidir,    0,     296,   0,   Z), "&
  "296  (BC_2,                *,        control,    0),                    "&
  "297  (BC_2,       FIFO1_RXC2,          input,    X),                    "&
  "298  (BC_6,     TSEC1_TXD(6),          bidir,    0,     289,   0,   Z), "&
  "299  (BC_6,     TSEC1_TXD(7),          bidir,    0,     289,   0,   Z), "&
  "300  (BC_2,     TSEC1_RXD(6),          input,    X),                    "&
  "301  (BC_2,     TSEC1_TX_CLK,          input,    X),                    "&
  "302  (BC_2,     TSEC1_RXD(5),          input,    X),                    "&
  "303  (BC_6,     TSEC1_TXD(5),          bidir,    0,     314,   0,   Z), "&
  "304  (BC_2,    TSEC1_GTX_CLK,        output3,    0,     305,   0,   Z), "&
  "305  (BC_2,                *,        control,    0),                    "&
  "306  (BC_6,     TSEC1_TXD(3),          bidir,    0,     314,   0,   Z), "&
  "307  (BC_2,      TSEC1_TX_EN,        output3,    0,     308,   0,   Z), "&
  "308  (BC_2,                *,        control,    0),                    "&
  "309  (BC_6,        RESERVED2,          bidir,    0,     310,   0,   Z), "&
  "310  (BC_2,                *,        control,    0),                    "&
  "311  (BC_6,          GPOUT_3,          bidir,    0,     312,   0,   Z), "&
  "312  (BC_2,                *,        control,    0),                    "&
  "313  (BC_6,     TSEC1_TXD(0),          bidir,    0,     314,   0,   Z), "&
  "314  (BC_2,                *,        control,    0),                    "&
  "315  (BC_6,          GPOUT_5,          bidir,    0,     316,   0,   Z), "&
  "316  (BC_2,                *,        control,    0),                    "&
  "317  (BC_6,          GPOUT_2,          bidir,    0,     318,   0,   Z), "&
  "318  (BC_2,                *,        control,    0),                    "&
  "319  (BC_6,          GPOUT_4,          bidir,    0,     316,   0,   Z), "&
  "320  (BC_2,        RESERVED1,          input,    X),                    "&
  "321  (BC_2,          GPIN(5),          input,    X),                    "&
  "322  (BC_2,          GPIN(0),          input,    X),                    "&
  "323  (BC_2,        RESERVED4,          input,    X),                    "&
  "324  (BC_2,          GPIN(1),          input,    X),                    "&
  "325  (BC_2,        RESERVED5,          input,    X),                    "&
  "326  (BC_2,        RESERVED6,          input,    X),                    "&
  "327  (BC_6,   CFG_DRAM_TYPE0,          bidir,    0,     344,   0,   Z), "&
  "328  (BC_2,          GPIN(6),          input,    X),                    "&
  "329  (BC_2,          GPIN(7),          input,    X),                    "&
  "330  (BC_2,      TSEC1_TX_ER,        output3,    0,     331,   0,   Z), "&
  "331  (BC_2,                *,        control,    0),                    "&
  "332  (BC_6,          GPOUT_0,          bidir,    0,     344,   0,   Z), "&
  "333  (BC_2,        RESERVED3,        output3,    0,     334,   0,   Z), "&
  "334  (BC_2,                *,        control,    0),                    "&
  "335  (BC_2,          GPIN(2),          input,    X),                    "&
  "336  (BC_2,          GPIN(3),          input,    X),                    "&
  "337  (BC_6,          GPOUT_1,          bidir,    0,     338,   0,   Z), "&
  "338  (BC_2,                *,        control,    0),                    "&
  "339  (BC_6,   CFG_DRAM_TYPE1,          bidir,    0,     340,   0,   Z), "&
  "340  (BC_2,                *,        control,    0),                    "&
  "341  (BC_2,       FIFO1_TXC2,        output3,    0,     342,   0,   Z), "&
  "342  (BC_2,                *,        control,    0),                    "&
  "343  (BC_6,          GPOUT_7,          bidir,    0,     344,   0,   Z), "&
  "344  (BC_2,                *,        control,    0),                    "&
  "345  (BC_2,          GPIN(4),          input,    X),                    "&
  "346  (BC_6,          MDQ(59),          bidir,    0,     347,   0,   Z), "&
  "347  (BC_2,                *,        control,    0),                    "&
  "348  (BC_6,          MDQ(63),          bidir,    0,     349,   0,   Z), "&
  "349  (BC_2,                *,        control,    0),                    "&
  "350  (BC_6,          MDQ(62),          bidir,    0,     351,   0,   Z), "&
  "351  (BC_2,                *,        control,    0),                    "&
  "352  (BC_6,          MDQ(58),          bidir,    0,     353,   0,   Z), "&
  "353  (BC_2,                *,        control,    0),                    "&
  "354  (BC_6,          MDQS(7),          bidir,    0,     355,   0,   Z), "&
  "355  (BC_2,                *,        control,    0),                    "&
  "356  (BC_6,        MDQS_L(7),          bidir,    0,     357,   0,   Z), "&
  "357  (BC_2,                *,        control,    0),                    "&
  "358  (BC_6,          MDQ(61),          bidir,    0,     359,   0,   Z), "&
  "359  (BC_2,                *,        control,    0),                    "&
  "360  (BC_6,          MDQ(57),          bidir,    0,     361,   0,   Z), "&
  "361  (BC_2,                *,        control,    0),                    "&
  "362  (BC_6,           MDM(7),          bidir,    0,     363,   0,   Z), "&
  "363  (BC_2,                *,        control,    0),                    "&
  "364  (BC_6,          MDQ(56),          bidir,    0,     365,   0,   Z), "&
  "365  (BC_2,                *,        control,    0),                    "&
  "366  (BC_6,          MDQ(60),          bidir,    0,     367,   0,   Z), "&
  "367  (BC_2,                *,        control,    0),                    "&
  "368  (BC_6,          MDQ(55),          bidir,    0,     369,   0,   Z), "&
  "369  (BC_2,                *,        control,    0),                    "&
  "370  (BC_6,          MDQ(51),          bidir,    0,     371,   0,   Z), "&
  "371  (BC_2,                *,        control,    0),                    "&
  "372  (BC_6,          MDQ(50),          bidir,    0,     373,   0,   Z), "&
  "373  (BC_2,                *,        control,    0),                    "&
  "374  (BC_6,          MDQ(54),          bidir,    0,     375,   0,   Z), "&
  "375  (BC_2,                *,        control,    0),                    "&
  "376  (BC_6,        MDQS_L(6),          bidir,    0,     377,   0,   Z), "&
  "377  (BC_2,                *,        control,    0),                    "&
  "378  (BC_6,          MDQS(6),          bidir,    0,     379,   0,   Z), "&
  "379  (BC_2,                *,        control,    0),                    "&
  "380  (BC_6,           MDM(6),          bidir,    0,     381,   0,   Z), "&
  "381  (BC_2,                *,        control,    0),                    "&
  "382  (BC_2,         MCK_L(5),        output3,    0,     384,   0,   Z), "&
  "383  (BC_2,           MCK(5),        output3,    0,     384,   0,   Z), "&
  "384  (BC_2,                *,        control,    0),                    "&
  "385  (BC_2,         MCK_L(2),        output3,    0,     387,   0,   Z), "&
  "386  (BC_2,           MCK(2),        output3,    0,     387,   0,   Z), "&
  "387  (BC_2,                *,        control,    0),                    "&
  "388  (BC_6,          MDQ(49),          bidir,    0,     389,   0,   Z), "&
  "389  (BC_2,                *,        control,    0),                    "&
  "390  (BC_6,          MDQ(53),          bidir,    0,     391,   0,   Z), "&
  "391  (BC_2,                *,        control,    0),                    "&
  "392  (BC_6,          MDQ(43),          bidir,    0,     393,   0,   Z), "&
  "393  (BC_2,                *,        control,    0),                    "&
  "394  (BC_6,          MDQ(52),          bidir,    0,     395,   0,   Z), "&
  "395  (BC_2,                *,        control,    0),                    "&
  "396  (BC_6,          MDQ(48),          bidir,    0,     397,   0,   Z), "&
  "397  (BC_2,                *,        control,    0),                    "&
  "398  (BC_6,          MDQ(47),          bidir,    0,     399,   0,   Z), "&
  "399  (BC_2,                *,        control,    0),                    "&
  "400  (BC_6,          MDQ(42),          bidir,    0,     401,   0,   Z), "&
  "401  (BC_2,                *,        control,    0),                    "&
  "402  (BC_6,           MDM(5),          bidir,    0,     403,   0,   Z), "&
  "403  (BC_2,                *,        control,    0),                    "&
  "404  (BC_6,          MDQ(46),          bidir,    0,     405,   0,   Z), "&
  "405  (BC_2,                *,        control,    0),                    "&
  "406  (BC_6,          MDQS(5),          bidir,    0,     407,   0,   Z), "&
  "407  (BC_2,                *,        control,    0),                    "&
  "408  (BC_6,        MDQS_L(5),          bidir,    0,     409,   0,   Z), "&
  "409  (BC_2,                *,        control,    0),                    "&
  "410  (BC_6,          MDQ(40),          bidir,    0,     411,   0,   Z), "&
  "411  (BC_2,                *,        control,    0),                    "&
  "412  (BC_6,          MDQ(45),          bidir,    0,     413,   0,   Z), "&
  "413  (BC_2,                *,        control,    0),                    "&
  "414  (BC_6,          MDQ(41),          bidir,    0,     415,   0,   Z), "&
  "415  (BC_2,                *,        control,    0),                    "&
  "416  (BC_6,          MDQ(44),          bidir,    0,     417,   0,   Z), "&
  "417  (BC_2,                *,        control,    0),                    "&
  "418  (BC_6,          MDQ(35),          bidir,    0,     419,   0,   Z), "&
  "419  (BC_2,                *,        control,    0),                    "&
  "420  (BC_6,          MDQ(34),          bidir,    0,     421,   0,   Z), "&
  "421  (BC_2,                *,        control,    0),                    "&
  "422  (BC_6,          MDQ(39),          bidir,    0,     423,   0,   Z), "&
  "423  (BC_2,                *,        control,    0),                    "&
  "424  (BC_6,          MDQ(38),          bidir,    0,     425,   0,   Z), "&
  "425  (BC_2,                *,        control,    0),                    "&
  "426  (BC_6,          MDQ(33),          bidir,    0,     427,   0,   Z), "&
  "427  (BC_2,                *,        control,    0),                    "&
  "428  (BC_6,        MDQS_L(4),          bidir,    0,     429,   0,   Z), "&
  "429  (BC_2,                *,        control,    0),                    "&
  "430  (BC_6,          MDQS(4),          bidir,    0,     431,   0,   Z), "&
  "431  (BC_2,                *,        control,    0),                    "&
  "432  (BC_6,           MDM(4),          bidir,    0,     433,   0,   Z), "&
  "433  (BC_2,                *,        control,    0),                    "&
  "434  (BC_6,          MDQ(37),          bidir,    0,     435,   0,   Z), "&
  "435  (BC_2,                *,        control,    0),                    "&
  "436  (BC_6,          MDQ(32),          bidir,    0,     437,   0,   Z), "&
  "437  (BC_2,                *,        control,    0),                    "&
  "438  (BC_6,          MDQ(36),          bidir,    0,     439,   0,   Z), "&
  "439  (BC_2,                *,        control,    0),                    "&
  "440  (BC_6,           MA(13),          bidir,    0,     441,   0,   Z), "&
  "441  (BC_2,                *,        control,    0),                    "&
  "442  (BC_2,          MODT(3),        output3,    0,     443,   0,   Z), "&
  "443  (BC_2,                *,        control,    0),                    "&
  "444  (BC_2,          MODT(0),        output3,    0,     445,   0,   Z), "&
  "445  (BC_2,                *,        control,    0),                    "&
  "446  (BC_2,          MODT(1),        output3,    0,     447,   0,   Z), "&
  "447  (BC_2,                *,        control,    0),                    "&
  "448  (BC_2,          MODT(2),        output3,    0,     449,   0,   Z), "&
  "449  (BC_2,                *,        control,    0),                    "&
  "450  (BC_6,         MCS_L(3),          bidir,    0,     453,   0,   Z), "&
  "451  (BC_6,         MCS_L(2),          bidir,    0,     453,   0,   Z), "&
  "452  (BC_6,         MCS_L(0),          bidir,    0,     453,   0,   Z), "&
  "453  (BC_2,                *,        control,    0),                    "&
  "454  (BC_6,         MCS_L(1),          bidir,    0,     453,   0,   Z), "&
  "455  (BC_6,            MWE_L,          bidir,    0,     456,   0,   Z), "&
  "456  (BC_2,                *,        control,    0),                    "&
  "457  (BC_6,           MCAS_L,          bidir,    0,     458,   0,   Z), "&
  "458  (BC_2,                *,        control,    0),                    "&
  "459  (BC_6,           MBA(1),          bidir,    0,     461,   0,   Z), "&
  "460  (BC_6,           MBA(0),          bidir,    0,     461,   0,   Z), "&
  "461  (BC_2,                *,        control,    0),                    "&
  "462  (BC_6,           MRAS_L,          bidir,    0,     463,   0,   Z), "&
  "463  (BC_2,                *,        control,    0),                    "&
  "464  (BC_6,           MA(10),          bidir,    0,     466,   0,   Z), "&
  "465  (BC_6,            MA(0),          bidir,    0,     466,   0,   Z), "&
  "466  (BC_2,                *,        control,    0),                    "&
  "467  (BC_2,         MCK_L(3),        output3,    0,     469,   0,   Z), "&
  "468  (BC_2,           MCK(3),        output3,    0,     469,   0,   Z), "&
  "469  (BC_2,                *,        control,    0),                    "&
  "470  (BC_2,           MCK(0),        output3,    0,     471,   0,   Z), "&
  "471  (BC_2,                *,        control,    0),                    "&
  "472  (BC_2,         MCK_L(0),        output3,    0,     473,   0,   Z), "&
  "473  (BC_2,                *,        control,    0),                    "&
  "474  (BC_6,            MA(3),          bidir,    0,     486,   0,   Z), "&
  "475  (BC_6,            MA(2),          bidir,    0,     488,   0,   Z), "&
  "476  (BC_6,            MA(1),          bidir,    0,     479,   0,   Z), "&
  "477  (BC_6,            MA(4),          bidir,    0,     466,   0,   Z), "&
  "478  (BC_6,            MA(6),          bidir,    0,     479,   0,   Z), "&
  "479  (BC_2,                *,        control,    0),                    "&
  "480  (BC_6,            MA(8),          bidir,    0,     486,   0,   Z), "&
  "481  (BC_6,            MA(5),          bidir,    0,     479,   0,   Z), "&
  "482  (BC_6,            MA(7),          bidir,    0,     488,   0,   Z), "&
  "483  (BC_6,            MA(9),          bidir,    0,     486,   0,   Z), "&
  "484  (BC_6,           MA(14),          bidir,    0,     488,   0,   Z), "&
  "485  (BC_6,           MA(12),          bidir,    0,     486,   0,   Z), "&
  "486  (BC_2,                *,        control,    0),                    "&
  "487  (BC_6,           MA(11),          bidir,    0,     488,   0,   Z), "&
  "488  (BC_2,                *,        control,    0),                    "&
  "489  (BC_6,           MBA(2),          bidir,    0,     490,   0,   Z), "&
  "490  (BC_2,                *,        control,    0),                    "&
  "491  (BC_2,            MA_15,        output3,    0,     492,   0,   Z), "&
  "492  (BC_2,                *,        control,    0),                    "&
  "493  (BC_2,          MCKE(2),        output3,    0,     494,   0,   Z), "&
  "494  (BC_2,                *,        control,    0),                    "&
  "495  (BC_2,          MCKE(3),        output3,    0,     494,   0,   Z), "&
  "496  (BC_6,           MCKE_0,          bidir,    0,     497,   0,   Z), "&
  "497  (BC_2,                *,        control,    0),                    "&
  "498  (BC_2,          MCKE(1),        output3,    0,     499,   0,   Z), "&
  "499  (BC_2,                *,        control,    0),                    "&
  "500  (BC_6,          MECC(6),          bidir,    0,     501,   0,   Z), "&
  "501  (BC_2,                *,        control,    0),                    "&
  "502  (BC_6,          MECC(3),          bidir,    0,     503,   0,   Z), "&
  "503  (BC_2,                *,        control,    0),                    "&
  "504  (BC_6,          MECC(7),          bidir,    0,     505,   0,   Z), "&
  "505  (BC_2,                *,        control,    0),                    "&
  "506  (BC_6,          MECC(2),          bidir,    0,     507,   0,   Z), "&
  "507  (BC_2,                *,        control,    0),                    "&
  "508  (BC_6,           MDM(8),          bidir,    0,     509,   0,   Z), "&
  "509  (BC_2,                *,        control,    0),                    "&
  "510  (BC_6,        MDQS_L(8),          bidir,    0,     511,   0,   Z), "&
  "511  (BC_2,                *,        control,    0),                    "&
  "512  (BC_6,          MDQS(8),          bidir,    0,     513,   0,   Z), "&
  "513  (BC_2,                *,        control,    0),                    "&
  "514  (BC_6,          MECC(5),          bidir,    0,     515,   0,   Z), "&
  "515  (BC_2,                *,        control,    0),                    "&
  "516  (BC_6,          MECC(1),          bidir,    0,     517,   0,   Z), "&
  "517  (BC_2,                *,        control,    0),                    "&
  "518  (BC_6,          MECC(0),          bidir,    0,     519,   0,   Z), "&
  "519  (BC_2,                *,        control,    0),                    "&
  "520  (BC_6,          MECC(4),          bidir,    0,     521,   0,   Z), "&
  "521  (BC_2,                *,        control,    0),                    "&
  "522  (BC_6,          MDQ(31),          bidir,    0,     523,   0,   Z), "&
  "523  (BC_2,                *,        control,    0),                    "&
  "524  (BC_6,          MDQ(27),          bidir,    0,     525,   0,   Z), "&
  "525  (BC_2,                *,        control,    0),                    "&
  "526  (BC_6,          MDQ(26),          bidir,    0,     527,   0,   Z), "&
  "527  (BC_2,                *,        control,    0),                    "&
  "528  (BC_6,          MDQ(30),          bidir,    0,     529,   0,   Z), "&
  "529  (BC_2,                *,        control,    0),                    "&
  "530  (BC_6,          MDQS(3),          bidir,    0,     531,   0,   Z), "&
  "531  (BC_2,                *,        control,    0),                    "&
  "532  (BC_6,        MDQS_L(3),          bidir,    0,     533,   0,   Z), "&
  "533  (BC_2,                *,        control,    0),                    "&
  "534  (BC_6,          MDQ(28),          bidir,    0,     535,   0,   Z), "&
  "535  (BC_2,                *,        control,    0),                    "&
  "536  (BC_6,          MDQ(29),          bidir,    0,     537,   0,   Z), "&
  "537  (BC_2,                *,        control,    0),                    "&
  "538  (BC_6,           MDM(3),          bidir,    0,     539,   0,   Z), "&
  "539  (BC_2,                *,        control,    0),                    "&
  "540  (BC_6,          MDQ(25),          bidir,    0,     541,   0,   Z), "&
  "541  (BC_2,                *,        control,    0),                    "&
  "542  (BC_6,          MDQ(24),          bidir,    0,     543,   0,   Z), "&
  "543  (BC_2,                *,        control,    0),                    "&
  "544  (BC_6,          MDQ(23),          bidir,    0,     545,   0,   Z), "&
  "545  (BC_2,                *,        control,    0),                    "&
  "546  (BC_6,          MDQ(22),          bidir,    0,     547,   0,   Z), "&
  "547  (BC_2,                *,        control,    0),                    "&
  "548  (BC_6,          MDQ(18),          bidir,    0,     549,   0,   Z), "&
  "549  (BC_2,                *,        control,    0),                    "&
  "550  (BC_6,          MDQ(19),          bidir,    0,     551,   0,   Z), "&
  "551  (BC_2,                *,        control,    0),                    "&
  "552  (BC_6,        MDQS_L(2),          bidir,    0,     553,   0,   Z), "&
  "553  (BC_2,                *,        control,    0),                    "&
  "554  (BC_6,          MDQS(2),          bidir,    0,     555,   0,   Z), "&
  "555  (BC_2,                *,        control,    0),                    "&
  "556  (BC_6,           MDM(2),          bidir,    0,     557,   0,   Z), "&
  "557  (BC_2,                *,        control,    0),                    "&
  "558  (BC_6,          MDQ(21),          bidir,    0,     559,   0,   Z), "&
  "559  (BC_2,                *,        control,    0),                    "&
  "560  (BC_6,          MDQ(20),          bidir,    0,     561,   0,   Z), "&
  "561  (BC_2,                *,        control,    0),                    "&
  "562  (BC_6,          MDQ(16),          bidir,    0,     563,   0,   Z), "&
  "563  (BC_2,                *,        control,    0),                    "&
  "564  (BC_6,          MDQ(17),          bidir,    0,     565,   0,   Z), "&
  "565  (BC_2,                *,        control,    0),                    "&
  "566  (BC_6,          MDQ(15),          bidir,    0,     567,   0,   Z), "&
  "567  (BC_2,                *,        control,    0),                    "&
  "568  (BC_6,          MDQ(14),          bidir,    0,     569,   0,   Z), "&
  "569  (BC_2,                *,        control,    0),                    "&
  "570  (BC_6,          MDQ(13),          bidir,    0,     571,   0,   Z), "&
  "571  (BC_2,                *,        control,    0),                    "&
  "572  (BC_6,          MDQ(10),          bidir,    0,     573,   0,   Z), "&
  "573  (BC_2,                *,        control,    0),                    "&
  "574  (BC_6,          MDQ(11),          bidir,    0,     575,   0,   Z), "&
  "575  (BC_2,                *,        control,    0),                    "&
  "576  (BC_2,         MCK_L(1),        output3,    0,     578,   0,   Z), "&
  "577  (BC_2,           MCK(1),        output3,    0,     578,   0,   Z), "&
  "578  (BC_2,                *,        control,    0),                    "&
  "579  (BC_2,         MCK_L(4),        output3,    0,     581,   0,   Z), "&
  "580  (BC_2,           MCK(4),        output3,    0,     581,   0,   Z), "&
  "581  (BC_2,                *,        control,    0),                    "&
  "582  (BC_6,          MDQS(1),          bidir,    0,     583,   0,   Z), "&
  "583  (BC_2,                *,        control,    0),                    "&
  "584  (BC_6,        MDQS_L(1),          bidir,    0,     585,   0,   Z), "&
  "585  (BC_2,                *,        control,    0),                    "&
  "586  (BC_6,           MDQ(9),          bidir,    0,     587,   0,   Z), "&
  "587  (BC_2,                *,        control,    0),                    "&
  "588  (BC_6,          MDQ(12),          bidir,    0,     589,   0,   Z), "&
  "589  (BC_2,                *,        control,    0),                    "&
  "590  (BC_6,           MDM(1),          bidir,    0,     591,   0,   Z), "&
  "591  (BC_2,                *,        control,    0),                    "&
  "592  (BC_6,           MDQ(8),          bidir,    0,     593,   0,   Z), "&
  "593  (BC_2,                *,        control,    0),                    "&
  "594  (BC_6,           MDQ(7),          bidir,    0,     595,   0,   Z), "&
  "595  (BC_2,                *,        control,    0),                    "&
  "596  (BC_6,           MDQ(3),          bidir,    0,     597,   0,   Z), "&
  "597  (BC_2,                *,        control,    0),                    "&
  "598  (BC_6,           MDQ(6),          bidir,    0,     599,   0,   Z), "&
  "599  (BC_2,                *,        control,    0),                    "&
  "600  (BC_6,           MDQ(2),          bidir,    0,     601,   0,   Z), "&
  "601  (BC_2,                *,        control,    0),                    "&
  "602  (BC_6,           MDQ(5),          bidir,    0,     603,   0,   Z), "&
  "603  (BC_2,                *,        control,    0),                    "&
  "604  (BC_6,        MDQS_L(0),          bidir,    0,     605,   0,   Z), "&
  "605  (BC_2,                *,        control,    0),                    "&
  "606  (BC_6,          MDQS(0),          bidir,    0,     607,   0,   Z), "&
  "607  (BC_2,                *,        control,    0),                    "&
  "608  (BC_6,           MDM(0),          bidir,    0,     609,   0,   Z), "&
  "609  (BC_2,                *,        control,    0),                    "&
  "610  (BC_6,           MDQ(4),          bidir,    0,     611,   0,   Z), "&
  "611  (BC_2,                *,        control,    0),                    "&
  "612  (BC_6,           MDQ(1),          bidir,    0,     613,   0,   Z), "&
  "613  (BC_2,                *,        control,    0),                    "&
  "614  (BC_6,           MDQ(0),          bidir,    0,     615,   0,   Z), "&
  "615  (BC_2,                *,        control,    0),                    "&
  "616  (BC_6,          MDIC(1),          bidir,    0,     617,   0,   Z), "&
  "617  (BC_2,                *,        control,    0),                    "&
  "618  (BC_6,          MDIC(0),          bidir,    0,     619,   0,   Z), "&
  "619  (BC_2,                *,        control,    0),                    "&
  "620  (BC_6,          LAD(12),          bidir,    0,     621,   0,   Z), "&
  "621  (BC_2,                *,        control,    0),                    "&
  "622  (BC_6,           LAD(5),          bidir,    0,     624,   0,   Z), "&
  "623  (BC_6,           LAD(4),          bidir,    0,     624,   0,   Z), "&
  "624  (BC_2,                *,        control,    0),                    "&
  "625  (BC_6,           LAD(1),          bidir,    0,     621,   0,   Z), "&
  "626  (BC_2,         LCS_L(1),        output3,    0,     627,   0,   Z), "&
  "627  (BC_2,                *,        control,    0),                    "&
  "628  (BC_6,          LAD(28),          bidir,    0,     629,   0,   Z), "&
  "629  (BC_2,                *,        control,    0),                    "&
  "630  (BC_6,          LAD(27),          bidir,    0,     629,   0,   Z), "&
  "631  (BC_6,          LAD(26),          bidir,    0,     629,   0,   Z), "&
  "632  (BC_6,          LAD(31),          bidir,    0,     639,   0,   Z), "&
  "633  (BC_6,           LDP(3),          bidir,    0,     634,   0,   Z), "&
  "634  (BC_2,                *,        control,    0),                    "&
  "635  (BC_6,          LAD(25),          bidir,    0,     644,   0,   Z), "&
  "636  (BC_6,          LAD(29),          bidir,    0,     639,   0,   Z), "&
  "637  (BC_6,          LAD(30),          bidir,    0,     644,   0,   Z), "&
  "638  (BC_6,          LAD(22),          bidir,    0,     639,   0,   Z), "&
  "639  (BC_2,                *,        control,    0),                    "&
  "640  (BC_6,          LAD(23),          bidir,    0,     639,   0,   Z), "&
  "641  (BC_2,          LCS_L_7,        output3,    0,     642,   0,   Z), "&
  "642  (BC_2,                *,        control,    0),                    "&
  "643  (BC_6,          LAD(24),          bidir,    0,     644,   0,   Z), "&
  "644  (BC_2,                *,        control,    0),                    "&
  "645  (BC_6,         LWE_L(3),          bidir,    0,     647,   0,   Z), "&
  "646  (BC_6,         LWE_L(1),          bidir,    0,     647,   0,   Z), "&
  "647  (BC_2,                *,        control,    0),                    "&
  "648  (BC_6,           LAD(8),          bidir,    0,     649,   0,   Z), "&
  "649  (BC_2,                *,        control,    0),                    "&
  "650  (BC_6,          LAD(18),          bidir,    0,     649,   0,   Z), "&
  "651  (BC_2,          LCS_L_6,        output3,    0,     652,   0,   Z), "&
  "652  (BC_2,                *,        control,    0),                    "&
  "653  (BC_6,          LCS_L_5,          bidir,    0,     654,   0,   Z), "&
  "654  (BC_2,                *,        control,    0),                    "&
  "655  (BC_6,          LAD(17),          bidir,    0,     649,   0,   Z), "&
  "656  (BC_6,          LAD(20),          bidir,    0,     657,   0,   Z), "&
  "657  (BC_2,                *,        control,    0),                    "&
  "658  (BC_6,           LA(28),          bidir,    0,     659,   0,   Z), "&
  "659  (BC_2,                *,        control,    0),                    "&
  "660  (BC_2,         LCS_L(4),        output3,    0,     661,   0,   Z), "&
  "661  (BC_2,                *,        control,    0),                    "&
  "662  (BC_6,          LAD(19),          bidir,    0,     679,   0,   Z), "&
  "663  (BC_2,          LCLK(0),        output3,    0,     664,   0,   Z), "&
  "664  (BC_2,                *,        control,    0),                    "&
  "665  (BC_2,          LCLK(2),        output3,    0,     666,   0,   Z), "&
  "666  (BC_2,                *,        control,    0),                    "&
  "667  (BC_2,          LCLK(1),        output3,    0,     666,   0,   Z), "&
  "668  (BC_2,        LSYNC_OUT,        output3,    0,     669,   0,   Z), "&
  "669  (BC_2,                *,        control,    0),                    "&
  "670  (BC_6,           LA(29),          bidir,    0,     659,   0,   Z), "&
  "671  (BC_6,            LGPL0,          bidir,    0,     672,   0,   Z), "&
  "672  (BC_2,                *,        control,    0),                    "&
  "673  (BC_6,            LGPL1,          bidir,    0,     674,   0,   Z), "&
  "674  (BC_2,                *,        control,    0),                    "&
  "675  (BC_6,           LA(27),          bidir,    0,     659,   0,   Z), "&
  "676  (BC_2,             LCKE,        output3,    0,     677,   0,   Z), "&
  "677  (BC_2,                *,        control,    0),                    "&
  "678  (BC_6,          LAD(16),          bidir,    0,     679,   0,   Z), "&
  "679  (BC_2,                *,        control,    0),                    "&
  "680  (BC_6,           LA(31),          bidir,    0,     689,   0,   Z), "&
  "681  (BC_6,            LGPL2,          bidir,    0,     682,   0,   Z), "&
  "682  (BC_2,                *,        control,    0),                    "&
  "683  (BC_6,         LWE_L(2),          bidir,    0,     684,   0,   Z), "&
  "684  (BC_2,                *,        control,    0),                    "&
  "685  (BC_6,          LAD(21),          bidir,    0,     686,   0,   Z), "&
  "686  (BC_2,                *,        control,    0),                    "&
  "687  (BC_6,          LAD(10),          bidir,    0,     694,   0,   Z), "&
  "688  (BC_6,           LA(30),          bidir,    0,     689,   0,   Z), "&
  "689  (BC_2,                *,        control,    0),                    "&
  "690  (BC_6,            LGPL3,          bidir,    0,     691,   0,   Z), "&
  "691  (BC_2,                *,        control,    0),                    "&
  "692  (BC_6,           LAD(2),          bidir,    0,     694,   0,   Z), "&
  "693  (BC_6,          LAD(14),          bidir,    0,     694,   0,   Z), "&
  "694  (BC_2,                *,        control,    0),                    "&
  "695  (BC_6,            LGPL4,          bidir,    0,     696,   0,   Z), "&
  "696  (BC_2,                *,        control,    0),                    "&
  "697  (BC_6,          LAD(13),          bidir,    0,     694,   0,   Z), "&
  "698  (BC_6,           LAD(3),          bidir,    0,     705,   0,   Z), "&
  "699  (BC_6,            LGPL5,          bidir,    0,     700,   0,   Z), "&
  "700  (BC_2,                *,        control,    0),                    "&
  "701  (BC_6,           LDP(0),          bidir,    0,     702,   0,   Z), "&
  "702  (BC_2,                *,        control,    0),                    "&
  "703  (BC_6,           LDP(1),          bidir,    0,     702,   0,   Z), "&
  "704  (BC_6,          LAD(11),          bidir,    0,     705,   0,   Z), "&
  "705  (BC_2,                *,        control,    0),                    "&
  "706  (BC_6,             LALE,          bidir,    0,     707,   0,   Z), "&
  "707  (BC_2,                *,        control,    0),                    "&
  "708  (BC_6,         LWE_L(0),          bidir,    0,     709,   0,   Z), "&
  "709  (BC_2,                *,        control,    0),                    "&
  "710  (BC_6,          LAD(15),          bidir,    0,     705,   0,   Z), "&
  "711  (BC_6,           LAD(0),          bidir,    0,     712,   0,   Z), "&
  "712  (BC_2,                *,        control,    0),                    "&
  "713  (BC_6,           LAD(6),          bidir,    0,     712,   0,   Z), "&
  "714  (BC_6,           LAD(9),          bidir,    0,     712,   0,   Z), "&
  "715  (BC_2,         LCS_L(3),        output3,    0,     725,   0,   Z), "&
  "716  (BC_2,         LCS_L(0),        output3,    0,     717,   0,   Z), "&
  "717  (BC_2,                *,        control,    0),                    "&
  "718  (BC_6,           LAD(7),          bidir,    0,     712,   0,   Z), "&
  "719  (BC_2,         LSYNC_IN,          input,    X),                    "&
  "720  (BC_6,           LDP(2),          bidir,    0,     721,   0,   Z), "&
  "721  (BC_2,                *,        control,    0),                    "&
  "722  (BC_6,            LBCTL,          bidir,    0,     723,   0,   Z), "&
  "723  (BC_2,                *,        control,    0),                    "&
  "724  (BC_2,         LCS_L(2),        output3,    0,     725,   0,   Z), "&
  "725  (BC_2,                *,        control,    0),                    "&
  "726  (BC_2,        GPOUT(31),        output3,    0,     730,   0,   Z), "&
  "727  (BC_2,        GPOUT(30),        output3,    0,     730,   0,   Z), "&
  "728  (BC_2,        GPOUT(27),        output3,    0,     730,   0,   Z), "&
  "729  (BC_2,        GPOUT(28),        output3,    0,     730,   0,   Z), "&
  "730  (BC_2,                *,        control,    0),                    "&
  "731  (BC_2,        GPOUT(29),        output3,    0,     734,   0,   Z), "&
  "732  (BC_2,        GPOUT(25),        output3,    0,     734,   0,   Z), "&
  "733  (BC_2,        GPOUT(24),        output3,    0,     734,   0,   Z), "&
  "734  (BC_2,                *,        control,    0),                    "&
  "735  (BC_2,        GPOUT(26),        output3,    0,     734,   0,   Z), "&
  "736  (BC_2,                *,       internal,    X),                    "&
  "737  (BC_2,                *,       internal,    X),			   "&
  "738  (BC_4,                *,       internal,    X),                    "&
  "739  (BC_4,         SD_RX(0),   observe_only,    X),                    "&
  "740  (BC_2,                *,        control,    1),                    "&
  "741  (BC_2,         SD_TX(0),        output3,    0,     740,    1,  Z), "&
  "742  (BC_2,                *,        control,    1),                    "&
  "743  (BC_2,         SD_TX(1),        output3,    0,     742,    1,  Z), "&
  "744  (BC_4,         SD_RX(1),   observe_only,    X),                    "&
  "745  (BC_4,         SD_RX(2),   observe_only,    X),                    "&
  "746  (BC_2,                *,        control,    1),                    "&
  "747  (BC_2,         SD_TX(2),        output3,    0,     746,    1,  Z), "&
  "748  (BC_2,                *,        control,    1),                    "&
  "749  (BC_2,         SD_TX(3),        output3,    0,     748,    1,  Z), "&
  "750  (BC_4,         SD_RX(3),   observe_only,    X),                    "&
  "751  (BC_4,       SD_REF_CLK,          clock,    X),                    "&
  "752  (BC_2,                *,        control,    1),                    "&
  "753  (BC_2,       SD_PLL_TPD,        output3,    0,     752,    1,  Z), "&
  "754  (BC_4,                *,       internal,    X),                    "&
  "755  (BC_2,                *,       internal,    X),                    "&
  "756  (BC_2,                *,       internal,    X),                    "&
  "757  (BC_2,                *,        control,    1),                    "&
  "758  (BC_2,       RESERVED19,        output3,    0,     757,    1,  Z), "&
  "759  (BC_4,        RESERVED8,   observe_only,    X),                    "&
  "760  (BC_4,        RESERVED9,   observe_only,    X),                    "&
  "761  (BC_2,                *,        control,    1),                    "&
  "762  (BC_2,       RESERVED18,        output3,    0,     761,    1,  Z), "&
  "763  (BC_2,                *,        control,    1),                    "&
  "764  (BC_2,       RESERVED17,        output3,    0,     763,    1,  Z), "&
  "765  (BC_4,       RESERVED10,   observe_only,    X),                    "&
  "766  (BC_4,       RESERVED11,   observe_only,    X),                    "&
  "767  (BC_2,                *,        control,    1),                    "&
  "768  (BC_2,       RESERVED16,        output3,    0,     767,    1,  Z)  ";
-- tdi
end MPC8545E;