-------------------------------------------------------------------------------
-- Copyright Intel Corporation 1993
--****************************************************************************
-- Intel Corporation makes no warranty for the use of its products
-- and assumes no responsibility for any errors which may appear in
-- this document nor does it make a commitment to update the information
-- contained herein.
--****************************************************************************
-- Boundary-Scan Description Language (BSDL Version 0.0) is a de-facto
-- standard means of describing essential features of ANSI/IEEE 1149.1a-1994
-- compliant devices.
--****************************************************************************
--
-- Intel Embedded Ultra-Low Power Intel486(TM) GX CPU BSDL description
-- This file has been electrically verified.
-- --------------------------------------------------------------------------
-- Rev: 0.0 12/02/96 = Created by C. Bruemmer
-- Rev: 0.1 09/15/98 = Added two more cells to boundary register which
-- increased length to 109 from 107. Changed
-- RESERVED to internal for all cells except #4 in
-- boundary register. Changed Revision bits in ID reg.
-- from 0001 to 0110.Chris Bruemmer
-- --------------------------------------------------------------------------
entity ULP_GX_486 is
generic (PHYSICAL_PIN_MAP : string := "TQFP_176");
port (A20M : in bit;
ABUS2 : out bit;
ABUS3 : out bit;
ABUS : inout bit_vector (4 to 31); -- Address bus (words)
ADS : out bit;
AHOLD : in bit;
BE : out bit_vector (0 to 3);
BLAST : out bit;
BOFF : in bit;
BRDY : in bit;
BREQ : out bit;
CLK : in bit;
DBUS : inout bit_vector (0 to 15); -- Data bus
DC : out bit;
DP : inout bit_vector (0 to 1);
EADS : in bit;
FLUSH : in bit;
HLDA : out bit;
HOLD : in bit;
INTR : in bit;
KEN : in bit;
LOCK : out bit;
MIO : out bit;
NC_TQFP : linkage bit_vector (1 to 13); -- No Connect for TQFP
NMI : in bit;
PCD : out bit;
PCHK : out bit;
PLOCK : out bit;
PWT : out bit;
RDY : in bit;
RESET : in bit;
RESERVED : in bit;
SMI : in bit;
SMIACT : out bit;
SRESET : in bit;
STPCLK : in bit;
TCK, TMS, TDI : in bit; -- Scan Port inputs
TDO : out bit; -- Scan Port output
VCC_TQFP : linkage bit_vector (1 to 22); -- VCC
VCCP : linkage bit_vector (1 to 20); -- VCCP
VSS_TQFP : linkage bit_vector (1 to 35); -- VSS
WR : out bit);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of ULP_GX_486: entity is
"STD_1149_1_1990";
attribute PIN_MAP of ULP_GX_486 : entity is PHYSICAL_PIN_MAP;
constant TQFP_176 : PIN_MAP_STRING := -- Define Pin Out of TQFP
"A20M : 46, "&
"ABUS2 : 175, "&
"ABUS3 : 169, "&
"ABUS : (168,167,165,164,163,160,159,155,154,152,151,148,"&
" 147,146,141,140,139,136,135,134,133,129,128,127,"&
" 126,124,123,122),"&
"ADS : 176, "&
"AHOLD : 19, "&
"BE : (32,33,34,35),"&
"BLAST : 1, "&
"BOFF : 10, "&
"BRDY : 9, "&
"BREQ : 31, "&
"CLK : 26, "&
"DBUS : (120,119,118,117,116,106,105,102,"&
" 100,99,96,95,94,93,90,89),"&
"DC : 39, "&
"DP : (121,101),"&
"EADS : 45, "&
"FLUSH : 51, "&
"HLDA : 27, "&
"HOLD : 18, "&
"INTR : 52, "&
"KEN : 15, "&
"LOCK : 4, "&
"MIO : 38, "&
"NC_TQFP : (7,13,48,49,50,63,64,66,69,70,80,83,103), "&
"NMI : 53, "&
"PCD : 41, "&
"PCHK : 8, "&
"PLOCK : 3, "&
"PWT : 40, "&
"RDY : 14, "&
"RESERVED : 166, "&
"RESET : 47, "&
"SMI : 65, "&
"SMIACT : 59, "&
"SRESET : 58, "&
"STPCLK : 71, "&
"TCK : 20, "&
"TDI : 143, "&
"TDO : 67, "&
"TMS : 142, "&
"VCC_TQFP: (2,11,16,21,22,24,25,36,44,60,"&
" 68,73,82,97,109,110,112,113,115,153,156,161),"&
"VCCP : (6,30,42,62,75,77,79,86,91,104,"&
" 107,125,130,137,138,144,150,158,170,173),"&
"VSS_TQFP: (5,12,17,23,29,37,43,54,55,56,57,61,72,74,76,"&
" 78,81,84,85,87,88,92,98,108,111,114,131,132,145,149,"&
" 157,162,171,172,174),"&
"WR : 28";
attribute Tap_Scan_In of TDI : signal is true;
attribute Tap_Scan_Out of TDO : signal is true;
attribute Tap_Scan_Mode of TMS : signal is true;
attribute Tap_Scan_Clock of TCK : signal is (25.0e6, BOTH);
attribute Instruction_Length of ULP_GX_486 : entity is 4;
attribute Instruction_Opcode of ULP_GX_486 : entity is
"BYPASS (1111)," &
"EXTEST (0000)," &
"SAMPLE (0001)," &
"IDCODE (0010)," &
"RUNBIST (0111)," &
"PRIVATE (0011,0100,0101,0110,1000,1001,1010,1011,1100,1101,1110)";
attribute Instruction_Capture of ULP_GX_486 : entity is "0001";
attribute Instruction_Private of ULP_GX_486 : entity is "PRIVATE";
attribute Idcode_Register of ULP_GX_486 : entity is
-- **************************************************
-- "0001" & --version was
"0110" & --version is
"1000001010000100" & --new part number
"00000001001" & --manufacturers identity
"1"; --required by the standard
attribute Register_Access of ULP_GX_486 : entity is
"BIST[1] (RUNBIST)";
--{*******************************************************************}
--{ The first cell is closest to TDO }
--{*******************************************************************}
attribute Boundary_Length of ULP_GX_486 : entity is 109;
attribute Boundary_Register of ULP_GX_486 : entity is
"0 (BC_2, ABUS2, output3, X, 107, 1, Z),"&
"1 (BC_2, ABUS3, output3, X, 107, 1, Z),"&
"2 (BC_6, ABUS(4), bidir, X, 107, 1, Z),"&
"3 (BC_6, ABUS(5), bidir, X, 107, 1, Z),"&
"4 (BC_1, RESERVED, input, X)," &
"5 (BC_6, ABUS(6), bidir, X, 107, 1, Z),"&
"6 (BC_6, ABUS(7), bidir, X, 107, 1, Z),"&
"7 (BC_6, ABUS(8), bidir, X, 107, 1, Z),"&
"8 (BC_6, ABUS(9), bidir, X, 107, 1, Z),"&
"9 (BC_6, ABUS(10), bidir, X, 107, 1, Z),"&
"10 (BC_6, ABUS(11), bidir, X, 107, 1, Z),"&
"11 (BC_6, ABUS(12), bidir, X, 107, 1, Z),"&
"12 (BC_6, ABUS(13), bidir, X, 107, 1, Z),"&
"13 (BC_6, ABUS(14), bidir, X, 107, 1, Z),"&
"14 (BC_6, ABUS(15), bidir, X, 107, 1, Z),"&
"15 (BC_6, ABUS(16), bidir, X, 107, 1, Z),"&
"16 (BC_6, ABUS(17), bidir, X, 107, 1, Z),"&
"17 (BC_6, ABUS(18), bidir, X, 107, 1, Z),"&
"18 (BC_6, ABUS(19), bidir, X, 107, 1, Z),"&
"19 (BC_6, ABUS(20), bidir, X, 107, 1, Z),"&
"20 (BC_6, ABUS(21), bidir, X, 107, 1, Z),"&
"21 (BC_6, ABUS(22), bidir, X, 107, 1, Z),"&
"22 (BC_6, ABUS(23), bidir, X, 107, 1, Z),"&
"23 (BC_6, ABUS(24), bidir, X, 107, 1, Z),"&
"24 (BC_6, ABUS(25), bidir, X, 107, 1, Z),"&
"25 (BC_6, ABUS(26), bidir, X, 107, 1, Z),"&
"26 (BC_6, ABUS(27), bidir, X, 107, 1, Z),"&
"27 (BC_6, ABUS(28), bidir, X, 107, 1, Z),"&
"28 (BC_6, ABUS(29), bidir, X, 107, 1, Z),"&
"29 (BC_6, ABUS(30), bidir, X, 107, 1, Z),"&
"30 (BC_6, ABUS(31), bidir, X, 107, 1, Z),"&
"31 (BC_6, DP(0), bidir, X, 108, 1, Z),"&
"32 (BC_6, DBUS(0), bidir, X, 108, 1, Z),"&
"33 (BC_6, DBUS(1), bidir, X, 108, 1, Z),"&
"34 (BC_6, DBUS(2), bidir, X, 108, 1, Z),"&
"35 (BC_6, DBUS(3), bidir, X, 108, 1, Z),"&
"36 (BC_6, DBUS(4), bidir, X, 108, 1, Z),"&
"37 (BC_6, DBUS(5), bidir, X, 108, 1, Z),"&
"38 (BC_6, DBUS(6), bidir, X, 108, 1, Z),"&
"39 (BC_6, DBUS(7), bidir, X, 108, 1, Z),"&
"40 (BC_6, DP(1), bidir, X, 108, 1, Z),"&
"41 (BC_6, DBUS(8), bidir, X, 108, 1, Z),"&
"42 (BC_6, DBUS(9), bidir, X, 108, 1, Z),"&
"43 (BC_6, DBUS(10), bidir, X, 108, 1, Z),"&
"44 (BC_6, DBUS(11), bidir, X, 108, 1, Z),"&
"45 (BC_6, DBUS(12), bidir, X, 108, 1, Z),"&
"46 (BC_6, DBUS(13), bidir, X, 108, 1, Z),"&
"47 (BC_6, DBUS(14), bidir, X, 108, 1, Z),"&
"48 (BC_6, DBUS(15), bidir, X, 108, 1, Z),"&
"49 (BC_1, *, internal, X)," &
"50 (BC_1, *, internal, X)," &
"51 (BC_1, *, internal, X)," &
"52 (BC_1, *, internal, X)," &
"53 (BC_1, *, internal, X)," &
"54 (BC_1, *, internal, X)," &
"55 (BC_1, *, internal, X)," &
"56 (BC_1, *, internal, X)," &
"57 (BC_1, *, internal, X)," &
"58 (BC_1, *, internal, X)," &
"59 (BC_1, *, internal, X)," &
"60 (BC_1, *, internal, X)," &
"61 (BC_1, *, internal, X)," &
"62 (BC_1, *, internal, X)," &
"63 (BC_1, *, internal, X)," &
"64 (BC_1, *, internal, X)," &
"65 (BC_1, *, internal, X)," &
"66 (BC_1, *, internal, X)," &
"67 (BC_1, STPCLK, input, X),"&
"68 (BC_1, *, internal, X)," &
"69 (BC_1, *, internal, X)," &
"70 (BC_1, SMI, input, X),"&
"71 (BC_2, SMIACT, output3, X, 105, 1, Z),"&
"72 (BC_1, SRESET, input, X),"&
"73 (BC_1, NMI, input, X),"&
"74 (BC_1, INTR, input, X),"&
"75 (BC_1, FLUSH, input, X),"&
"76 (BC_1, RESET, input, X),"&
"77 (BC_1, A20M, input, X),"&
"78 (BC_1, EADS, input, X),"&
"79 (BC_2, PCD, output3, X, 106, 1, Z),"&
"80 (BC_2, PWT, output3, X, 106, 1, Z),"&
"81 (BC_2, DC, output3, X, 106, 1, Z),"&
"82 (BC_2, MIO, output3, X, 106, 1, Z),"&
"83 (BC_2, BE(3), output3, X, 106, 1, Z),"&
"84 (BC_2, BE(2), output3, X, 106, 1, Z),"&
"85 (BC_2, BE(1), output3, X, 106, 1, Z),"&
"86 (BC_2, BE(0), output3, X, 106, 1, Z),"&
"87 (BC_2, BREQ, output3, X, 105, 1, Z),"&
"88 (BC_2, WR, output3, X, 106, 1, Z),"&
"89 (BC_2, HLDA, output3, X, 105, 1, Z),"&
"90 (BC_1, CLK, input, X),"&
"91 (BC_1, *, internal, X)," &
"92 (BC_1, AHOLD, input, X),"&
"93 (BC_1, HOLD, input, X),"&
"94 (BC_1, KEN, input, X),"&
"95 (BC_1, RDY, input, X),"&
"96 (BC_1, *, internal, X)," &
"97 (BC_1, *, internal, X)," &
"98 (BC_1, BOFF, input, X),"&
"99 (BC_1, BRDY, input, X),"&
"100 (BC_2, PCHK, output3, X, 105, 1, Z),"&
"101 (BC_2, LOCK, output3, X, 106, 1, Z),"&
"102 (BC_2, PLOCK, output3, X, 106, 1, Z),"&
"103 (BC_2, BLAST, output3, X, 106, 1, Z),"&
"104 (BC_2, ADS, output3, X, 106, 1, Z),"&
"105 (BC_2, *, control, 1),"& -- DISMISC
"106 (BC_2, *, control, 1),"& -- DISBUS
"107 (BC_2, *, control, 1),"& -- DISABUS
"108 (BC_2, *, control, 1)"; -- DISWR
attribute RUNBIST_EXECUTION of ULP_GX_486 : entity is
"Wait_Duration (1.0e-3),"&
"Observing HIGHZ At_Pins, "&
"Expect_Data 0";
end ULP_GX_486;
--
-- --------------------------------------------------------------------------
-- Chris Bruemmer Intel Corporation CH6-304
-- cbruemme@sedona.intel.com 5000 W. Chandler Blvd.
-- (602) 554-9547 Chandler, AZ. 85226
-- --------------------------------------------------------------------------