-- *****************************************************************************
-- BSDL file for design S028_package_16ch
-- Created by Synopsys Version 2003.06-SP1-3 (Dec 03, 2003)
-- Designer:
-- Company:
-- Date: Fri Jan 6 17:32:37 2006
-- *****************************************************************************
entity S028_package_16ch is
-- This section identifies the default device package selected.
generic (PHYSICAL_PIN_MAP: string:= "BB260");
-- This section declares all the ports in the design.
port (
A0 : in bit;
A1 : in bit;
A2 : in bit;
A3 : in bit;
A4 : in bit;
A5 : in bit;
A6 : in bit;
A7 : in bit;
BIST_MODE : in bit;
CSB : in bit;
DSB_RDB : in bit;
IDDQ_MODE : in bit;
MPM : in bit;
RSCCK : in bit;
RSCFS : in bit;
RSCK1 : in bit;
RSCK10 : in bit;
RSCK11 : in bit;
RSCK12 : in bit;
RSCK13 : in bit;
RSCK14 : in bit;
RSCK15 : in bit;
RSCK16 : in bit;
RSCK2 : in bit;
RSCK3 : in bit;
RSCK4 : in bit;
RSCK5 : in bit;
RSCK6 : in bit;
RSCK7 : in bit;
RSCK8 : in bit;
RSCK9 : in bit;
RSD1 : in bit;
RSD10 : in bit;
RSD11 : in bit;
RSD12 : in bit;
RSD13 : in bit;
RSD14 : in bit;
RSD15 : in bit;
RSD16 : in bit;
RSD2 : in bit;
RSD3 : in bit;
RSD4 : in bit;
RSD5 : in bit;
RSD6 : in bit;
RSD7 : in bit;
RSD8 : in bit;
RSD9 : in bit;
RSF1 : in bit;
RSF10 : in bit;
RSF11 : in bit;
RSF12 : in bit;
RSF13 : in bit;
RSF14 : in bit;
RSF15 : in bit;
RSF16 : in bit;
RSF2 : in bit;
RSF3 : in bit;
RSF4 : in bit;
RSF5 : in bit;
RSF6 : in bit;
RSF7 : in bit;
RSF8 : in bit;
RSF9 : in bit;
RSTB : in bit;
R_WB_WRB : in bit;
SCAN_MODE : in bit;
SYSCLK : in bit;
TCK : in bit;
TDI : in bit;
TEST_MODE1 : in bit;
TEST_MODE2 : in bit;
TEST_MODE3 : in bit;
TEST_SE : in bit;
TMS : in bit;
TRSTB : in bit;
TSCCK : in bit;
TSCFS : in bit;
TSCK1 : in bit;
TSCK10 : in bit;
TSCK11 : in bit;
TSCK12 : in bit;
TSCK13 : in bit;
TSCK14 : in bit;
TSCK15 : in bit;
TSCK16 : in bit;
TSCK2 : in bit;
TSCK3 : in bit;
TSCK4 : in bit;
TSCK5 : in bit;
TSCK6 : in bit;
TSCK7 : in bit;
TSCK8 : in bit;
TSCK9 : in bit;
TSF1 : in bit;
TSF10 : in bit;
TSF11 : in bit;
TSF12 : in bit;
TSF13 : in bit;
TSF14 : in bit;
TSF15 : in bit;
TSF16 : in bit;
TSF2 : in bit;
TSF3 : in bit;
TSF4 : in bit;
TSF5 : in bit;
TSF6 : in bit;
TSF7 : in bit;
TSF8 : in bit;
TSF9 : in bit;
UART_CTSB : in bit;
UART_RD : in bit;
URA0 : in bit;
URA1 : in bit;
URA2 : in bit;
URA3 : in bit;
URA4 : in bit;
URCLK : in bit;
URENB : in bit;
UTA0 : in bit;
UTA1 : in bit;
UTA2 : in bit;
UTA3 : in bit;
UTA4 : in bit;
UTCLK : in bit;
UTD0 : in bit;
UTD1 : in bit;
UTD2 : in bit;
UTD3 : in bit;
UTD4 : in bit;
UTD5 : in bit;
UTD6 : in bit;
UTD7 : in bit;
UTENB : in bit;
UTSOC : in bit;
D0 : inout bit;
D1 : inout bit;
D2 : inout bit;
D3 : inout bit;
D4 : inout bit;
D5 : inout bit;
D6 : inout bit;
D7 : inout bit;
EM_D0 : inout bit;
EM_D1 : inout bit;
EM_D2 : inout bit;
EM_D3 : inout bit;
EM_D4 : inout bit;
EM_D5 : inout bit;
EM_D6 : inout bit;
EM_D7 : inout bit;
INTB : out bit;
TDO : out bit;
URCLAV : out bit;
URD0 : out bit;
URD1 : out bit;
URD2 : out bit;
URD3 : out bit;
URD4 : out bit;
URD5 : out bit;
URD6 : out bit;
URD7 : out bit;
URSOC : out bit;
UTCLAV : out bit;
BIST_DONE : buffer bit;
BIST_ERROR : buffer bit;
EM_A0 : buffer bit;
EM_A1 : buffer bit;
EM_A10 : buffer bit;
EM_A11 : buffer bit;
EM_A12 : buffer bit;
EM_A13 : buffer bit;
EM_A14 : buffer bit;
EM_A15 : buffer bit;
EM_A16 : buffer bit;
EM_A17 : buffer bit;
EM_A18 : buffer bit;
EM_A19 : buffer bit;
EM_A2 : buffer bit;
EM_A3 : buffer bit;
EM_A4 : buffer bit;
EM_A5 : buffer bit;
EM_A6 : buffer bit;
EM_A7 : buffer bit;
EM_A8 : buffer bit;
EM_A9 : buffer bit;
EM_CSB : buffer bit;
EM_OEB : buffer bit;
EM_WEB : buffer bit;
TSD1 : buffer bit;
TSD10 : buffer bit;
TSD11 : buffer bit;
TSD12 : buffer bit;
TSD13 : buffer bit;
TSD14 : buffer bit;
TSD15 : buffer bit;
TSD16 : buffer bit;
TSD2 : buffer bit;
TSD3 : buffer bit;
TSD4 : buffer bit;
TSD5 : buffer bit;
TSD6 : buffer bit;
TSD7 : buffer bit;
TSD8 : buffer bit;
TSD9 : buffer bit;
UART_RTSB : buffer bit;
UART_TD : buffer bit;
GND : linkage bit_vector (1 to 32);
NC : linkage bit_vector (1 to 2);
VDD : linkage bit_vector (1 to 20)
);
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of S028_package_16ch: entity is
"STD_1149_1_1993";
attribute PIN_MAP of S028_package_16ch: entity is PHYSICAL_PIN_MAP;
-- This section specifies the pin map for each port. This information is
-- extracted from the port-to-pin map file that was read in using the
-- "read_pin_map" command.
constant BB260: PIN_MAP_STRING :=
"A0 : P18," &
"A1 : N15," &
"A2 : N16," &
"A3 : N17," &
"A4 : N18," &
"A5 : M15," &
"A6 : M16," &
"A7 : M17," &
"BIST_MODE : D5," &
"CSB : L16," &
"DSB_RDB : M18," &
"IDDQ_MODE : C5," &
"MPM : P17," &
"RSCCK : T1," &
"RSCFS : R3," &
"RSCK1 : C2," &
"RSCK10 : K3," &
"RSCK11 : L2," &
"RSCK12 : M1," &
"RSCK13 : M4," &
"RSCK14 : N3," &
"RSCK15 : P2," &
"RSCK16 : R1," &
"RSCK2 : D2," &
"RSCK3 : E3," &
"RSCK4 : F4," &
"RSCK5 : F1," &
"RSCK6 : G2," &
"RSCK7 : H3," &
"RSCK8 : J4," &
"RSCK9 : J1," &
"RSD1 : C3," &
"RSD10 : K2," &
"RSD11 : L1," &
"RSD12 : L4," &
"RSD13 : M3," &
"RSD14 : N2," &
"RSD15 : P1," &
"RSD16 : P4," &
"RSD2 : D3," &
"RSD3 : E4," &
"RSD4 : E1," &
"RSD5 : F2," &
"RSD6 : G3," &
"RSD7 : H4," &
"RSD8 : H1," &
"RSD9 : J2," &
"RSF1 : C1," &
"RSF10 : K4," &
"RSF11 : L3," &
"RSF12 : M2," &
"RSF13 : N1," &
"RSF14 : N4," &
"RSF15 : P3," &
"RSF16 : R2," &
"RSF2 : D1," &
"RSF3 : E2," &
"RSF4 : F3," &
"RSF5 : G4," &
"RSF6 : G1," &
"RSF7 : H2," &
"RSF8 : J3," &
"RSF9 : K1," &
"RSTB : T15," &
"R_WB_WRB : L15," &
"SCAN_MODE : R15," &
"SYSCLK : C6," &
"TCK : B4," &
"TDI : A4," &
"TEST_MODE1 : B5," &
"TEST_MODE2 : A5," &
"TEST_MODE3 : D6," &
"TEST_SE : V16," &
"TMS : A3," &
"TRSTB : B3," &
"TSCCK : T2," &
"TSCFS : T3," &
"TSCK1 : V15," &
"TSCK10 : T8," &
"TSCK11 : U7," &
"TSCK12 : V6," &
"TSCK13 : R6," &
"TSCK14 : T5," &
"TSCK15 : U4," &
"TSCK16 : V3," &
"TSCK2 : U14," &
"TSCK3 : T13," &
"TSCK4 : R12," &
"TSCK5 : V12," &
"TSCK6 : U11," &
"TSCK7 : T10," &
"TSCK8 : V9," &
"TSCK9 : R9," &
"TSF1 : U15," &
"TSF10 : U8," &
"TSF11 : V7," &
"TSF12 : R7," &
"TSF13 : T6," &
"TSF14 : U5," &
"TSF15 : V4," &
"TSF16 : R4," &
"TSF2 : T14," &
"TSF3 : R13," &
"TSF4 : V13," &
"TSF5 : U12," &
"TSF6 : T11," &
"TSF7 : R10," &
"TSF8 : V10," &
"TSF9 : T9," &
"UART_CTSB : L18," &
"UART_RD : K15," &
"URA0 : E15," &
"URA1 : D18," &
"URA2 : D17," &
"URA3 : D16," &
"URA4 : C18," &
"URCLK : E17," &
"URENB : E16," &
"UTA0 : F16," &
"UTA1 : F17," &
"UTA2 : F18," &
"UTA3 : G15," &
"UTA4 : G16," &
"UTCLK : F15," &
"UTD0 : J18," &
"UTD1 : J17," &
"UTD2 : J16," &
"UTD3 : J15," &
"UTD4 : H18," &
"UTD5 : H17," &
"UTD6 : H16," &
"UTD7 : H15," &
"UTENB : G18," &
"UTSOC : G17," &
"D0 : T16," &
"D1 : T17," &
"D2 : T18," &
"D3 : R16," &
"D4 : R17," &
"D5 : R18," &
"D6 : P15," &
"D7 : P16," &
"EM_D0 : C8," &
"EM_D1 : D8," &
"EM_D2 : A7," &
"EM_D3 : B7," &
"EM_D4 : C7," &
"EM_D5 : D7," &
"EM_D6 : A6," &
"EM_D7 : B6," &
"INTB : U16," &
"TDO : C4," &
"URCLAV : C17," &
"URD0 : B14," &
"URD1 : C14," &
"URD2 : D14," &
"URD3 : A15," &
"URD4 : B15," &
"URD5 : C15," &
"URD6 : A16," &
"URD7 : B16," &
"URSOC : C16," &
"UTCLAV : E18," &
"BIST_DONE : K18," &
"BIST_ERROR : K17," &
"EM_A0 : A14," &
"EM_A1 : D13," &
"EM_A10 : C11," &
"EM_A11 : B11," &
"EM_A12 : A11," &
"EM_A13 : D10," &
"EM_A14 : C10," &
"EM_A15 : B10," &
"EM_A16 : A10," &
"EM_A17 : A9," &
"EM_A18 : B9," &
"EM_A19 : C9," &
"EM_A2 : C13," &
"EM_A3 : B13," &
"EM_A4 : A13," &
"EM_A5 : D12," &
"EM_A6 : C12," &
"EM_A7 : B12," &
"EM_A8 : A12," &
"EM_A9 : D11," &
"EM_CSB : A8," &
"EM_OEB : D9," &
"EM_WEB : B8," &
"TSD1 : R14," &
"TSD10 : R8," &
"TSD11 : T7," &
"TSD12 : U6," &
"TSD13 : V5," &
"TSD14 : R5," &
"TSD15 : T4," &
"TSD16 : U3," &
"TSD2 : V14," &
"TSD3 : U13," &
"TSD4 : T12," &
"TSD5 : R11," &
"TSD6 : V11," &
"TSD7 : U10," &
"TSD8 : U9," &
"TSD9 : V8," &
"UART_RTSB : K16," &
"UART_TD : L17," &
"GND : (H7, J7, K7, L7, G8, H8, J8, K8, L8, M8, G9, H9, J9, " &
"K9, L9, M9, G10, H10, J10, K10, L10, M10, G11, H11, J11, K11, L11, " &
"M11, H12, J12, K12, L12)," &
"NC : (D4, D15)," &
"VDD : (A1, B1, U1, V1, A2, B2, U2, V2, G7, M7, G12, M12, A17" &
", B17, U17, V17, A18, B18, U18, V18)";
-- This section specifies the TAP ports. For the TAP TCK port, the parameters in
-- the brackets are:
-- First Field : Maximum TCK frequency.
-- Second Field: Allowable states TCK may be stopped in.
attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, BOTH);
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_RESET of TRSTB: signal is true;
-- Specifies the number of bits in the instruction register.
attribute INSTRUCTION_LENGTH of S028_package_16ch: entity is 3;
-- Specifies the boundary-scan instructions implemented in the design and their
-- opcodes.
attribute INSTRUCTION_OPCODE of S028_package_16ch: entity is
"BYPASS (111, 011, 110)," &
"EXTEST (000)," &
"SAMPLE (010)," &
"CLAMP (100)," &
"HIGHZ (101)," &
"IDCODE (001)";
-- Specifies the bit pattern that is loaded into the instruction register when
-- the TAP controller passes through the Capture-IR state. The standard mandates
-- that the two LSBs must be "01". The remaining bits are design specific.
attribute INSTRUCTION_CAPTURE of S028_package_16ch: entity is "001";
-- Specifies the bit pattern that is loaded into the DEVICE_ID register during
-- the IDCODE instruction when the TAP controller passes through the Capture-DR
-- state.
attribute IDCODE_REGISTER of S028_package_16ch: entity is
"0001" &
-- 4-bit version number
"0000010010111001" &
-- 16-bit part number
"00000110011" &
-- 11-bit identity of the manufacturer
"1";
-- Required by IEEE Std 1149.1
-- This section specifies the test data register placed between TDI and TDO for
-- each implemented instruction.
attribute REGISTER_ACCESS of S028_package_16ch: entity is
"BYPASS (BYPASS, CLAMP, HIGHZ)," &
"BOUNDARY (EXTEST, SAMPLE)," &
"DEVICE_ID (IDCODE)";
-- Specifies the length of the boundary scan register.
attribute BOUNDARY_LENGTH of S028_package_16ch: entity is 224;
-- The following list specifies the characteristics of each cell in the boundary
-- scan register from TDI to TDO. The following is a description of the label
-- fields:
-- num : Is the cell number.
-- cell : Is the cell type as defined by the standard.
-- port : Is the design port name. Control cells do not have a port
-- name.
-- function: Is the function of the cell as defined by the standard. Is one
-- of input, output2, output3, bidir, control or controlr.
-- safe : Specifies the value that the BSR cell should be loaded with
-- for safe operation when the software might otherwise choose a
-- random value.
-- ccell : The control cell number. Specifies the control cell that
-- drives the output enable for this port.
-- disval : Specifies the value that is loaded into the control cell to
-- disable the output enable for the corresponding port.
-- rslt : Resulting state. Shows the state of the driver when it is
-- disabled.
attribute BOUNDARY_REGISTER of S028_package_16ch: entity is
--
-- num cell port function safe [ccell disval rslt]
--
"223 (BC_4, BIST_MODE, observe_only, X), " &
"222 (BC_4, IDDQ_MODE, observe_only, X), " &
"221 (BC_4, TEST_MODE1, observe_only, X), " &
"220 (BC_4, TEST_MODE2, observe_only, X), " &
"219 (BC_4, TEST_MODE3, observe_only, X), " &
"218 (BC_4, SYSCLK, observe_only, X), " &
"217 (BC_1, *, control, 1), " &
"216 (BC_4, EM_D7, observe_only, X), " &
"215 (BC_1, EM_D7, output3, X, 217, 1, Z), " &
"214 (BC_4, EM_D6, observe_only, X), " &
"213 (BC_1, EM_D6, output3, X, 217, 1, Z), " &
"212 (BC_4, EM_D5, observe_only, X), " &
"211 (BC_1, EM_D5, output3, X, 217, 1, Z), " &
"210 (BC_4, EM_D4, observe_only, X), " &
"209 (BC_1, EM_D4, output3, X, 217, 1, Z), " &
"208 (BC_4, EM_D3, observe_only, X), " &
"207 (BC_1, EM_D3, output3, X, 217, 1, Z), " &
"206 (BC_4, EM_D2, observe_only, X), " &
"205 (BC_1, EM_D2, output3, X, 217, 1, Z), " &
"204 (BC_4, EM_D1, observe_only, X), " &
"203 (BC_1, EM_D1, output3, X, 217, 1, Z), " &
"202 (BC_4, EM_D0, observe_only, X), " &
"201 (BC_1, EM_D0, output3, X, 217, 1, Z), " &
"200 (BC_1, EM_WEB, output2, X), " &
"199 (BC_1, EM_CSB, output2, X), " &
"198 (BC_1, EM_OEB, output2, X), " &
"197 (BC_1, EM_A19, output2, X), " &
"196 (BC_1, EM_A18, output2, X), " &
"195 (BC_1, EM_A17, output2, X), " &
"194 (BC_1, EM_A16, output2, X), " &
"193 (BC_1, EM_A15, output2, X), " &
"192 (BC_1, EM_A14, output2, X), " &
"191 (BC_1, EM_A13, output2, X), " &
"190 (BC_1, EM_A12, output2, X), " &
"189 (BC_1, EM_A11, output2, X), " &
"188 (BC_1, EM_A10, output2, X), " &
"187 (BC_1, EM_A9, output2, X), " &
"186 (BC_1, EM_A8, output2, X), " &
"185 (BC_1, EM_A7, output2, X), " &
"184 (BC_1, EM_A6, output2, X), " &
"183 (BC_1, EM_A5, output2, X), " &
"182 (BC_1, EM_A4, output2, X), " &
"181 (BC_1, EM_A3, output2, X), " &
"180 (BC_1, EM_A2, output2, X), " &
"179 (BC_1, EM_A1, output2, X), " &
"178 (BC_1, EM_A0, output2, X), " &
"177 (BC_1, *, control, 1), " &
"176 (BC_1, URD0, output3, X, 177, 1, Z), " &
"175 (BC_1, URD1, output3, X, 177, 1, Z), " &
"174 (BC_1, URD2, output3, X, 177, 1, Z), " &
"173 (BC_1, URD3, output3, X, 177, 1, Z), " &
"172 (BC_1, URD4, output3, X, 177, 1, Z), " &
"171 (BC_1, URD5, output3, X, 177, 1, Z), " &
"170 (BC_1, URD6, output3, X, 177, 1, Z), " &
"169 (BC_1, URD7, output3, X, 177, 1, Z), " &
"168 (BC_1, *, control, 1), " &
"167 (BC_1, URSOC, output3, X, 168, 1, Z), " &
"166 (BC_1, *, control, 1), " &
"165 (BC_1, URCLAV, output3, X, 166, 1, Z), " &
"164 (BC_4, URA4, observe_only, X), " &
"163 (BC_4, URA3, observe_only, X), " &
"162 (BC_4, URA2, observe_only, X), " &
"161 (BC_4, URA1, observe_only, X), " &
"160 (BC_4, URA0, observe_only, X), " &
"159 (BC_4, URENB, observe_only, X), " &
"158 (BC_4, URCLK, observe_only, X), " &
"157 (BC_1, *, control, 1), " &
"156 (BC_1, UTCLAV, output3, X, 157, 1, Z), " &
"155 (BC_4, UTCLK, observe_only, X), " &
"154 (BC_4, UTA0, observe_only, X), " &
"153 (BC_4, UTA1, observe_only, X), " &
"152 (BC_4, UTA2, observe_only, X), " &
"151 (BC_4, UTA3, observe_only, X), " &
"150 (BC_4, UTA4, observe_only, X), " &
"149 (BC_4, UTSOC, observe_only, X), " &
"148 (BC_4, UTENB, observe_only, X), " &
"147 (BC_4, UTD7, observe_only, X), " &
"146 (BC_4, UTD6, observe_only, X), " &
"145 (BC_4, UTD5, observe_only, X), " &
"144 (BC_4, UTD4, observe_only, X), " &
"143 (BC_4, UTD3, observe_only, X), " &
"142 (BC_4, UTD2, observe_only, X), " &
"141 (BC_4, UTD1, observe_only, X), " &
"140 (BC_4, UTD0, observe_only, X), " &
"139 (BC_1, BIST_DONE, output2, X), " &
"138 (BC_1, BIST_ERROR, output2, X), " &
"137 (BC_1, UART_RTSB, output2, X), " &
"136 (BC_4, UART_RD, observe_only, X), " &
"135 (BC_4, UART_CTSB, observe_only, X), " &
"134 (BC_1, UART_TD, output2, X), " &
"133 (BC_4, CSB, observe_only, X), " &
"132 (BC_4, R_WB_WRB, observe_only, X), " &
"131 (BC_4, DSB_RDB, observe_only, X), " &
"130 (BC_4, A7, observe_only, X), " &
"129 (BC_4, A6, observe_only, X), " &
"128 (BC_4, A5, observe_only, X), " &
"127 (BC_4, A4, observe_only, X), " &
"126 (BC_4, A3, observe_only, X), " &
"125 (BC_4, A2, observe_only, X), " &
"124 (BC_4, A1, observe_only, X), " &
"123 (BC_4, A0, observe_only, X), " &
"122 (BC_4, MPM, observe_only, X), " &
"121 (BC_1, *, control, 1), " &
"120 (BC_4, D7, observe_only, X), " &
"119 (BC_1, D7, output3, X, 121, 1, Z), " &
"118 (BC_4, D6, observe_only, X), " &
"117 (BC_1, D6, output3, X, 121, 1, Z), " &
"116 (BC_4, D5, observe_only, X), " &
"115 (BC_1, D5, output3, X, 121, 1, Z), " &
"114 (BC_4, D4, observe_only, X), " &
"113 (BC_1, D4, output3, X, 121, 1, Z), " &
"112 (BC_4, D3, observe_only, X), " &
"111 (BC_1, D3, output3, X, 121, 1, Z), " &
"110 (BC_4, D2, observe_only, X), " &
"109 (BC_1, D2, output3, X, 121, 1, Z), " &
"108 (BC_4, D1, observe_only, X), " &
"107 (BC_1, D1, output3, X, 121, 1, Z), " &
"106 (BC_4, D0, observe_only, X), " &
"105 (BC_1, D0, output3, X, 121, 1, Z), " &
"104 (BC_1, *, control, 1), " &
"103 (BC_1, INTB, output3, X, 104, 1, Z), " &
"102 (BC_4, TEST_SE, observe_only, X), " &
"101 (BC_4, SCAN_MODE, observe_only, X), " &
"100 (BC_4, RSTB, observe_only, X), " &
"99 (BC_4, TSF1, observe_only, X), " &
"98 (BC_4, TSCK1, observe_only, X), " &
"97 (BC_1, TSD1, output2, X), " &
"96 (BC_4, TSF2, observe_only, X), " &
"95 (BC_4, TSCK2, observe_only, X), " &
"94 (BC_1, TSD2, output2, X), " &
"93 (BC_4, TSF3, observe_only, X), " &
"92 (BC_4, TSCK3, observe_only, X), " &
"91 (BC_1, TSD3, output2, X), " &
"90 (BC_4, TSF4, observe_only, X), " &
"89 (BC_4, TSCK4, observe_only, X), " &
"88 (BC_1, TSD4, output2, X), " &
"87 (BC_4, TSF5, observe_only, X), " &
"86 (BC_4, TSCK5, observe_only, X), " &
"85 (BC_1, TSD5, output2, X), " &
"84 (BC_4, TSF6, observe_only, X), " &
"83 (BC_4, TSCK6, observe_only, X), " &
"82 (BC_1, TSD6, output2, X), " &
"81 (BC_4, TSF7, observe_only, X), " &
"80 (BC_4, TSCK7, observe_only, X), " &
"79 (BC_1, TSD7, output2, X), " &
"78 (BC_4, TSF8, observe_only, X), " &
"77 (BC_4, TSCK8, observe_only, X), " &
"76 (BC_1, TSD8, output2, X), " &
"75 (BC_4, TSF9, observe_only, X), " &
"74 (BC_4, TSCK9, observe_only, X), " &
"73 (BC_1, TSD9, output2, X), " &
"72 (BC_4, TSF10, observe_only, X), " &
"71 (BC_4, TSCK10, observe_only, X), " &
"70 (BC_1, TSD10, output2, X), " &
"69 (BC_4, TSF11, observe_only, X), " &
"68 (BC_4, TSCK11, observe_only, X), " &
"67 (BC_1, TSD11, output2, X), " &
"66 (BC_4, TSF12, observe_only, X), " &
"65 (BC_4, TSCK12, observe_only, X), " &
"64 (BC_1, TSD12, output2, X), " &
"63 (BC_4, TSF13, observe_only, X), " &
"62 (BC_4, TSCK13, observe_only, X), " &
"61 (BC_1, TSD13, output2, X), " &
"60 (BC_4, TSF14, observe_only, X), " &
"59 (BC_4, TSCK14, observe_only, X), " &
"58 (BC_1, TSD14, output2, X), " &
"57 (BC_4, TSF15, observe_only, X), " &
"56 (BC_4, TSCK15, observe_only, X), " &
"55 (BC_1, TSD15, output2, X), " &
"54 (BC_4, TSF16, observe_only, X), " &
"53 (BC_4, TSCK16, observe_only, X), " &
"52 (BC_1, TSD16, output2, X), " &
"51 (BC_4, TSCFS, observe_only, X), " &
"50 (BC_4, TSCCK, observe_only, X), " &
"49 (BC_4, RSCCK, observe_only, X), " &
"48 (BC_4, RSCFS, observe_only, X), " &
"47 (BC_4, RSF16, observe_only, X), " &
"46 (BC_4, RSCK16, observe_only, X), " &
"45 (BC_4, RSD16, observe_only, X), " &
"44 (BC_4, RSF15, observe_only, X), " &
"43 (BC_4, RSCK15, observe_only, X), " &
"42 (BC_4, RSD15, observe_only, X), " &
"41 (BC_4, RSF14, observe_only, X), " &
"40 (BC_4, RSCK14, observe_only, X), " &
"39 (BC_4, RSD14, observe_only, X), " &
"38 (BC_4, RSF13, observe_only, X), " &
"37 (BC_4, RSCK13, observe_only, X), " &
"36 (BC_4, RSD13, observe_only, X), " &
"35 (BC_4, RSF12, observe_only, X), " &
"34 (BC_4, RSCK12, observe_only, X), " &
"33 (BC_4, RSD12, observe_only, X), " &
"32 (BC_4, RSF11, observe_only, X), " &
"31 (BC_4, RSCK11, observe_only, X), " &
"30 (BC_4, RSD11, observe_only, X), " &
"29 (BC_4, RSF10, observe_only, X), " &
"28 (BC_4, RSCK10, observe_only, X), " &
"27 (BC_4, RSD10, observe_only, X), " &
"26 (BC_4, RSF9, observe_only, X), " &
"25 (BC_4, RSCK9, observe_only, X), " &
"24 (BC_4, RSD9, observe_only, X), " &
"23 (BC_4, RSF8, observe_only, X), " &
"22 (BC_4, RSCK8, observe_only, X), " &
"21 (BC_4, RSD8, observe_only, X), " &
"20 (BC_4, RSF7, observe_only, X), " &
"19 (BC_4, RSCK7, observe_only, X), " &
"18 (BC_4, RSD7, observe_only, X), " &
"17 (BC_4, RSF6, observe_only, X), " &
"16 (BC_4, RSCK6, observe_only, X), " &
"15 (BC_4, RSD6, observe_only, X), " &
"14 (BC_4, RSF5, observe_only, X), " &
"13 (BC_4, RSCK5, observe_only, X), " &
"12 (BC_4, RSD5, observe_only, X), " &
"11 (BC_4, RSF4, observe_only, X), " &
"10 (BC_4, RSCK4, observe_only, X), " &
"9 (BC_4, RSD4, observe_only, X), " &
"8 (BC_4, RSF3, observe_only, X), " &
"7 (BC_4, RSCK3, observe_only, X), " &
"6 (BC_4, RSD3, observe_only, X), " &
"5 (BC_4, RSF2, observe_only, X), " &
"4 (BC_4, RSCK2, observe_only, X), " &
"3 (BC_4, RSD2, observe_only, X), " &
"2 (BC_4, RSF1, observe_only, X), " &
"1 (BC_4, RSCK1, observe_only, X), " &
"0 (BC_4, RSD1, observe_only, X) ";
end S028_package_16ch;