--//*****************************************************************************
--//
--// tm4c129encpdt_ra0_tqfp_v0p1.bsdl - Boundary Scan Description Language (BSDL)
--// file for the Texas Instruments TM4C129ENCPDT Stellaris
--// microcontroller.
--//
--// Version 0.1 - 07/25/2013 - Preliminary Release of BSDL entity
--// - TM4C129ENCPDT, Revision A0, 128-lead TQFP
--//
--//
--// Copyright (c) 2013 Texas Instruments, Inc. All rights reserved.
--//
--// Software License Agreement
--//
--// Texas Instruments, Inc. (TI) is supplying this software for use solely and
--// exclusively on TI's Stellaris Family of microcontroller products.
--//
--// The software is owned by TI and/or its suppliers, and is protected under
--// applicable copyright laws. All rights are reserved. Any use in violation
--// of the foregoing restrictions may subject the user to criminal sanctions
--// under applicable laws, as well as to civil liability for the breach of the
--// terms and conditions of this license.
--//
--// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS,
--// IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES
--// OF THE MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS
--// SOFTWARE. TI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
--// INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
--//
--//*****************************************************************************
entity TM4C129ENCPDT is generic(PHYSICAL_PIN_MAP : string := "TQFP_128");
port ( EN0RXIN: linkage bit;
EN0RXIP: linkage bit;
EN0TXON: linkage bit;
EN0TXOP: linkage bit;
GND: linkage bit_vector(0 to 5);
GNDA: linkage bit;
HIB: linkage bit;
OSC0: linkage bit;
OSC1: linkage bit;
PA0: inout bit;
PA1: inout bit;
PA2: inout bit;
PA3: inout bit;
PA4: inout bit;
PA5: inout bit;
PA6: inout bit;
PA7: inout bit;
PB0: inout bit;
PB1: inout bit;
PB2: inout bit;
PB3: inout bit;
PB4: inout bit;
PB5: inout bit;
PC4: inout bit;
PC5: inout bit;
PC6: inout bit;
PC7: inout bit;
PD0: inout bit;
PD1: inout bit;
PD2: inout bit;
PD3: inout bit;
PD4: inout bit;
PD5: inout bit;
PD6: inout bit;
PD7: inout bit;
PE0: inout bit;
PE1: inout bit;
PE2: inout bit;
PE3: inout bit;
PE4: inout bit;
PE5: inout bit;
PF0: inout bit;
PF1: inout bit;
PF2: inout bit;
PF3: inout bit;
PF4: inout bit;
PG0: inout bit;
PG1: inout bit;
PH0: inout bit;
PH1: inout bit;
PH2: inout bit;
PH3: inout bit;
PJ0: inout bit;
PJ1: inout bit;
PK0: inout bit;
PK1: inout bit;
PK2: inout bit;
PK3: inout bit;
PK4: inout bit;
PK5: inout bit;
PK6: inout bit;
PK7: inout bit;
PL0: inout bit;
PL1: inout bit;
PL2: inout bit;
PL3: inout bit;
PL4: inout bit;
PL5: inout bit;
PL6: inout bit;
PL7: inout bit;
PM0: inout bit;
PM1: inout bit;
PM2: inout bit;
PM3: inout bit;
PM4: inout bit;
PM5: inout bit;
PM6: inout bit;
PM7: inout bit;
PN0: inout bit;
PN1: inout bit;
PN2: inout bit;
PN3: inout bit;
PN4: inout bit;
PN5: inout bit;
PP0: inout bit;
PP1: inout bit;
PP2: inout bit;
PP3: inout bit;
PP4: inout bit;
PP5: inout bit;
PQ0: inout bit;
PQ1: inout bit;
PQ2: inout bit;
PQ3: inout bit;
PQ4: inout bit;
RBIAS: linkage bit;
RST: in bit;
TCK: in bit;
TDI: in bit;
TDO: out bit;
TMS: in bit;
VBAT: linkage bit;
VDD: linkage bit_vector(0 to 13);
VDDA: linkage bit;
VDDC: linkage bit_vector(0 to 1);
VREFAP: linkage bit;
WAKE: linkage bit;
XOSC0: linkage bit;
XOSC1: linkage bit
);
use STD_1149_1_2001.all; -- Get IEEE 1149.1-2001 attributes and definitions
attribute COMPONENT_CONFORMANCE of TM4C129ENCPDT : entity is "STD_1149_1_2001";
attribute PIN_MAP of TM4C129ENCPDT : entity is PHYSICAL_PIN_MAP;
constant TQFP_128 : PIN_MAP_STRING :=
"PD0: 1, " &
"PD1: 2, " &
"PD2: 3, " &
"PD3: 4, " &
"PQ0: 5, " &
"PQ1: 6, " &
"VDDA: 8, " &
"VREFAP: 9, " &
"GNDA: 10, " &
"PQ2: 11, " &
"PE3: 12, " &
"PE2: 13, " &
"PE1: 14, " &
"PE0: 15, " &
"PK0: 18, " &
"PK1: 19, " &
"PK2: 20, " &
"PK3: 21, " &
"PC7: 22, " &
"PC6: 23, " &
"PC5: 24, " &
"PC4: 25, " &
"PQ3: 27, " &
"PH0: 29, " &
"PH1: 30, " &
"PH2: 31, " &
"PH3: 32, " &
"PA0: 33, " &
"PA1: 34, " &
"PA2: 35, " &
"PA3: 36, " &
"PA4: 37, " &
"PA5: 38, " &
"PA6: 40, " &
"PA7: 41, " &
"PF0: 42, " &
"PF1: 43, " &
"PF2: 44, " &
"PF3: 45, " &
"PF4: 46, " &
"PG0: 49, " &
"PG1: 50, " &
"EN0RXIN: 53, " &
"EN0RXIP: 54, " &
"EN0TXON: 56, " &
"EN0TXOP: 57, " &
"RBIAS: 59, " &
"PK7: 60, " &
"PK6: 61, " &
"PK5: 62, " &
"PK4: 63, " &
"WAKE: 64, " &
"HIB: 65, " &
"XOSC0: 66, " &
"XOSC1: 67, " &
"VBAT: 68, " &
"RST: 70, " &
"PM7: 71, " &
"PM6: 72, " &
"PM5: 73, " &
"PM4: 74, " &
"PM3: 75, " &
"PM2: 76, " &
"PM1: 77, " &
"PM0: 78, " &
"PL0: 81, " &
"PL1: 82, " &
"PL2: 83, " &
"PL3: 84, " &
"PL4: 85, " &
"PL5: 86, " &
"OSC0: 88, " &
"OSC1: 89, " &
"PB2: 91, " &
"PB3: 92, " &
"PL7: 93, " &
"PL6: 94, " &
"PB0: 95, " &
"PB1: 96, " &
"TDO: 97, " &
"TDI: 98, " &
"TMS: 99, " &
"TCK: 100, " &
"PQ4: 102, " &
"PP2: 103, " &
"PP3: 104, " &
"PP4: 105, " &
"PP5: 106, " &
"PN0: 107, " &
"PN1: 108, " &
"PN2: 109, " &
"PN3: 110, " &
"PN4: 111, " &
"PN5: 112, " &
"PJ0: 116, " &
"PJ1: 117, " &
"PP0: 118, " &
"PP1: 119, " &
"PB5: 120, " &
"PB4: 121, " &
"PE4: 123, " &
"PE5: 124, " &
"PD4: 125, " &
"PD5: 126, " &
"PD6: 127, " &
"PD7: 128, " &
"GND: ( 17, 48, 55, 58, 80, 114 ), " &
"VDD: ( 7, 16, 26, 28, 39, 47, 51, 52, 69, 79, 90, 101, 113, 122 ), " &
"VDDC: ( 87, 115 ) " ;
attribute TAP_SCAN_CLOCK of TCK : signal is (10.00e+06, BOTH);
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute INSTRUCTION_LENGTH of TM4C129ENCPDT : entity is 4;
attribute INSTRUCTION_OPCODE of TM4C129ENCPDT : entity is
"EXTEST (0000), " &
"SAMPLE (0010), " &
"PRELOAD (0010), " &
"ABORT (1000), " &
"DPACC (1010), " &
"APACC (1011), " &
"IDCODE (1110), " &
"BYPASS (1111) " ;
attribute INSTRUCTION_CAPTURE of TM4C129ENCPDT : entity is "0001";
attribute IDCODE_REGISTER of TM4C129ENCPDT : entity is
"0100" & -- Version (Fifth Revision)
"1011101000000000" & -- Part number (ARM Cortex M4)
"01000111011" & -- Manufacturer Identity (ARM)
"1"; -- Mandatory LSB
-- IDCODE = 4BA00477
attribute INSTRUCTION_PRIVATE of TM4C129ENCPDT : entity is
"ABORT, DPACC, APACC"; -- ARM Debug Access Port Instructions
attribute REGISTER_ACCESS of TM4C129ENCPDT : entity is
"BOUNDARY (EXTEST, SAMPLE, PRELOAD), " &
"DEVICE_ID (IDCODE), " &
"BYPASS (BYPASS) " ;
attribute BOUNDARY_LENGTH of TM4C129ENCPDT : entity is 261;
attribute BOUNDARY_REGISTER of TM4C129ENCPDT : entity is
-- num cell port function safe [ ccell disval rslt ]
-- --- ---- -------------- -------- ---- ------ ------ ------
" 0 (BC_1, *, CONTROL, 1 ), " &
" 1 (BC_1, PD7, OUTPUT3, X , 0, 1, Z ), " &
" 2 (BC_1, PD7, INPUT, X ), " &
" 3 (BC_1, *, CONTROL, 1 ), " &
" 4 (BC_1, PD6, OUTPUT3, X , 3, 1, Z ), " &
" 5 (BC_1, PD6, INPUT, X ), " &
" 6 (BC_1, *, CONTROL, 1 ), " &
" 7 (BC_1, PD5, OUTPUT3, X , 6, 1, Z ), " &
" 8 (BC_1, PD5, INPUT, X ), " &
" 9 (BC_1, *, CONTROL, 1 ), " &
" 10 (BC_1, PD4, OUTPUT3, X , 9, 1, Z ), " &
" 11 (BC_1, PD4, INPUT, X ), " &
" 12 (BC_1, *, CONTROL, 1 ), " &
" 13 (BC_1, PE5, OUTPUT3, X , 12, 1, Z ), " &
" 14 (BC_1, PE5, INPUT, X ), " &
" 15 (BC_1, *, CONTROL, 1 ), " &
" 16 (BC_1, PE4, OUTPUT3, X , 15, 1, Z ), " &
" 17 (BC_1, PE4, INPUT, X ), " &
" 18 (BC_1, *, CONTROL, 1 ), " &
" 19 (BC_1, PB4, OUTPUT3, X , 18, 1, Z ), " &
" 20 (BC_1, PB4, INPUT, X ), " &
" 21 (BC_1, *, CONTROL, 1 ), " &
" 22 (BC_1, PB5, OUTPUT3, X , 21, 1, Z ), " &
" 23 (BC_1, PB5, INPUT, X ), " &
" 24 (BC_1, *, CONTROL, 1 ), " &
" 25 (BC_1, PP1, OUTPUT3, X , 24, 1, Z ), " &
" 26 (BC_1, PP1, INPUT, X ), " &
" 27 (BC_1, *, CONTROL, 1 ), " &
" 28 (BC_1, PP0, OUTPUT3, X , 27, 1, Z ), " &
" 29 (BC_1, PP0, INPUT, X ), " &
" 30 (BC_1, *, CONTROL, 1 ), " &
" 31 (BC_1, PJ1, OUTPUT3, X , 30, 1, Z ), " &
" 32 (BC_1, PJ1, INPUT, X ), " &
" 33 (BC_1, *, CONTROL, 1 ), " &
" 34 (BC_1, PJ0, OUTPUT3, X , 33, 1, Z ), " &
" 35 (BC_1, PJ0, INPUT, X ), " &
" 36 (BC_1, *, CONTROL, 1 ), " &
" 37 (BC_1, PN5, OUTPUT3, X , 36, 1, Z ), " &
" 38 (BC_1, PN5, INPUT, X ), " &
" 39 (BC_1, *, CONTROL, 1 ), " &
" 40 (BC_1, PN4, OUTPUT3, X , 39, 1, Z ), " &
" 41 (BC_1, PN4, INPUT, X ), " &
" 42 (BC_1, *, CONTROL, 1 ), " &
" 43 (BC_1, PN3, OUTPUT3, X , 42, 1, Z ), " &
" 44 (BC_1, PN3, INPUT, X ), " &
" 45 (BC_1, *, CONTROL, 1 ), " &
" 46 (BC_1, PN2, OUTPUT3, X , 45, 1, Z ), " &
" 47 (BC_1, PN2, INPUT, X ), " &
" 48 (BC_1, *, CONTROL, 1 ), " &
" 49 (BC_1, PN1, OUTPUT3, X , 48, 1, Z ), " &
" 50 (BC_1, PN1, INPUT, X ), " &
" 51 (BC_1, *, CONTROL, 1 ), " &
" 52 (BC_1, PN0, OUTPUT3, X , 51, 1, Z ), " &
" 53 (BC_1, PN0, INPUT, X ), " &
" 54 (BC_1, *, CONTROL, 1 ), " &
" 55 (BC_1, PP5, OUTPUT3, X , 54, 1, Z ), " &
" 56 (BC_1, PP5, INPUT, X ), " &
" 57 (BC_1, *, CONTROL, 1 ), " &
" 58 (BC_1, PP4, OUTPUT3, X , 57, 1, Z ), " &
" 59 (BC_1, PP4, INPUT, X ), " &
" 60 (BC_1, *, CONTROL, 1 ), " &
" 61 (BC_1, PP3, OUTPUT3, X , 60, 1, Z ), " &
" 62 (BC_1, PP3, INPUT, X ), " &
" 63 (BC_1, *, CONTROL, 1 ), " &
" 64 (BC_1, PP2, OUTPUT3, X , 63, 1, Z ), " &
" 65 (BC_1, PP2, INPUT, X ), " &
" 66 (BC_1, *, CONTROL, 1 ), " &
" 67 (BC_1, PQ4, OUTPUT3, X , 66, 1, Z ), " &
" 68 (BC_1, PQ4, INPUT, X ), " &
" 69 (BC_1, *, CONTROL, 1 ), " &
" 70 (BC_1, PB1, OUTPUT3, X , 69, 1, Z ), " &
" 71 (BC_1, PB1, INPUT, X ), " &
" 72 (BC_1, *, CONTROL, 1 ), " &
" 73 (BC_1, PB0, OUTPUT3, X , 72, 1, Z ), " &
" 74 (BC_1, PB0, INPUT, X ), " &
" 75 (BC_1, *, CONTROL, 1 ), " &
" 76 (BC_1, PL6, OUTPUT3, X , 75, 1, Z ), " &
" 77 (BC_1, PL6, INPUT, X ), " &
" 78 (BC_1, *, CONTROL, 1 ), " &
" 79 (BC_1, PL7, OUTPUT3, X , 78, 1, Z ), " &
" 80 (BC_1, PL7, INPUT, X ), " &
" 81 (BC_1, *, CONTROL, 1 ), " &
" 82 (BC_1, PB3, OUTPUT3, X , 81, 1, Z ), " &
" 83 (BC_1, PB3, INPUT, X ), " &
" 84 (BC_1, *, CONTROL, 1 ), " &
" 85 (BC_1, PB2, OUTPUT3, X , 84, 1, Z ), " &
" 86 (BC_1, PB2, INPUT, X ), " &
" 87 (BC_4, *, INTERNAL, 0 ), " &
" 88 (BC_4, *, INTERNAL, 0 ), " &
" 89 (BC_1, *, CONTROL, 1 ), " &
" 90 (BC_1, PL5, OUTPUT3, X , 89, 1, Z ), " &
" 91 (BC_1, PL5, INPUT, X ), " &
" 92 (BC_1, *, CONTROL, 1 ), " &
" 93 (BC_1, PL4, OUTPUT3, X , 92, 1, Z ), " &
" 94 (BC_1, PL4, INPUT, X ), " &
" 95 (BC_1, *, CONTROL, 1 ), " &
" 96 (BC_1, PL3, OUTPUT3, X , 95, 1, Z ), " &
" 97 (BC_1, PL3, INPUT, X ), " &
" 98 (BC_1, *, CONTROL, 1 ), " &
" 99 (BC_1, PL2, OUTPUT3, X , 98, 1, Z ), " &
" 100 (BC_1, PL2, INPUT, X ), " &
" 101 (BC_1, *, CONTROL, 1 ), " &
" 102 (BC_1, PL1, OUTPUT3, X , 101, 1, Z ), " &
" 103 (BC_1, PL1, INPUT, X ), " &
" 104 (BC_1, *, CONTROL, 1 ), " &
" 105 (BC_1, PL0, OUTPUT3, X , 104, 1, Z ), " &
" 106 (BC_1, PL0, INPUT, X ), " &
" 107 (BC_1, *, CONTROL, 1 ), " &
" 108 (BC_1, PM0, OUTPUT3, X , 107, 1, Z ), " &
" 109 (BC_1, PM0, INPUT, X ), " &
" 110 (BC_1, *, CONTROL, 1 ), " &
" 111 (BC_1, PM1, OUTPUT3, X , 110, 1, Z ), " &
" 112 (BC_1, PM1, INPUT, X ), " &
" 113 (BC_1, *, CONTROL, 1 ), " &
" 114 (BC_1, PM2, OUTPUT3, X , 113, 1, Z ), " &
" 115 (BC_1, PM2, INPUT, X ), " &
" 116 (BC_1, *, CONTROL, 1 ), " &
" 117 (BC_1, PM3, OUTPUT3, X , 116, 1, Z ), " &
" 118 (BC_1, PM3, INPUT, X ), " &
" 119 (BC_1, *, CONTROL, 1 ), " &
" 120 (BC_1, PM4, OUTPUT3, X , 119, 1, Z ), " &
" 121 (BC_1, PM4, INPUT, X ), " &
" 122 (BC_1, *, CONTROL, 1 ), " &
" 123 (BC_1, PM5, OUTPUT3, X , 122, 1, Z ), " &
" 124 (BC_1, PM5, INPUT, X ), " &
" 125 (BC_1, *, CONTROL, 1 ), " &
" 126 (BC_1, PM6, OUTPUT3, X , 125, 1, Z ), " &
" 127 (BC_1, PM6, INPUT, X ), " &
" 128 (BC_1, *, CONTROL, 1 ), " &
" 129 (BC_1, PM7, OUTPUT3, X , 128, 1, Z ), " &
" 130 (BC_1, PM7, INPUT, X ), " &
" 131 (BC_1, RST, INPUT, 0 ), " &
" 132 (BC_1, *, CONTROL, 1 ), " &
" 133 (BC_1, PK4, OUTPUT3, X , 132, 1, Z ), " &
" 134 (BC_1, PK4, INPUT, X ), " &
" 135 (BC_1, *, CONTROL, 1 ), " &
" 136 (BC_1, PK5, OUTPUT3, X , 135, 1, Z ), " &
" 137 (BC_1, PK5, INPUT, X ), " &
" 138 (BC_1, *, CONTROL, 1 ), " &
" 139 (BC_1, PK6, OUTPUT3, X , 138, 1, Z ), " &
" 140 (BC_1, PK6, INPUT, X ), " &
" 141 (BC_1, *, CONTROL, 1 ), " &
" 142 (BC_1, PK7, OUTPUT3, X , 141, 1, Z ), " &
" 143 (BC_1, PK7, INPUT, X ), " &
" 144 (BC_1, *, CONTROL, 1 ), " &
" 145 (BC_1, PG1, OUTPUT3, X , 144, 1, Z ), " &
" 146 (BC_1, PG1, INPUT, X ), " &
" 147 (BC_1, *, CONTROL, 1 ), " &
" 148 (BC_1, PG0, OUTPUT3, X , 147, 1, Z ), " &
" 149 (BC_1, PG0, INPUT, X ), " &
" 150 (BC_1, *, CONTROL, 1 ), " &
" 151 (BC_1, PF4, OUTPUT3, X , 150, 1, Z ), " &
" 152 (BC_1, PF4, INPUT, X ), " &
" 153 (BC_1, *, CONTROL, 1 ), " &
" 154 (BC_1, PF3, OUTPUT3, X , 153, 1, Z ), " &
" 155 (BC_1, PF3, INPUT, X ), " &
" 156 (BC_1, *, CONTROL, 1 ), " &
" 157 (BC_1, PF2, OUTPUT3, X , 156, 1, Z ), " &
" 158 (BC_1, PF2, INPUT, X ), " &
" 159 (BC_1, *, CONTROL, 1 ), " &
" 160 (BC_1, PF1, OUTPUT3, X , 159, 1, Z ), " &
" 161 (BC_1, PF1, INPUT, X ), " &
" 162 (BC_1, *, CONTROL, 1 ), " &
" 163 (BC_1, PF0, OUTPUT3, X , 162, 1, Z ), " &
" 164 (BC_1, PF0, INPUT, X ), " &
" 165 (BC_1, *, CONTROL, 1 ), " &
" 166 (BC_1, PA7, OUTPUT3, X , 165, 1, Z ), " &
" 167 (BC_1, PA7, INPUT, X ), " &
" 168 (BC_1, *, CONTROL, 1 ), " &
" 169 (BC_1, PA6, OUTPUT3, X , 168, 1, Z ), " &
" 170 (BC_1, PA6, INPUT, X ), " &
" 171 (BC_1, *, CONTROL, 1 ), " &
" 172 (BC_1, PA5, OUTPUT3, X , 171, 1, Z ), " &
" 173 (BC_1, PA5, INPUT, X ), " &
" 174 (BC_1, *, CONTROL, 1 ), " &
" 175 (BC_1, PA4, OUTPUT3, X , 174, 1, Z ), " &
" 176 (BC_1, PA4, INPUT, X ), " &
" 177 (BC_1, *, CONTROL, 1 ), " &
" 178 (BC_1, PA3, OUTPUT3, X , 177, 1, Z ), " &
" 179 (BC_1, PA3, INPUT, X ), " &
" 180 (BC_1, *, CONTROL, 1 ), " &
" 181 (BC_1, PA2, OUTPUT3, X , 180, 1, Z ), " &
" 182 (BC_1, PA2, INPUT, X ), " &
" 183 (BC_1, *, CONTROL, 1 ), " &
" 184 (BC_1, PA1, OUTPUT3, X , 183, 1, Z ), " &
" 185 (BC_1, PA1, INPUT, X ), " &
" 186 (BC_1, *, CONTROL, 1 ), " &
" 187 (BC_1, PA0, OUTPUT3, X , 186, 1, Z ), " &
" 188 (BC_1, PA0, INPUT, X ), " &
" 189 (BC_1, *, CONTROL, 1 ), " &
" 190 (BC_1, PH3, OUTPUT3, X , 189, 1, Z ), " &
" 191 (BC_1, PH3, INPUT, X ), " &
" 192 (BC_1, *, CONTROL, 1 ), " &
" 193 (BC_1, PH2, OUTPUT3, X , 192, 1, Z ), " &
" 194 (BC_1, PH2, INPUT, X ), " &
" 195 (BC_1, *, CONTROL, 1 ), " &
" 196 (BC_1, PH1, OUTPUT3, X , 195, 1, Z ), " &
" 197 (BC_1, PH1, INPUT, X ), " &
" 198 (BC_1, *, CONTROL, 1 ), " &
" 199 (BC_1, PH0, OUTPUT3, X , 198, 1, Z ), " &
" 200 (BC_1, PH0, INPUT, X ), " &
" 201 (BC_1, *, CONTROL, 1 ), " &
" 202 (BC_1, PQ3, OUTPUT3, X , 201, 1, Z ), " &
" 203 (BC_1, PQ3, INPUT, X ), " &
" 204 (BC_1, *, CONTROL, 1 ), " &
" 205 (BC_1, PC4, OUTPUT3, X , 204, 1, Z ), " &
" 206 (BC_1, PC4, INPUT, X ), " &
" 207 (BC_1, *, CONTROL, 1 ), " &
" 208 (BC_1, PC5, OUTPUT3, X , 207, 1, Z ), " &
" 209 (BC_1, PC5, INPUT, X ), " &
" 210 (BC_1, *, CONTROL, 1 ), " &
" 211 (BC_1, PC6, OUTPUT3, X , 210, 1, Z ), " &
" 212 (BC_1, PC6, INPUT, X ), " &
" 213 (BC_1, *, CONTROL, 1 ), " &
" 214 (BC_1, PC7, OUTPUT3, X , 213, 1, Z ), " &
" 215 (BC_1, PC7, INPUT, X ), " &
" 216 (BC_1, *, CONTROL, 1 ), " &
" 217 (BC_1, PK3, OUTPUT3, X , 216, 1, Z ), " &
" 218 (BC_1, PK3, INPUT, X ), " &
" 219 (BC_1, *, CONTROL, 1 ), " &
" 220 (BC_1, PK2, OUTPUT3, X , 219, 1, Z ), " &
" 221 (BC_1, PK2, INPUT, X ), " &
" 222 (BC_1, *, CONTROL, 1 ), " &
" 223 (BC_1, PK1, OUTPUT3, X , 222, 1, Z ), " &
" 224 (BC_1, PK1, INPUT, X ), " &
" 225 (BC_1, *, CONTROL, 1 ), " &
" 226 (BC_1, PK0, OUTPUT3, X , 225, 1, Z ), " &
" 227 (BC_1, PK0, INPUT, X ), " &
" 228 (BC_1, *, CONTROL, 1 ), " &
" 229 (BC_1, PE0, OUTPUT3, X , 228, 1, Z ), " &
" 230 (BC_1, PE0, INPUT, X ), " &
" 231 (BC_1, *, CONTROL, 1 ), " &
" 232 (BC_1, PE1, OUTPUT3, X , 231, 1, Z ), " &
" 233 (BC_1, PE1, INPUT, X ), " &
" 234 (BC_1, *, CONTROL, 1 ), " &
" 235 (BC_1, PE2, OUTPUT3, X , 234, 1, Z ), " &
" 236 (BC_1, PE2, INPUT, X ), " &
" 237 (BC_1, *, CONTROL, 1 ), " &
" 238 (BC_1, PE3, OUTPUT3, X , 237, 1, Z ), " &
" 239 (BC_1, PE3, INPUT, X ), " &
" 240 (BC_1, *, CONTROL, 1 ), " &
" 241 (BC_1, PQ2, OUTPUT3, X , 240, 1, Z ), " &
" 242 (BC_1, PQ2, INPUT, X ), " &
" 243 (BC_1, *, CONTROL, 1 ), " &
" 244 (BC_1, PQ1, OUTPUT3, X , 243, 1, Z ), " &
" 245 (BC_1, PQ1, INPUT, X ), " &
" 246 (BC_1, *, CONTROL, 1 ), " &
" 247 (BC_1, PQ0, OUTPUT3, X , 246, 1, Z ), " &
" 248 (BC_1, PQ0, INPUT, X ), " &
" 249 (BC_1, *, CONTROL, 1 ), " &
" 250 (BC_1, PD3, OUTPUT3, X , 249, 1, Z ), " &
" 251 (BC_1, PD3, INPUT, X ), " &
" 252 (BC_1, *, CONTROL, 1 ), " &
" 253 (BC_1, PD2, OUTPUT3, X , 252, 1, Z ), " &
" 254 (BC_1, PD2, INPUT, X ), " &
" 255 (BC_1, *, CONTROL, 1 ), " &
" 256 (BC_1, PD1, OUTPUT3, X , 255, 1, Z ), " &
" 257 (BC_1, PD1, INPUT, X ), " &
" 258 (BC_1, *, CONTROL, 1 ), " &
" 259 (BC_1, PD0, OUTPUT3, X , 258, 1, Z ), " &
" 260 (BC_1, PD0, INPUT, X ) ";
end TM4C129ENCPDT;