-- Copyright (C) 1994-2005 Altera Corporation
-- File Name : 8282T100.BSD
-- Device : EPF8282T100
-- Package : 100-pin Thin Quad Flat-Pack (TQFP)
-- Created by : Altera Corporation
-- BSDL revision : 2.23
-- BSDL status : Final
-- Revision : 1.0, 11/17/97
-- History : 2.1
-- : 2.2 11/17/97
-- : 2.21, 8/13/98
-- Added Conformance to STD_1149_1_1994.all
-- : 2.22, 7/26/2001
-- Adds minor design warning attribute
-- : 2.23, 8/23/02
-- Changed file status from tested to final
-- Verification : Software syntax checked on:
-- ASSET Tool Box ver. 2.3d
-- Genrad BSDL syntax checker ver. 4.01, a component
-- of Scan Pathfinder(tm) and BasicSCAN(tm)
-- GOEPEL Electronics' CASCON-GALAXY(R) ver. 3.4
-- HP 3070 BSDL Compiler
-- JTAG Technologies PLDPROG ver. 2.7
--
-- JTAG Scan Chain Continuity Tested on:
-- GOEPEL Electronics' CASCON-GALAXY(R) ver. 3.4
--
-- Complete IEEE 1149.1 device implementation tested
-- against BSDL file by GOEPEL Electronics
--
-- Documentation : FLEX 8000 Family Datasheet
-- AN39 - JTAG Boundary Testing in Altera Devices
--
--
-- IMPORTANT NOTICE
--
-- Altera and EPF8282 are trademarks of Altera Corporation.
-- Altera products, marketed under trademarks are protected
-- under numerous US and foreign patents and pending
-- applications, maskwork rights, and copyrights. Altera
-- warrants performance of its semiconductor products to
-- current specifications in accordance with Altera's standard
-- warranty, but reserves the right to make changes to any
-- products and services at any tie without notice. Altera
-- assumes no responsibility or liability arising out of the
-- application or use of any information, product, or service
-- described herein except as expressly agreed to in writing
-- by Altera Corporation. Altera customers are advised to
-- obtain the latest version of device specifications before
-- relying on any published information and before placing
-- orders for products or services.
--
-- Special Usage Notes
-- for
-- CONF_DONE, nSTATUS, and DCLK pins
--
-- The functionality of these pins depends on whether JTAG
-- testing is performed prior to device configuration or after
-- the Device has been configured. When he device is configured
-- CONF_DONE, nSTATUS, and nCONFIG pins will be high.
--
-- CONF_DONE and nSTATUS:
-- ----------------------
-- Before Configuration, these pins are outputs and will remain
-- at logic level low. These must be declared as Linkage pins and
-- the Boundary-Scan (BS) cells associated with them must be declared
-- as internals.
-- After Configuration, these pins are inputs and must be pulled high
-- at all times with an external pull up resistor. This is reflected
-- by declaring them as inputs and declaring the BS cells associated
-- with them as input cells.
-- The BSDL file is written with nSTATUS and CONF_DONE pins as linkage
-- If you wish to use JTAG in user mode and you would like to use these
-- pins as inputs you must change their declaration from linkage to in
-- and edit to internal cell to an input.
--
-- DCLK:
-- -----
-- Before configuration, this pin is an input.
-- After configuration, the user can select to make this pin as an
-- output by selecting a special option in the software. If this
-- option is selected then this pin must be declared as linkage and
-- the BS cell associated with it becomes an internal cell. If on
-- the other hand, the user did not select this option, this will be
-- an input and the BSDL file should reflect that.
-- This BSDL file is written with DCLK as an input. If you would like
-- to use JTAG in user mode and DCLK is an selected to be an output,
-- you must change the pin declaration from in to linkage and change
-- the cell from input to internal.
--
-- For further information on how to change the BSDL file contact the
-- applications Hot Line at (800) 800-EPLD.
--
--
--
entity EPF8282T100 is
generic (PHYSICAL_PIN_MAP : string := "TQFP100");
port ( IOE :inout bit_vector(1 to 70);
nSP :in bit;
MSEL0 :in bit;
MSEL1 :in bit;
nCONFIG :in bit;
nSTATUS :linkage bit;
CONF_DONE :linkage bit;
DCLK :in bit;
TCK :in bit;
TDI :in bit;
TDO :out bit;
TMS :in bit;
nTRST :in bit;
DIN :in bit_vector(1 to 4);
VCC :linkage bit_vector(1 to 6);
GND :linkage bit_vector(1 to 8));
use STD_1149_1_1994.all;
attribute COMPONENT_CONFORMANCE of EPF8282T100 : entity is "STD_1149_1_1993";
attribute PIN_MAP of EPF8282T100 : entity is PHYSICAL_PIN_MAP;
constant TQFP100 : PIN_MAP_STRING :=
"IOE:(4,5,7,8,9,10,12,14,15,16,17,19,"&
"21,22,26,27,28,29,31,32,33,34,35,36,38,39,40,"&
"41,42,43,45,46,47,48,49,55,57,58,59,60,"&
"61,62,64,65,66,67,68,69,71,76,77,78,79,"&
"81,82,83,84,85,86,88,89,90,91,92,93,95,96,97,98,99),"&
"nSP:75, "&
"MSEL0:74,"&
"MSEL1:51,"&
"nSTATUS:24,"&
"nCONFIG:25,"&
"DCLK:100,"&
"CONF_DONE:1, "&
"TCK:72,"&
"TDI:54,"&
"TDO:18,"&
"TMS:11,"&
"nTRST:50," &
"DIN:(3,23,53,73)," &
"VCC:(6,20,37,56,70,87),"&
"GND:(2,13,30,44,52,63,80,94)";
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_MODE of TMS : signal is true;
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_RESET of nTRST : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (10.00e6, BOTH);
attribute INSTRUCTION_LENGTH of EPF8282T100 : entity is 3;
attribute INSTRUCTION_OPCODE of EPF8282T100 : entity is
"EXTEST (000), " &
"BYPASS (111), " &
"SAMPLE (101) ";
attribute INSTRUCTION_CAPTURE of EPF8282T100 : entity is "101";
attribute BOUNDARY_LENGTH of EPF8282T100 :entity is 273;
attribute BOUNDARY_REGISTER of EPF8282T100 :entity is
"0 (BC_1, DIN(3), input, X ), " & -- scan 91
"1 (BC_4, *, internal, 1 ), " &
"2 (BC_4, *, internal, X ), " &
"3 (BC_4, MSEL1, input, X ), " & -- scan 90
"4 (BC_4, *, internal, 1 ), " &
"5 (BC_4, *, internal, X ), " &
"6 (BC_1, IOE(35), input, X ), " & -- scan 89
"7 (BC_1, *, control, 1 ), " &
"8 (BC_1, IOE(35), output3, X , 7, 1, Z), "&
"9 (BC_1, IOE(34), input, X ), " & -- scan 88
"10 (BC_1, *, control, 1 ), " &
"11 (BC_1, IOE(34), output3, X , 10, 1, Z), "&
"12 (BC_1, IOE(33), input, X ), " & -- scan 87
"13 (BC_1, *, control, 1 ), " &
"14 (BC_1, IOE(33), output3, X , 13, 1, Z), "&
"15 (BC_1, IOE(32), input, X ), " & -- scan 86
"16 (BC_1, *, control, 1 ), " &
"17 (BC_1, IOE(32), output3, X , 16, 1, Z), "&
"18 (BC_1, IOE(31), input, X ), " & -- scan 85
"19 (BC_1, *, control, 1 ), " &
"20 (BC_1, IOE(31), output3, X , 19, 1, Z), "&
"21 (BC_1, IOE(30), input, X ), " & -- scan 84
"22 (BC_1, *, control, 1 ), " &
"23 (BC_1, IOE(30), output3, X , 22, 1, Z), "&
"24 (BC_1, IOE(29), input, X ), " & -- scan 83
"25 (BC_1, *, control, 1 ), " &
"26 (BC_1, IOE(29), output3, X , 25, 1, Z), "&
"27 (BC_1, IOE(28), input, X ), " & -- scan 82
"28 (BC_1, *, control, 1 ), " &
"29 (BC_1, IOE(28), output3, X , 28, 1, Z), "&
"30 (BC_4, *, internal, X ), " & -- Double-bonded pad, ignored
"31 (BC_4, *, internal, 1 ), " & -- scan 81
"32 (BC_4, *, internal, X ), " &
"33 (BC_1, IOE(27), input, X ), " & -- scan 80
"34 (BC_1, *, control, 1 ), " &
"35 (BC_1, IOE(27), output3, X , 34, 1, Z), "&
"36 (BC_1, IOE(26), input, X ), " & -- scan 79
"37 (BC_1, *, control, 1 ), " &
"38 (BC_1, IOE(26), output3, X , 37, 1, Z), "&
"39 (BC_1, IOE(25), input, X ), " & -- scan 78
"40 (BC_1, *, control, 1 ), " &
"41 (BC_1, IOE(25), output3, X , 40, 1, Z), "&
"42 (BC_4, *, internal, X ), " & -- Double-bonded pad, ignored
"43 (BC_4, *, internal, 1 ), " & -- scan 77
"44 (BC_4, *, internal, X ), " &
"45 (BC_1, IOE(24), input, X ), " & -- scan 76
"46 (BC_1, *, control, 1 ), " &
"47 (BC_1, IOE(24), output3, X , 46, 1, Z), "&
"48 (BC_1, IOE(23), input, X ), " & -- scan 75
"49 (BC_1, *, control, 1 ), " &
"50 (BC_1, IOE(23), output3, X , 49, 1, Z), "&
"51 (BC_1, IOE(22), input, X ), " & -- scan 74
"52 (BC_1, *, control, 1 ), " &
"53 (BC_1, IOE(22), output3, X , 52, 1, Z), "&
"54 (BC_4, *, internal, X ), " & -- Double-bonded pad, ignored
"55 (BC_4, *, internal, 1 ), " & -- scan 73
"56 (BC_4, *, internal, X ), " &
"57 (BC_1, IOE(21), input, X ), " & -- scan 72
"58 (BC_1, *, control, 1 ), " &
"59 (BC_1, IOE(21), output3, X , 58, 1, Z), "&
"60 (BC_1, IOE(20), input, X ), " & -- scan 71
"61 (BC_1, *, control, 1 ), " &
"62 (BC_1, IOE(20), output3, X , 61, 1, Z), "&
"63 (BC_1, IOE(19), input, X ), " & -- scan 70
"64 (BC_1, *, control, 1 ), " &
"65 (BC_1, IOE(19), output3, X , 64, 1, Z), "&
"66 (BC_4, *, internal, X ), " & -- Double-bonded pad, ignored
"67 (BC_4, *, internal, 1 ), " & -- scan 69
"68 (BC_4, *, internal, X ), " &
"69 (BC_1, IOE(18), input, X ), " & -- scan 68
"70 (BC_1, *, control, 1 ), " &
"71 (BC_1, IOE(18), output3, X , 70, 1, Z), "&
"72 (BC_1, IOE(17), input, X ), " & -- scan 67
"73 (BC_1, *, control, 1 ), " &
"74 (BC_1, IOE(17), output3, X , 73, 1, Z), "&
"75 (BC_1, IOE(16), input, X ), " & -- scan 66
"76 (BC_1, *, control, 1 ), " &
"77 (BC_1, IOE(16), output3, X , 76, 1, Z), "&
"78 (BC_4, *, internal, X ), " & -- Double-bonded pad, ignored
"79 (BC_4, *, internal, 1 ), " & -- scan 65
"80 (BC_4, *, internal, X ), " &
"81 (BC_1, IOE(15), input, X ), " & -- scan 64
"82 (BC_1, *, control, 1 ), " &
"83 (BC_1, IOE(15), output3, X , 82, 1, Z), "&
"84 (BC_4, nCONFIG, input, X ), " & -- scan 63
"85 (BC_4, *, internal, 1 ), " &
"86 (BC_4, *, internal, X ), " &
"87 (BC_4, *, internal, X ), " & -- scan 62 nStatus
"88 (BC_4, *, internal, 1 ), " &
"89 (BC_4, *, internal, X ), " &
"90 (BC_1, DIN(2), input, X ), " & -- scan 61
"91 (BC_4, *, internal, 1 ), " &
"92 (BC_4, *, internal, X ), " &
"93 (BC_1, IOE(14), input, X ), " & -- scan 60
"94 (BC_1, *, control, 1 ), " &
"95 (BC_1, IOE(14), output3, X , 94, 1, Z), "&
"96 (BC_1, IOE(13), input, X ), " & -- scan 59
"97 (BC_1, *, control, 1 ), " &
"98 (BC_1, IOE(13), output3, X , 97, 1, Z), "&
"99 (BC_1, IOE(12), input, X ), " & -- scan 58
"100 (BC_1, *, control, 1 ), " &
"101 (BC_1, IOE(12), output3, X , 100, 1, Z), "&
"102 (BC_1, IOE(11), input, X ), " & -- scan 57
"103 (BC_1, *, control, 1 ), " &
"104 (BC_1, IOE(11), output3, X , 103, 1, Z), "&
"105 (BC_1, IOE(10), input, X ), " & -- scan 56
"106 (BC_1, *, control, 1 ), " &
"107 (BC_1, IOE(10), output3, X , 106, 1, Z), "&
"108 (BC_1, IOE(9), input, X ), " & -- scan 55
"109 (BC_1, *, control, 1 ), " &
"110 (BC_1, IOE(9), output3, X , 109, 1, Z), "&
"111 (BC_1, IOE(8), input, X ), " & -- scan 54
"112 (BC_1, *, control, 1 ), " &
"113 (BC_1, IOE(8), output3, X , 112, 1, Z), "&
"114 (BC_1, IOE(7), input, X ), " & -- scan 53
"115 (BC_1, *, control, 1 ), " &
"116 (BC_1, IOE(7), output3, X , 115, 1, Z), "&
"117 (BC_1, IOE(6), input, X ), " & -- scan 52
"118 (BC_1, *, control, 1 ), " &
"119 (BC_1, IOE(6), output3, X , 118, 1, Z), "&
"120 (BC_1, IOE(5), input, X ), " & -- scan 51
"121 (BC_1, *, control, 1 ), " &
"122 (BC_1, IOE(5), output3, X , 121, 1, Z), "&
"123 (BC_1, IOE(4), input, X ), " & -- scan 50
"124 (BC_1, *, control, 1 ), " &
"125 (BC_1, IOE(4), output3, X , 124, 1, Z), "&
"126 (BC_1, IOE(3), input, X ), " & -- scan 49
"127 (BC_1, *, control, 1 ), " &
"128 (BC_1, IOE(3), output3, X , 127, 1, Z), "&
"129 (BC_1, IOE(2), input, X ), " & -- scan 48
"130 (BC_1, *, control, 1 ), " &
"131 (BC_1, IOE(2), output3, X , 130, 1, Z), "&
"132 (BC_1, IOE(1), input, X ), " & -- scan 47
"133 (BC_1, *, control, 1 ), " &
"134 (BC_1, IOE(1), output3, X , 133, 1, Z), "&
"135 (BC_1, DIN(1), input, X ), " & -- scan 46
"136 (BC_4, *, internal, 1 ), " &
"137 (BC_4, *, internal, X ), " &
"138 (BC_4, *, internal, X ), " & -- scan 45 CONF_DONE
"139 (BC_4, *, internal, 1 ), " &
"140 (BC_4, *, internal, X ), " &
"141 (BC_4, DCLK, input, X ), " & -- scan 44
"142 (BC_4, *, internal, 1 ), " &
"143 (BC_4, *, internal, X ), " &
"144 (BC_1, IOE(70), input, X ), " & -- scan 43
"145 (BC_1, *, control, 1 ), " &
"146 (BC_1, IOE(70), output3, X , 145, 1, Z), "&
"147 (BC_1, IOE(69), input, X ), " & -- scan 42
"148 (BC_1, *, control, 1 ), " &
"149 (BC_1, IOE(69), output3, X , 148, 1, Z), "&
"150 (BC_1, IOE(68), input, X ), " & -- scan 41
"151 (BC_1, *, control, 1 ), " &
"152 (BC_1, IOE(68), output3, X , 151, 1, Z), "&
"153 (BC_1, IOE(67), input, X ), " & -- scan 40
"154 (BC_1, *, control, 1 ), " &
"155 (BC_1, IOE(67), output3, X , 154, 1, Z), "&
"156 (BC_1, IOE(66), input, X ), " & -- scan 39
"157 (BC_1, *, control, 1 ), " &
"158 (BC_1, IOE(66), output3, X , 157, 1, Z), "&
"159 (BC_1, IOE(65), input, X ), " & -- scan 38
"160 (BC_1, *, control, 1 ), " &
"161 (BC_1, IOE(65), output3, X , 160, 1, Z), "&
"162 (BC_1, IOE(64), input, X ), " & -- scan 37
"163 (BC_1, *, control, 1 ), " &
"164 (BC_1, IOE(64), output3, X , 163, 1, Z), "&
"165 (BC_4, *, internal, X ), " & -- Double-bonded pad, ignored
"166 (BC_4, *, internal, 1 ), " & -- scan 36
"167 (BC_4, *, internal, X ), " &
"168 (BC_1, IOE(63), input, X ), " & -- scan 35
"169 (BC_1, *, control, 1 ), " &
"170 (BC_1, IOE(63), output3, X , 169, 1, Z), "&
"171 (BC_1, IOE(62), input, X ), " & -- scan 34
"172 (BC_1, *, control, 1 ), " &
"173 (BC_1, IOE(62), output3, X , 172, 1, Z), "&
"174 (BC_1, IOE(61), input, X ), " & -- scan 33
"175 (BC_1, *, control, 1 ), " &
"176 (BC_1, IOE(61), output3, X , 175, 1, Z), "&
"177 (BC_4, *, internal, X ), " & -- Double-bonded pad, ignored
"178 (BC_4, *, internal, 1 ), " & -- scan 32
"179 (BC_4, *, internal, X ), " &
"180 (BC_1, IOE(60), input, X ), " & -- scan 31
"181 (BC_1, *, control, 1 ), " &
"182 (BC_1, IOE(60), output3, X , 181, 1, Z), "&
"183 (BC_1, IOE(59), input, X ), " & -- scan 30
"184 (BC_1, *, control, 1 ), " &
"185 (BC_1, IOE(59), output3, X , 184, 1, Z), "&
"186 (BC_1, IOE(58), input, X ), " & -- scan 29
"187 (BC_1, *, control, 1 ), " &
"188 (BC_1, IOE(58), output3, X , 187, 1, Z), "&
"189 (BC_4, *, internal, X ), " & -- Double-bonded pad, ignored
"190 (BC_4, *, internal, 1 ), " & -- scan 28
"191 (BC_4, *, internal, X ), " &
"192 (BC_1, IOE(57), input, X ), " & -- scan 27
"193 (BC_1, *, control, 1 ), " &
"194 (BC_1, IOE(57), output3, X , 193, 1, Z), "&
"195 (BC_1, IOE(56), input, X ), " & -- scan 26
"196 (BC_1, *, control, 1 ), " &
"197 (BC_1, IOE(56), output3, X , 196, 1, Z), "&
"198 (BC_1, IOE(55), input, X ), " & -- scan 25
"199 (BC_1, *, control, 1 ), " &
"200 (BC_1, IOE(55), output3, X , 199, 1, Z), "&
"201 (BC_4, *, internal, X ), " & -- Double-bonded pad, ignored
"202 (BC_4, *, internal, 1 ), " & -- scan 24
"203 (BC_4, *, internal, X ), " &
"204 (BC_1, IOE(54), input, X ), " & -- scan 23
"205 (BC_1, *, control, 1 ), " &
"206 (BC_1, IOE(54), output3, X , 205, 1, Z), "&
"207 (BC_1, IOE(53), input, X ), " & -- scan 22
"208 (BC_1, *, control, 1 ), " &
"209 (BC_1, IOE(53), output3, X , 208, 1, Z), "&
"210 (BC_1, IOE(52), input, X ), " & -- scan 21
"211 (BC_1, *, control, 1 ), " &
"212 (BC_1, IOE(52), output3, X , 211, 1, Z), "&
"213 (BC_4, *, internal, X ), " & -- Double-bonded pad, ignored
"214 (BC_4, *, internal, 1 ), " & -- scan 20
"215 (BC_4, *, internal, X ), " &
"216 (BC_1, IOE(51), input, X ), " & -- scan 19
"217 (BC_1, *, control, 1 ), " &
"218 (BC_1, IOE(51), output3, X , 217, 1, Z), "&
"219 (BC_1, IOE(50), input, X ), " & -- scan 18
"220 (BC_1, *, control, 1 ), " &
"221 (BC_1, IOE(50), output3, X , 220, 1, Z), "&
"222 (BC_4, nSP, input, X ), " & -- scan 17
"223 (BC_4, *, internal, 1 ), " &
"224 (BC_4, *, internal, X ), " &
"225 (BC_4, MSEL0, input, X ), " & -- scan 16
"226 (BC_4, *, internal, 1 ), " &
"227 (BC_4, *, internal, X ), " &
"228 (BC_1, DIN(4), input, X ), " & -- scan 15
"229 (BC_4, *, internal, 1 ), " &
"230 (BC_4, *, internal, X ), " &
"231 (BC_1, IOE(49), input, X ), " & -- scan 14
"232 (BC_1, *, control, 1 ), " &
"233 (BC_1, IOE(49), output3, X , 232, 1, Z), "&
"234 (BC_1, IOE(48), input, X ), " & -- scan 13
"235 (BC_1, *, control, 1 ), " &
"236 (BC_1, IOE(48), output3, X , 235, 1, Z), "&
"237 (BC_1, IOE(47), input, X ), " & -- scan 12
"238 (BC_1, *, control, 1 ), " &
"239 (BC_1, IOE(47), output3, X , 238, 1, Z), "&
"240 (BC_1, IOE(46), input, X ), " & -- scan 11
"241 (BC_1, *, control, 1 ), " &
"242 (BC_1, IOE(46), output3, X , 241, 1, Z), "&
"243 (BC_1, IOE(45), input, X ), " & -- scan 10
"244 (BC_1, *, control, 1 ), " &
"245 (BC_1, IOE(45), output3, X , 244, 1, Z), "&
"246 (BC_1, IOE(44), input, X ), " & -- scan 9
"247 (BC_1, *, control, 1 ), " &
"248 (BC_1, IOE(44), output3, X , 247, 1, Z), "&
"249 (BC_1, IOE(43), input, X ), " & -- scan 8
"250 (BC_1, *, control, 1 ), " &
"251 (BC_1, IOE(43), output3, X , 250, 1, Z), "&
"252 (BC_1, IOE(42), input, X ), " & -- scan 7
"253 (BC_1, *, control, 1 ), " &
"254 (BC_1, IOE(42), output3, X , 253, 1, Z), "&
"255 (BC_1, IOE(41), input, X ), " & -- scan 6
"256 (BC_1, *, control, 1 ), " &
"257 (BC_1, IOE(41), output3, X , 256, 1, Z), "&
"258 (BC_1, IOE(40), input, X ), " & -- scan 5
"259 (BC_1, *, control, 1 ), " &
"260 (BC_1, IOE(40), output3, X , 259, 1, Z), "&
"261 (BC_1, IOE(39), input, X ), " & -- scan 4
"262 (BC_1, *, control, 1 ), " &
"263 (BC_1, IOE(39), output3, X , 262, 1, Z), "&
"264 (BC_1, IOE(38), input, X ), " & -- scan 3
"265 (BC_1, *, control, 1 ), " &
"266 (BC_1, IOE(38), output3, X , 265, 1, Z), "&
"267 (BC_1, IOE(37), input, X ), " & -- scan 2
"268 (BC_1, *, control, 1 ), " &
"269 (BC_1, IOE(37), output3, X , 268, 1, Z), "&
"270 (BC_1, IOE(36), input, X ), " & -- scan 1
"271 (BC_1, *, control, 1 ), " &
"272 (BC_1, IOE(36), output3, X , 271, 1, Z) ";
-- *********************************************************************
-- * DESIGN WARNING *
-- *********************************************************************
attribute DESIGN_WARNING of EPF8282T100 : entity is
"The FLEX 8000/A devices support IEEE 1149.1 testing before and "&
"after device configuration; however, the devices do not support "&
"this testing during device configuration. The easiest way to "&
"avoid device configuration is to hold the nCONFIG pin low during "&
"power-up and testing.";
end EPF8282T100;
