--
-- Boundary Scan Description Language (BSDL) File
-- Generated by Viper version: 2013.08.20 at: Thu Oct 24 10:51:12 2013
--
-- Device: MX6SX/MX6SLX
-- Package Type: PBGA_17x17NP
--
entity MX6SX is
generic (PHYSICAL_PIN_MAP : string := "PBGA_17x17NP");
-- PORT DESCRIPTION TERMS
-- in = input only
-- out = three-state output (0, Z, 1)
-- buffer = two-state output (0, 1)
-- inout = bidirectional
-- linkage = OTHER (vdd, vss, analog)
--
-- bit = single pin
-- bit_vector = group of pins with suffix 0 to n
port (
ADC1_IN0: linkage bit;
ADC1_IN1: linkage bit;
ADC1_IN2: linkage bit;
ADC1_IN3: linkage bit;
ADC2_IN0: linkage bit;
ADC2_IN1: linkage bit;
ADC2_IN2: linkage bit;
ADC2_IN3: linkage bit;
ADC_VREFH: linkage bit;
ADC_VREFL: linkage bit;
BOOT_MODE0: inout bit;
BOOT_MODE1: inout bit;
CCM_CLK1_N: linkage bit;
CCM_CLK1_P: linkage bit;
CCM_CLK2: linkage bit;
CCM_PMIC_STBY_REQ: inout bit;
DRAM_ADDR00: inout bit;
DRAM_ADDR01: inout bit;
DRAM_ADDR02: inout bit;
DRAM_ADDR03: inout bit;
DRAM_ADDR04: inout bit;
DRAM_ADDR05: inout bit;
DRAM_ADDR06: inout bit;
DRAM_ADDR07: inout bit;
DRAM_ADDR08: inout bit;
DRAM_ADDR09: inout bit;
DRAM_ADDR10: inout bit;
DRAM_ADDR11: inout bit;
DRAM_ADDR12: inout bit;
DRAM_ADDR13: inout bit;
DRAM_ADDR14: inout bit;
DRAM_CAS_B: inout bit;
DRAM_CS0_B: inout bit;
DRAM_CS1_B: inout bit;
DRAM_DATA00: inout bit;
DRAM_DATA01: inout bit;
DRAM_DATA02: inout bit;
DRAM_DATA03: inout bit;
DRAM_DATA04: inout bit;
DRAM_DATA05: inout bit;
DRAM_DATA06: inout bit;
DRAM_DATA07: inout bit;
DRAM_DATA08: inout bit;
DRAM_DATA09: inout bit;
DRAM_DATA10: inout bit;
DRAM_DATA11: inout bit;
DRAM_DATA12: inout bit;
DRAM_DATA13: inout bit;
DRAM_DATA14: inout bit;
DRAM_DATA15: inout bit;
DRAM_DATA16: inout bit;
DRAM_DATA17: inout bit;
DRAM_DATA18: inout bit;
DRAM_DATA19: inout bit;
DRAM_DATA20: inout bit;
DRAM_DATA21: inout bit;
DRAM_DATA22: inout bit;
DRAM_DATA23: inout bit;
DRAM_DATA24: inout bit;
DRAM_DATA25: inout bit;
DRAM_DATA26: inout bit;
DRAM_DATA27: inout bit;
DRAM_DATA28: inout bit;
DRAM_DATA29: inout bit;
DRAM_DATA30: inout bit;
DRAM_DATA31: inout bit;
DRAM_DQM0: inout bit;
DRAM_DQM1: inout bit;
DRAM_DQM2: inout bit;
DRAM_DQM3: inout bit;
DRAM_ODT0: inout bit;
DRAM_RAS_B: inout bit;
DRAM_RESET: inout bit;
DRAM_SDBA0: inout bit;
DRAM_SDBA1: inout bit;
DRAM_SDBA2: inout bit;
DRAM_SDCKE0: inout bit;
DRAM_SDCKE1: inout bit;
DRAM_SDCLK0_N: inout bit;
DRAM_SDCLK0_P: inout bit;
DRAM_SDQS0_N: inout bit;
DRAM_SDQS0_P: inout bit;
DRAM_SDQS1_N: inout bit;
DRAM_SDQS1_P: inout bit;
DRAM_SDQS2_N: inout bit;
DRAM_SDQS2_P: inout bit;
DRAM_SDQS3_N: inout bit;
DRAM_SDQS3_P: inout bit;
DRAM_SDWE_B: inout bit;
DRAM_VREF: linkage bit;
DRAM_ZQPAD: linkage bit;
ENET1_COL: inout bit;
ENET1_CRS: inout bit;
ENET1_MDC: inout bit;
ENET1_MDIO: inout bit;
ENET1_RX_CLK: inout bit;
ENET1_TX_CLK: inout bit;
ENET2_COL: inout bit;
ENET2_CRS: inout bit;
ENET2_RX_CLK: inout bit;
ENET2_TX_CLK: inout bit;
GPANAIO: linkage bit;
GPIO1_IO00: inout bit;
GPIO1_IO01: inout bit;
GPIO1_IO02: inout bit;
GPIO1_IO03: inout bit;
GPIO1_IO04: inout bit;
GPIO1_IO05: inout bit;
GPIO1_IO06: inout bit;
GPIO1_IO07: inout bit;
GPIO1_IO08: inout bit;
GPIO1_IO09: inout bit;
GPIO1_IO10: inout bit;
GPIO1_IO11: inout bit;
GPIO1_IO12: inout bit;
GPIO1_IO13: inout bit;
JTAG_MOD: in bit;
JTAG_TCK: in bit;
JTAG_TDI: in bit;
JTAG_TDO: out bit;
JTAG_TMS: in bit;
JTAG_TRST_B: in bit;
KEY_COL0: inout bit;
KEY_COL1: inout bit;
KEY_COL2: inout bit;
KEY_COL3: inout bit;
KEY_COL4: inout bit;
KEY_ROW0: inout bit;
KEY_ROW1: inout bit;
KEY_ROW2: inout bit;
KEY_ROW3: inout bit;
KEY_ROW4: inout bit;
LCD1_CLK: inout bit;
LCD1_DATA00: inout bit;
LCD1_DATA01: inout bit;
LCD1_DATA02: inout bit;
LCD1_DATA03: inout bit;
LCD1_DATA04: inout bit;
LCD1_DATA05: inout bit;
LCD1_DATA06: inout bit;
LCD1_DATA07: inout bit;
LCD1_DATA08: inout bit;
LCD1_DATA09: inout bit;
LCD1_DATA10: inout bit;
LCD1_DATA11: inout bit;
LCD1_DATA12: inout bit;
LCD1_DATA13: inout bit;
LCD1_DATA14: inout bit;
LCD1_DATA15: inout bit;
LCD1_DATA16: inout bit;
LCD1_DATA17: inout bit;
LCD1_DATA18: inout bit;
LCD1_DATA19: inout bit;
LCD1_DATA20: inout bit;
LCD1_DATA21: inout bit;
LCD1_DATA22: inout bit;
LCD1_DATA23: inout bit;
LCD1_ENABLE: inout bit;
LCD1_HSYNC: inout bit;
LCD1_RESET: inout bit;
LCD1_VSYNC: inout bit;
NAND_ALE: inout bit;
NAND_CE0_B: inout bit;
NAND_CE1_B: inout bit;
NAND_CLE: inout bit;
NAND_DATA00: inout bit;
NAND_DATA01: inout bit;
NAND_DATA02: inout bit;
NAND_DATA03: inout bit;
NAND_DATA04: inout bit;
NAND_DATA05: inout bit;
NAND_DATA06: inout bit;
NAND_DATA07: inout bit;
NAND_READY_B: inout bit;
NAND_RE_B: inout bit;
NAND_WE_B: inout bit;
NAND_WP_B: inout bit;
NGND_KEL0: linkage bit;
NVCC_DRAM_2P5: linkage bit;
NVCC_DRAM: linkage bit_vector(0 to 7);
NVCC_ENET: linkage bit;
NVCC_GPIO: linkage bit;
NVCC_HIGH: linkage bit;
NVCC_JTAG: linkage bit;
NVCC_KEY: linkage bit;
NVCC_LCD1: linkage bit;
NVCC_LOW: linkage bit;
NVCC_NAND: linkage bit;
NVCC_PLL: linkage bit;
NVCC_QSPI: linkage bit;
NVCC_RGMII1: linkage bit;
NVCC_RGMII2: linkage bit;
NVCC_SD2: linkage bit;
NVCC_SD4: linkage bit;
NVCC_USB_H: linkage bit;
ONOFF: linkage bit;
PCIE_VP_CAP: linkage bit;
POR_B: in bit;
QSPI1A_DATA0: inout bit;
QSPI1A_DATA1: inout bit;
QSPI1A_DATA2: inout bit;
QSPI1A_DATA3: inout bit;
QSPI1A_DQS: inout bit;
QSPI1A_SCLK: inout bit;
QSPI1A_SS0_B: inout bit;
QSPI1A_SS1_B: inout bit;
QSPI1B_DATA0: inout bit;
QSPI1B_DATA1: inout bit;
QSPI1B_DATA2: inout bit;
QSPI1B_DATA3: inout bit;
QSPI1B_DQS: inout bit;
QSPI1B_SCLK: inout bit;
QSPI1B_SS0_B: inout bit;
QSPI1B_SS1_B: inout bit;
RGMII1_RD0: inout bit;
RGMII1_RD1: inout bit;
RGMII1_RD2: inout bit;
RGMII1_RD3: inout bit;
RGMII1_RXC: inout bit;
RGMII1_RX_CTL: inout bit;
RGMII1_TD0: inout bit;
RGMII1_TD1: inout bit;
RGMII1_TD2: inout bit;
RGMII1_TD3: inout bit;
RGMII1_TXC: inout bit;
RGMII1_TX_CTL: inout bit;
RGMII2_RD0: inout bit;
RGMII2_RD1: inout bit;
RGMII2_RD2: inout bit;
RGMII2_RD3: inout bit;
RGMII2_RXC: inout bit;
RGMII2_RX_CTL: inout bit;
RGMII2_TD0: inout bit;
RGMII2_TD1: inout bit;
RGMII2_TD2: inout bit;
RGMII2_TD3: inout bit;
RGMII2_TXC: inout bit;
RGMII2_TX_CTL: inout bit;
RTC_XTALI: linkage bit;
RTC_XTALO: linkage bit;
SD2_CLK: inout bit;
SD2_CMD: inout bit;
SD2_DATA0: inout bit;
SD2_DATA1: inout bit;
SD2_DATA2: inout bit;
SD2_DATA3: inout bit;
SD3_CLK: inout bit;
SD3_CMD: inout bit;
SD3_DATA0: inout bit;
SD3_DATA1: inout bit;
SD3_DATA2: inout bit;
SD3_DATA3: inout bit;
SD3_DATA4: inout bit;
SD3_DATA5: inout bit;
SD3_DATA6: inout bit;
SD3_DATA7: inout bit;
SD4_CLK: inout bit;
SD4_CMD: inout bit;
SD4_DATA0: inout bit;
SD4_DATA1: inout bit;
SD4_DATA2: inout bit;
SD4_DATA3: inout bit;
SD4_DATA4: inout bit;
SD4_DATA5: inout bit;
SD4_DATA6: inout bit;
SD4_DATA7: inout bit;
SD4_RESET_B: inout bit;
SNVS_PMIC_ON_REQ: inout bit;
SNVS_TAMPER: linkage bit;
TEST_MODE: in bit;
USB_H_DATA: inout bit;
USB_H_STROBE: inout bit;
USB_OTG1_CHD_B: linkage bit;
USB_OTG1_DN: linkage bit;
USB_OTG1_DP: linkage bit;
USB_OTG1_VBUS: linkage bit;
USB_OTG2_DN: linkage bit;
USB_OTG2_DP: linkage bit;
USB_OTG2_VBUS: linkage bit;
VDDA_ADC_3P3: linkage bit;
VDD_ARM_CAP: linkage bit_vector(0 to 8);
VDD_ARM_IN: linkage bit_vector(0 to 5);
VDD_HIGH_CAP: linkage bit_vector(0 to 1);
VDD_HIGH_IN: linkage bit_vector(0 to 1);
VDD_SNVS_CAP: linkage bit;
VDD_SNVS_IN: linkage bit;
VDD_SOC_CAP: linkage bit_vector(0 to 12);
VDD_SOC_IN: linkage bit_vector(0 to 8);
VDD_USB_CAP: linkage bit;
VSS: linkage bit_vector(0 to 66);
XTALI: linkage bit;
XTALO: linkage bit );
use STD_1149_1_2001.all;
use STD_1149_6_2003.all;
attribute COMPONENT_CONFORMANCE of MX6SX: entity is "STD_1149_1_2001";
attribute PIN_MAP of MX6SX: entity is PHYSICAL_PIN_MAP;
constant PBGA_17x17NP :PIN_MAP_STRING :=
"ADC1_IN0: Y14," &
"ADC1_IN1: W14," &
"ADC1_IN2: Y15," &
"ADC1_IN3: W15," &
"ADC2_IN0: Y16," &
"ADC2_IN1: W16," &
"ADC2_IN2: T16," &
"ADC2_IN3: U16," &
"ADC_VREFH: V16," &
"ADC_VREFL: R14," &
"BOOT_MODE0: N15," &
"BOOT_MODE1: P14," &
"CCM_CLK1_N: P19," &
"CCM_CLK1_P: P20," &
"CCM_CLK2: T14," &
"CCM_PMIC_STBY_REQ: N16," &
"DRAM_ADDR00: L4," &
"DRAM_ADDR01: U4," &
"DRAM_ADDR02: K5," &
"DRAM_ADDR03: G5," &
"DRAM_ADDR04: M3," &
"DRAM_ADDR05: G4," &
"DRAM_ADDR06: T4," &
"DRAM_ADDR07: F4," &
"DRAM_ADDR08: M5," &
"DRAM_ADDR09: L5," &
"DRAM_ADDR10: N5," &
"DRAM_ADDR11: N4," &
"DRAM_ADDR12: P4," &
"DRAM_ADDR13: M4," &
"DRAM_ADDR14: R4," &
"DRAM_CAS_B: J4," &
"DRAM_CS0_B: H4," &
"DRAM_CS1_B: D3," &
"DRAM_DATA00: R1," &
"DRAM_DATA01: T2," &
"DRAM_DATA02: T1," &
"DRAM_DATA03: R2," &
"DRAM_DATA04: M1," &
"DRAM_DATA05: M2," &
"DRAM_DATA06: L2," &
"DRAM_DATA07: N1," &
"DRAM_DATA08: H1," &
"DRAM_DATA09: F2," &
"DRAM_DATA10: K2," &
"DRAM_DATA11: J2," &
"DRAM_DATA12: J1," &
"DRAM_DATA13: F1," &
"DRAM_DATA14: E2," &
"DRAM_DATA15: E1," &
"DRAM_DATA16: V1," &
"DRAM_DATA17: W4," &
"DRAM_DATA18: Y4," &
"DRAM_DATA19: U2," &
"DRAM_DATA20: W3," &
"DRAM_DATA21: Y2," &
"DRAM_DATA22: U1," &
"DRAM_DATA23: V2," &
"DRAM_DATA24: A2," &
"DRAM_DATA25: D1," &
"DRAM_DATA26: C1," &
"DRAM_DATA27: D2," &
"DRAM_DATA28: C2," &
"DRAM_DATA29: B3," &
"DRAM_DATA30: B4," &
"DRAM_DATA31: A4," &
"DRAM_DQM0: N2," &
"DRAM_DQM1: G2," &
"DRAM_DQM2: Y3," &
"DRAM_DQM3: A3," &
"DRAM_ODT0: U3," &
"DRAM_RAS_B: H5," &
"DRAM_RESET: D4," &
"DRAM_SDBA0: G3," &
"DRAM_SDBA1: P3," &
"DRAM_SDBA2: K4," &
"DRAM_SDCKE0: P5," &
"DRAM_SDCKE1: E4," &
"DRAM_SDCLK0_N: L1," &
"DRAM_SDCLK0_P: K1," &
"DRAM_SDQS0_N: P2," &
"DRAM_SDQS0_P: P1," &
"DRAM_SDQS1_N: H2," &
"DRAM_SDQS1_P: G1," &
"DRAM_SDQS2_N: W1," &
"DRAM_SDQS2_P: W2," &
"DRAM_SDQS3_N: B2," &
"DRAM_SDQS3_P: B1," &
"DRAM_SDWE_B: J5," &
"DRAM_VREF: J3," &
"DRAM_ZQPAD: C5," &
"ENET1_COL: B5," &
"ENET1_CRS: C6," &
"ENET1_MDC: B6," &
"ENET1_MDIO: A6," &
"ENET1_RX_CLK: A5," &
"ENET1_TX_CLK: F7," &
"ENET2_COL: E7," &
"ENET2_CRS: E6," &
"ENET2_RX_CLK: E5," &
"ENET2_TX_CLK: D5," &
"GPANAIO: T15," &
"GPIO1_IO00: C19," &
"GPIO1_IO01: D19," &
"GPIO1_IO02: C20," &
"GPIO1_IO03: D20," &
"GPIO1_IO04: A18," &
"GPIO1_IO05: B18," &
"GPIO1_IO06: D18," &
"GPIO1_IO07: A17," &
"GPIO1_IO08: B17," &
"GPIO1_IO09: A19," &
"GPIO1_IO10: B19," &
"GPIO1_IO11: B20," &
"GPIO1_IO12: B16," &
"GPIO1_IO13: A16," &
"JTAG_MOD: R7," &
"JTAG_TCK: R9," &
"JTAG_TDI: R10," &
"JTAG_TDO: R8," &
"JTAG_TMS: T10," &
"JTAG_TRST_B: T9," &
"KEY_COL0: G20," &
"KEY_COL1: F20," &
"KEY_COL2: G18," &
"KEY_COL3: E20," &
"KEY_COL4: E19," &
"KEY_ROW0: F16," &
"KEY_ROW1: E18," &
"KEY_ROW2: F18," &
"KEY_ROW3: F19," &
"KEY_ROW4: G19," &
"LCD1_CLK: L17," &
"LCD1_DATA00: M20," &
"LCD1_DATA01: M18," &
"LCD1_DATA02: M19," &
"LCD1_DATA03: N19," &
"LCD1_DATA04: N20," &
"LCD1_DATA05: M16," &
"LCD1_DATA06: M15," &
"LCD1_DATA07: L20," &
"LCD1_DATA08: K18," &
"LCD1_DATA09: L16," &
"LCD1_DATA10: L19," &
"LCD1_DATA11: L15," &
"LCD1_DATA12: K16," &
"LCD1_DATA13: K15," &
"LCD1_DATA14: K17," &
"LCD1_DATA15: H16," &
"LCD1_DATA16: H20," &
"LCD1_DATA17: K19," &
"LCD1_DATA18: K20," &
"LCD1_DATA19: J20," &
"LCD1_DATA20: H17," &
"LCD1_DATA21: G17," &
"LCD1_DATA22: H19," &
"LCD1_DATA23: G16," &
"LCD1_ENABLE: J19," &
"LCD1_HSYNC: J16," &
"LCD1_RESET: J18," &
"LCD1_VSYNC: J15," &
"NAND_ALE: W6," &
"NAND_CE0_B: U7," &
"NAND_CE1_B: V9," &
"NAND_CLE: T8," &
"NAND_DATA00: V6," &
"NAND_DATA01: W8," &
"NAND_DATA02: Y7," &
"NAND_DATA03: U5," &
"NAND_DATA04: W7," &
"NAND_DATA05: T5," &
"NAND_DATA06: Y8," &
"NAND_DATA07: T6," &
"NAND_READY_B: Y6," &
"NAND_RE_B: U8," &
"NAND_WE_B: T7," &
"NAND_WP_B: V7," &
"NGND_KEL0: P13," &
"NVCC_DRAM_2P5: K7," &
"NVCC_ENET: F6," &
"NVCC_GPIO: F15," &
"NVCC_HIGH: R12," &
"NVCC_JTAG: R11," &
"NVCC_KEY: G15," &
"NVCC_LCD1: H15," &
"NVCC_LOW: V13," &
"NVCC_NAND: R6," &
"NVCC_PLL: U18," &
"NVCC_QSPI: F14," &
"NVCC_RGMII1: F8," &
"NVCC_RGMII2: F9," &
"NVCC_SD2: F13," &
"NVCC_SD4: V10," &
"NVCC_USB_H: V5," &
"ONOFF: R15," &
"PCIE_VP_CAP: L18," &
"POR_B: R16," &
"QSPI1A_DATA0: E15," &
"QSPI1A_DATA1: C15," &
"QSPI1A_DATA2: D14," &
"QSPI1A_DATA3: E16," &
"QSPI1A_DQS: A13," &
"QSPI1A_SCLK: D17," &
"QSPI1A_SS0_B: C17," &
"QSPI1A_SS1_B: E17," &
"QSPI1B_DATA0: B14," &
"QSPI1B_DATA1: A14," &
"QSPI1B_DATA2: D13," &
"QSPI1B_DATA3: C13," &
"QSPI1B_DQS: B13," &
"QSPI1B_SCLK: B15," &
"QSPI1B_SS0_B: C14," &
"QSPI1B_SS1_B: A15," &
"RGMII1_RD0: D8," &
"RGMII1_RD1: C9," &
"RGMII1_RD2: D7," &
"RGMII1_RD3: E8," &
"RGMII1_RXC: E9," &
"RGMII1_RX_CTL: C10," &
"RGMII1_TD0: D11," &
"RGMII1_TD1: C12," &
"RGMII1_TD2: E11," &
"RGMII1_TD3: D10," &
"RGMII1_TXC: C11," &
"RGMII1_TX_CTL: E10," &
"RGMII2_RD0: A8," &
"RGMII2_RD1: B8," &
"RGMII2_RD2: A7," &
"RGMII2_RD3: B7," &
"RGMII2_RXC: A9," &
"RGMII2_RX_CTL: B9," &
"RGMII2_TD0: A11," &
"RGMII2_TD1: B11," &
"RGMII2_TD2: A12," &
"RGMII2_TD3: B12," &
"RGMII2_TXC: A10," &
"RGMII2_TX_CTL: B10," &
"RTC_XTALI: V19," &
"RTC_XTALO: V20," &
"SD2_CLK: E12," &
"SD2_CMD: F12," &
"SD2_DATA0: E13," &
"SD2_DATA1: E14," &
"SD2_DATA2: F10," &
"SD2_DATA3: F11," &
"SD3_CLK: V11," &
"SD3_CMD: T13," &
"SD3_DATA0: U10," &
"SD3_DATA1: T11," &
"SD3_DATA2: V15," &
"SD3_DATA3: V14," &
"SD3_DATA4: U14," &
"SD3_DATA5: U13," &
"SD3_DATA6: V12," &
"SD3_DATA7: U11," &
"SD4_CLK: W11," &
"SD4_CMD: W12," &
"SD4_DATA0: Y9," &
"SD4_DATA1: W9," &
"SD4_DATA2: Y13," &
"SD4_DATA3: W13," &
"SD4_DATA4: Y12," &
"SD4_DATA5: Y11," &
"SD4_DATA6: Y10," &
"SD4_DATA7: W10," &
"SD4_RESET_B: T12," &
"SNVS_PMIC_ON_REQ: P16," &
"SNVS_TAMPER: P15," &
"TEST_MODE: N14," &
"USB_H_DATA: Y5," &
"USB_H_STROBE: W5," &
"USB_OTG1_CHD_B: W20," &
"USB_OTG1_DN: W19," &
"USB_OTG1_DP: Y19," &
"USB_OTG1_VBUS: T17," &
"USB_OTG2_DN: W17," &
"USB_OTG2_DP: Y17," &
"USB_OTG2_VBUS: U17," &
"VDDA_ADC_3P3: R13," &
"VDD_SNVS_CAP: T18," &
"VDD_SNVS_IN: R18," &
"VDD_USB_CAP: V17," &
"XTALI: T19," &
"NVCC_DRAM: (G6, H6, J6, K6, L6, M6, N6, P6)," &
"VDD_ARM_CAP: (C16, D16, H10, H11, H12, H13, J13, K13, L13)," &
"VDD_ARM_IN: (H18, J10, J11, J12, K12, L12)," &
"VDD_HIGH_CAP: (N17, N18)," &
"VDD_HIGH_IN: (P17, P18)," &
"VDD_SOC_CAP: (H8, H9, J8, K8, L8, M13, M8, N10, N11, N12, N8, N9, V8)," &
"VDD_SOC_IN: (C7, C8, J9, K9, L9, M10, M11, M12, M9)," &
"VSS: (A1, A20, C18, C3, C4, D12, D15, D6, D9, E3, F17, F3, F5, G10, G11, G12, G13, G14, G7, G8, G9, H14, H3, H7, J14, J17, J7, K10, K11, K14, K3, L10, L11, L14, L3, L7, M14, M17, M7, N13, N3, N7, P10, P11, P12, P7, P8, P9, R17, R19, R20, R3, R5, T3, U12, U15, U19, U20, U6, U9, V18, V3, V4, W18, Y1, Y18, Y20)," &
"XTALO: T20" ;
attribute PORT_GROUPING of MX6SX: entity is
"DIFFERENTIAL_VOLTAGE ( " &
"( DRAM_SDCLK0_P , DRAM_SDCLK0_N ) , " &
"( DRAM_SDQS0_P , DRAM_SDQS0_N ) , " &
"( DRAM_SDQS1_P , DRAM_SDQS1_N ) , " &
"( DRAM_SDQS2_P , DRAM_SDQS2_N ) , " &
"( DRAM_SDQS3_P , DRAM_SDQS3_N ) ) " ;
attribute TAP_SCAN_OUT of JTAG_TDO : signal is true;
attribute TAP_SCAN_CLOCK of JTAG_TCK : signal is (5.00e+06,BOTH);
attribute TAP_SCAN_RESET of JTAG_TRST_B : signal is true;
attribute TAP_SCAN_MODE of JTAG_TMS : signal is true;
attribute TAP_SCAN_IN of JTAG_TDI : signal is true;
attribute COMPLIANCE_PATTERNS of MX6SX: entity is
"(TEST_MODE, JTAG_MOD, POR_B) (011)";
attribute INSTRUCTION_LENGTH of MX6SX: entity is 5;
attribute INSTRUCTION_OPCODE of MX6SX: entity is
"BYPASS (11111)," &
"EXTEST (00010)," &
"EXTEST_PULSE (01000)," &
"EXTEST_TRAIN (01001)," &
"HIGHZ (00011)," &
"IDCODE (00000)," &
"PRELOAD (00001)," &
"SAMPLE (00001)," &
"ENABLE_EXTRADEBUG (00100)," &
"ENTER_DEBUG (00101)," &
"SECURITY_ENTER_RESPONSE (01101)," &
"SECURITY_OUTPUT_CHALLENGE (01100)," &
"SERIAL_ACCESS (00110)," &
"TAP_SELECT (00111)";
attribute INSTRUCTION_CAPTURE of MX6SX: entity is "xxx01";
attribute INSTRUCTION_PRIVATE of MX6SX: entity is
"ENABLE_EXTRADEBUG," &
"ENTER_DEBUG," &
"SECURITY_ENTER_RESPONSE," &
"SECURITY_OUTPUT_CHALLENGE," &
"SERIAL_ACCESS," &
"TAP_SELECT";
attribute IDCODE_REGISTER of MX6SX: entity is
"0000" & -- Version
"1000100100011100" & -- Part Number
"00000001110" & -- Manufacturer Identity
"1"; -- IEEE 1149.1 Requirement
attribute REGISTER_ACCESS of MX6SX: entity is
"BOUNDARY (EXTEST_PULSE, EXTEST_TRAIN, SAMPLE, PRELOAD)," &
"BYPASS (BYPASS)," &
"DEVICE_ID (IDCODE)";
attribute BOUNDARY_LENGTH of MX6SX: entity is 494;
attribute BOUNDARY_REGISTER of MX6SX: entity is
-- BSR DESCRIPTION TERMS
-- cell type = BC_0 - BC_99
-- port = port name
-- function
-- input = input only
-- bidir = bidirectional
-- output2 = two state ouput
-- output3 = three state ouput
-- control = control cell
-- controlr = control cell
-- internal = placeholder cell
-- safe = value that turns off drivers in control cells
-- ccell = controlling cell number for I/O direction
-- dsval = disabling (input) value
-- rslt = result if disabled (input = Z)
--
" 0 (BC_2, *, internal, X) ," &
" 1 (BC_2, *, internal, X) ," &
" 2 (BC_2, *, internal, X) ," &
" 3 (BC_2, *, internal, X) ," &
-- num cell port/* function safe [ccell dis rslt]
" 4 (BC_8, SD2_DATA3, bidir, X, 5, 1, Z) ," &
" 5 (BC_2, *, control, 1) ," &
" 6 (BC_8, SD2_DATA2, bidir, X, 7, 1, Z) ," &
" 7 (BC_2, *, control, 1) ," &
" 8 (BC_8, SD2_DATA1, bidir, X, 9, 1, Z) ," &
" 9 (BC_2, *, control, 1) ," &
" 10 (BC_8, SD2_DATA0, bidir, X, 11, 1, Z) ," &
" 11 (BC_2, *, control, 1) ," &
" 12 (BC_8, SD2_CMD, bidir, X, 13, 1, Z) ," &
" 13 (BC_2, *, control, 1) ," &
" 14 (BC_8, SD2_CLK, bidir, X, 15, 1, Z) ," &
" 15 (BC_2, *, control, 1) ," &
" 16 (BC_2, *, internal, X) ," &
" 17 (BC_2, *, internal, X) ," &
" 18 (BC_2, *, internal, X) ," &
" 19 (BC_2, *, internal, X) ," &
" 20 (BC_2, *, internal, X) ," &
" 21 (BC_2, *, internal, X) ," &
" 22 (BC_2, *, internal, X) ," &
" 23 (BC_2, *, internal, X) ," &
" 24 (BC_2, *, internal, X) ," &
" 25 (BC_2, *, internal, X) ," &
" 26 (BC_2, *, internal, X) ," &
" 27 (BC_2, *, internal, X) ," &
" 28 (BC_8, RGMII2_TXC, bidir, X, 29, 1, Z) ," &
" 29 (BC_2, *, control, 1) ," &
" 30 (BC_8, RGMII2_TX_CTL, bidir, X, 31, 1, Z) ," &
" 31 (BC_2, *, control, 1) ," &
" 32 (BC_8, RGMII2_TD3, bidir, X, 33, 1, Z) ," &
" 33 (BC_2, *, control, 1) ," &
" 34 (BC_8, RGMII2_TD2, bidir, X, 35, 1, Z) ," &
" 35 (BC_2, *, control, 1) ," &
" 36 (BC_8, RGMII2_TD1, bidir, X, 37, 1, Z) ," &
" 37 (BC_2, *, control, 1) ," &
" 38 (BC_8, RGMII2_TD0, bidir, X, 39, 1, Z) ," &
" 39 (BC_2, *, control, 1) ," &
" 40 (BC_8, RGMII2_RXC, bidir, X, 41, 1, Z) ," &
" 41 (BC_2, *, control, 1) ," &
" 42 (BC_8, RGMII2_RX_CTL, bidir, X, 43, 1, Z) ," &
" 43 (BC_2, *, control, 1) ," &
" 44 (BC_8, RGMII2_RD3, bidir, X, 45, 1, Z) ," &
" 45 (BC_2, *, control, 1) ," &
" 46 (BC_8, RGMII2_RD2, bidir, X, 47, 1, Z) ," &
" 47 (BC_2, *, control, 1) ," &
" 48 (BC_8, RGMII2_RD1, bidir, X, 49, 1, Z) ," &
" 49 (BC_2, *, control, 1) ," &
" 50 (BC_8, RGMII2_RD0, bidir, X, 51, 1, Z) ," &
" 51 (BC_2, *, control, 1) ," &
" 52 (BC_8, RGMII1_TXC, bidir, X, 53, 1, Z) ," &
" 53 (BC_2, *, control, 1) ," &
" 54 (BC_8, RGMII1_TX_CTL, bidir, X, 55, 1, Z) ," &
" 55 (BC_2, *, control, 1) ," &
" 56 (BC_8, RGMII1_TD3, bidir, X, 57, 1, Z) ," &
" 57 (BC_2, *, control, 1) ," &
" 58 (BC_8, RGMII1_TD2, bidir, X, 59, 1, Z) ," &
" 59 (BC_2, *, control, 1) ," &
" 60 (BC_8, RGMII1_TD1, bidir, X, 61, 1, Z) ," &
" 61 (BC_2, *, control, 1) ," &
" 62 (BC_8, RGMII1_TD0, bidir, X, 63, 1, Z) ," &
" 63 (BC_2, *, control, 1) ," &
" 64 (BC_8, RGMII1_RXC, bidir, X, 65, 1, Z) ," &
" 65 (BC_2, *, control, 1) ," &
" 66 (BC_8, RGMII1_RX_CTL, bidir, X, 67, 1, Z) ," &
" 67 (BC_2, *, control, 1) ," &
" 68 (BC_8, RGMII1_RD3, bidir, X, 69, 1, Z) ," &
" 69 (BC_2, *, control, 1) ," &
" 70 (BC_8, RGMII1_RD2, bidir, X, 71, 1, Z) ," &
" 71 (BC_2, *, control, 1) ," &
" 72 (BC_8, RGMII1_RD1, bidir, X, 73, 1, Z) ," &
" 73 (BC_2, *, control, 1) ," &
" 74 (BC_8, RGMII1_RD0, bidir, X, 75, 1, Z) ," &
" 75 (BC_2, *, control, 1) ," &
" 76 (BC_8, QSPI1B_SS1_B, bidir, X, 77, 1, Z) ," &
" 77 (BC_2, *, control, 1) ," &
" 78 (BC_8, QSPI1B_SS0_B, bidir, X, 79, 1, Z) ," &
" 79 (BC_2, *, control, 1) ," &
" 80 (BC_8, QSPI1B_SCLK, bidir, X, 81, 1, Z) ," &
" 81 (BC_2, *, control, 1) ," &
" 82 (BC_8, QSPI1B_DQS, bidir, X, 83, 1, Z) ," &
" 83 (BC_2, *, control, 1) ," &
" 84 (BC_8, QSPI1B_DATA3, bidir, X, 85, 1, Z) ," &
" 85 (BC_2, *, control, 1) ," &
" 86 (BC_8, QSPI1B_DATA2, bidir, X, 87, 1, Z) ," &
" 87 (BC_2, *, control, 1) ," &
" 88 (BC_8, QSPI1B_DATA1, bidir, X, 89, 1, Z) ," &
" 89 (BC_2, *, control, 1) ," &
" 90 (BC_8, QSPI1B_DATA0, bidir, X, 91, 1, Z) ," &
" 91 (BC_2, *, control, 1) ," &
" 92 (BC_8, QSPI1A_SS1_B, bidir, X, 93, 1, Z) ," &
" 93 (BC_2, *, control, 1) ," &
" 94 (BC_8, QSPI1A_SS0_B, bidir, X, 95, 1, Z) ," &
" 95 (BC_2, *, control, 1) ," &
" 96 (BC_8, QSPI1A_SCLK, bidir, X, 97, 1, Z) ," &
" 97 (BC_2, *, control, 1) ," &
" 98 (BC_8, QSPI1A_DQS, bidir, X, 99, 1, Z) ," &
" 99 (BC_2, *, control, 1) ," &
" 100 (BC_8, QSPI1A_DATA3, bidir, X, 101, 1, Z) ," &
" 101 (BC_2, *, control, 1) ," &
" 102 (BC_8, QSPI1A_DATA2, bidir, X, 103, 1, Z) ," &
" 103 (BC_2, *, control, 1) ," &
" 104 (BC_8, QSPI1A_DATA1, bidir, X, 105, 1, Z) ," &
" 105 (BC_2, *, control, 1) ," &
" 106 (BC_8, QSPI1A_DATA0, bidir, X, 107, 1, Z) ," &
" 107 (BC_2, *, control, 1) ," &
" 108 (BC_8, LCD1_DATA23, bidir, X, 109, 1, Z) ," &
" 109 (BC_2, *, control, 1) ," &
" 110 (BC_8, KEY_ROW4, bidir, X, 111, 1, Z) ," &
" 111 (BC_2, *, control, 1) ," &
" 112 (BC_8, KEY_ROW3, bidir, X, 113, 1, Z) ," &
" 113 (BC_2, *, control, 1) ," &
" 114 (BC_8, KEY_ROW2, bidir, X, 115, 1, Z) ," &
" 115 (BC_2, *, control, 1) ," &
" 116 (BC_8, KEY_ROW1, bidir, X, 117, 1, Z) ," &
" 117 (BC_2, *, control, 1) ," &
" 118 (BC_8, KEY_ROW0, bidir, X, 119, 1, Z) ," &
" 119 (BC_2, *, control, 1) ," &
" 120 (BC_8, KEY_COL4, bidir, X, 121, 1, Z) ," &
" 121 (BC_2, *, control, 1) ," &
" 122 (BC_8, KEY_COL3, bidir, X, 123, 1, Z) ," &
" 123 (BC_2, *, control, 1) ," &
" 124 (BC_8, KEY_COL2, bidir, X, 125, 1, Z) ," &
" 125 (BC_2, *, control, 1) ," &
" 126 (BC_8, KEY_COL1, bidir, X, 127, 1, Z) ," &
" 127 (BC_2, *, control, 1) ," &
" 128 (BC_8, KEY_COL0, bidir, X, 129, 1, Z) ," &
" 129 (BC_2, *, control, 1) ," &
" 130 (BC_8, ENET2_TX_CLK, bidir, X, 131, 1, Z) ," &
" 131 (BC_2, *, control, 1) ," &
" 132 (BC_8, ENET2_RX_CLK, bidir, X, 133, 1, Z) ," &
" 133 (BC_2, *, control, 1) ," &
" 134 (BC_8, ENET2_CRS, bidir, X, 135, 1, Z) ," &
" 135 (BC_2, *, control, 1) ," &
" 136 (BC_8, ENET2_COL, bidir, X, 137, 1, Z) ," &
" 137 (BC_2, *, control, 1) ," &
" 138 (BC_8, ENET1_TX_CLK, bidir, X, 139, 1, Z) ," &
" 139 (BC_2, *, control, 1) ," &
" 140 (BC_8, ENET1_RX_CLK, bidir, X, 141, 1, Z) ," &
" 141 (BC_2, *, control, 1) ," &
" 142 (BC_8, ENET1_MDIO, bidir, X, 143, 1, Z) ," &
" 143 (BC_2, *, control, 1) ," &
" 144 (BC_8, ENET1_MDC, bidir, X, 145, 1, Z) ," &
" 145 (BC_2, *, control, 1) ," &
" 146 (BC_8, ENET1_CRS, bidir, X, 147, 1, Z) ," &
" 147 (BC_2, *, control, 1) ," &
" 148 (BC_8, ENET1_COL, bidir, X, 149, 1, Z) ," &
" 149 (BC_2, *, control, 1) ," &
" 150 (BC_8, GPIO1_IO13, bidir, X, 151, 1, Z) ," &
" 151 (BC_2, *, control, 1) ," &
" 152 (BC_8, GPIO1_IO12, bidir, X, 153, 1, Z) ," &
" 153 (BC_2, *, control, 1) ," &
" 154 (BC_8, GPIO1_IO11, bidir, X, 155, 1, Z) ," &
" 155 (BC_2, *, control, 1) ," &
" 156 (BC_8, GPIO1_IO10, bidir, X, 157, 1, Z) ," &
" 157 (BC_2, *, control, 1) ," &
" 158 (BC_8, GPIO1_IO09, bidir, X, 159, 1, Z) ," &
" 159 (BC_2, *, control, 1) ," &
" 160 (BC_8, GPIO1_IO08, bidir, X, 161, 1, Z) ," &
" 161 (BC_2, *, control, 1) ," &
" 162 (BC_8, GPIO1_IO07, bidir, X, 163, 1, Z) ," &
" 163 (BC_2, *, control, 1) ," &
" 164 (BC_8, GPIO1_IO06, bidir, X, 165, 1, Z) ," &
" 165 (BC_2, *, control, 1) ," &
" 166 (BC_8, GPIO1_IO05, bidir, X, 167, 1, Z) ," &
" 167 (BC_2, *, control, 1) ," &
" 168 (BC_8, GPIO1_IO04, bidir, X, 169, 1, Z) ," &
" 169 (BC_2, *, control, 1) ," &
" 170 (BC_8, GPIO1_IO03, bidir, X, 171, 1, Z) ," &
" 171 (BC_2, *, control, 1) ," &
" 172 (BC_8, GPIO1_IO02, bidir, X, 173, 1, Z) ," &
" 173 (BC_2, *, control, 1) ," &
" 174 (BC_8, GPIO1_IO01, bidir, X, 175, 1, Z) ," &
" 175 (BC_2, *, control, 1) ," &
" 176 (BC_8, GPIO1_IO00, bidir, X, 177, 1, Z) ," &
" 177 (BC_2, *, control, 1) ," &
" 178 (BC_8, LCD1_VSYNC, bidir, X, 179, 1, Z) ," &
" 179 (BC_2, *, control, 1) ," &
" 180 (BC_8, LCD1_RESET, bidir, X, 181, 1, Z) ," &
" 181 (BC_2, *, control, 1) ," &
" 182 (BC_8, LCD1_HSYNC, bidir, X, 183, 1, Z) ," &
" 183 (BC_2, *, control, 1) ," &
" 184 (BC_8, LCD1_ENABLE, bidir, X, 185, 1, Z) ," &
" 185 (BC_2, *, control, 1) ," &
" 186 (BC_8, LCD1_DATA22, bidir, X, 187, 1, Z) ," &
" 187 (BC_2, *, control, 1) ," &
" 188 (BC_8, LCD1_DATA21, bidir, X, 189, 1, Z) ," &
" 189 (BC_2, *, control, 1) ," &
" 190 (BC_8, LCD1_DATA20, bidir, X, 191, 1, Z) ," &
" 191 (BC_2, *, control, 1) ," &
" 192 (BC_8, LCD1_DATA19, bidir, X, 193, 1, Z) ," &
" 193 (BC_2, *, control, 1) ," &
" 194 (BC_8, LCD1_DATA18, bidir, X, 195, 1, Z) ," &
" 195 (BC_2, *, control, 1) ," &
" 196 (BC_8, LCD1_DATA17, bidir, X, 197, 1, Z) ," &
" 197 (BC_2, *, control, 1) ," &
" 198 (BC_8, LCD1_DATA16, bidir, X, 199, 1, Z) ," &
" 199 (BC_2, *, control, 1) ," &
" 200 (BC_8, LCD1_DATA15, bidir, X, 201, 1, Z) ," &
" 201 (BC_2, *, control, 1) ," &
" 202 (BC_8, LCD1_DATA14, bidir, X, 203, 1, Z) ," &
" 203 (BC_2, *, control, 1) ," &
" 204 (BC_8, LCD1_DATA13, bidir, X, 205, 1, Z) ," &
" 205 (BC_2, *, control, 1) ," &
" 206 (BC_8, LCD1_DATA12, bidir, X, 207, 1, Z) ," &
" 207 (BC_2, *, control, 1) ," &
" 208 (BC_8, LCD1_DATA11, bidir, X, 209, 1, Z) ," &
" 209 (BC_2, *, control, 1) ," &
" 210 (BC_8, LCD1_DATA10, bidir, X, 211, 1, Z) ," &
" 211 (BC_2, *, control, 1) ," &
" 212 (BC_8, LCD1_DATA09, bidir, X, 213, 1, Z) ," &
" 213 (BC_2, *, control, 1) ," &
" 214 (BC_8, LCD1_DATA08, bidir, X, 215, 1, Z) ," &
" 215 (BC_2, *, control, 1) ," &
" 216 (BC_8, LCD1_DATA07, bidir, X, 217, 1, Z) ," &
" 217 (BC_2, *, control, 1) ," &
" 218 (BC_8, LCD1_DATA06, bidir, X, 219, 1, Z) ," &
" 219 (BC_2, *, control, 1) ," &
" 220 (BC_8, LCD1_DATA05, bidir, X, 221, 1, Z) ," &
" 221 (BC_2, *, control, 1) ," &
" 222 (BC_8, LCD1_DATA04, bidir, X, 223, 1, Z) ," &
" 223 (BC_2, *, control, 1) ," &
" 224 (BC_8, LCD1_DATA03, bidir, X, 225, 1, Z) ," &
" 225 (BC_2, *, control, 1) ," &
" 226 (BC_8, LCD1_DATA02, bidir, X, 227, 1, Z) ," &
" 227 (BC_2, *, control, 1) ," &
" 228 (BC_8, LCD1_DATA01, bidir, X, 229, 1, Z) ," &
" 229 (BC_2, *, control, 1) ," &
" 230 (BC_8, LCD1_DATA00, bidir, X, 231, 1, Z) ," &
" 231 (BC_2, *, control, 1) ," &
" 232 (BC_8, LCD1_CLK, bidir, X, 233, 1, Z) ," &
" 233 (BC_2, *, control, 1) ," &
" 234 (BC_2, *, internal, X) ," &
" 235 (BC_2, *, internal, X) ," &
" 236 (BC_2, *, internal, X) ," &
" 237 (BC_2, *, internal, X) ," &
" 238 (BC_2, *, internal, X) ," &
" 239 (BC_2, *, internal, X) ," &
" 240 (BC_2, *, internal, X) ," &
" 241 (BC_2, *, internal, X) ," &
" 242 (BC_2, *, internal, X) ," &
" 243 (BC_2, *, internal, X) ," &
" 244 (BC_2, *, internal, X) ," &
" 245 (BC_2, *, internal, X) ," &
" 246 (BC_2, *, internal, X) ," &
" 247 (BC_2, *, internal, X) ," &
" 248 (BC_2, *, internal, X) ," &
" 249 (BC_2, *, internal, X) ," &
" 250 (BC_2, *, internal, X) ," &
" 251 (BC_2, *, internal, X) ," &
" 252 (BC_2, *, internal, X) ," &
" 253 (BC_2, *, internal, X) ," &
" 254 (BC_2, *, internal, X) ," &
" 255 (BC_2, *, internal, X) ," &
" 256 (BC_2, *, internal, X) ," &
" 257 (BC_2, *, internal, X) ," &
" 258 (BC_2, *, internal, X) ," &
" 259 (BC_2, *, internal, X) ," &
" 260 (BC_2, *, internal, X) ," &
" 261 (BC_2, *, internal, X) ," &
" 262 (BC_2, *, internal, X) ," &
" 263 (BC_2, *, internal, X) ," &
" 264 (BC_2, *, internal, X) ," &
" 265 (BC_2, *, internal, X) ," &
" 266 (BC_2, *, internal, X) ," &
" 267 (BC_2, *, internal, X) ," &
" 268 (BC_8, USB_H_STROBE, bidir, X, 269, 1, Z) ," &
" 269 (BC_2, *, control, 1) ," &
" 270 (BC_8, USB_H_DATA, bidir, X, 271, 1, Z) ," &
" 271 (BC_2, *, control, 1) ," &
" 272 (BC_8, SD4_RESET_B, bidir, X, 273, 1, Z) ," &
" 273 (BC_2, *, control, 1) ," &
" 274 (BC_8, SD4_DATA7, bidir, X, 275, 1, Z) ," &
" 275 (BC_2, *, control, 1) ," &
" 276 (BC_8, SD4_DATA6, bidir, X, 277, 1, Z) ," &
" 277 (BC_2, *, control, 1) ," &
" 278 (BC_8, SD4_DATA5, bidir, X, 279, 1, Z) ," &
" 279 (BC_2, *, control, 1) ," &
" 280 (BC_8, SD4_DATA4, bidir, X, 281, 1, Z) ," &
" 281 (BC_2, *, control, 1) ," &
" 282 (BC_8, SD4_DATA3, bidir, X, 283, 1, Z) ," &
" 283 (BC_2, *, control, 1) ," &
" 284 (BC_8, SD4_DATA2, bidir, X, 285, 1, Z) ," &
" 285 (BC_2, *, control, 1) ," &
" 286 (BC_8, SD4_DATA1, bidir, X, 287, 1, Z) ," &
" 287 (BC_2, *, control, 1) ," &
" 288 (BC_8, SD4_DATA0, bidir, X, 289, 1, Z) ," &
" 289 (BC_2, *, control, 1) ," &
" 290 (BC_8, SD4_CMD, bidir, X, 291, 1, Z) ," &
" 291 (BC_2, *, control, 1) ," &
" 292 (BC_8, SD4_CLK, bidir, X, 293, 1, Z) ," &
" 293 (BC_2, *, control, 1) ," &
" 294 (BC_8, SD3_DATA7, bidir, X, 295, 1, Z) ," &
" 295 (BC_2, *, control, 1) ," &
" 296 (BC_8, SD3_DATA6, bidir, X, 297, 1, Z) ," &
" 297 (BC_2, *, control, 1) ," &
" 298 (BC_8, SD3_DATA5, bidir, X, 299, 1, Z) ," &
" 299 (BC_2, *, control, 1) ," &
" 300 (BC_8, SD3_DATA4, bidir, X, 301, 1, Z) ," &
" 301 (BC_2, *, control, 1) ," &
" 302 (BC_8, SD3_DATA3, bidir, X, 303, 1, Z) ," &
" 303 (BC_2, *, control, 1) ," &
" 304 (BC_8, SD3_DATA2, bidir, X, 305, 1, Z) ," &
" 305 (BC_2, *, control, 1) ," &
" 306 (BC_8, SD3_DATA1, bidir, X, 307, 1, Z) ," &
" 307 (BC_2, *, control, 1) ," &
" 308 (BC_8, SD3_DATA0, bidir, X, 309, 1, Z) ," &
" 309 (BC_2, *, control, 1) ," &
" 310 (BC_8, SD3_CMD, bidir, X, 311, 1, Z) ," &
" 311 (BC_2, *, control, 1) ," &
" 312 (BC_8, SD3_CLK, bidir, X, 313, 1, Z) ," &
" 313 (BC_2, *, control, 1) ," &
" 314 (BC_8, NAND_WP_B, bidir, X, 315, 1, Z) ," &
" 315 (BC_2, *, control, 1) ," &
" 316 (BC_8, NAND_WE_B, bidir, X, 317, 1, Z) ," &
" 317 (BC_2, *, control, 1) ," &
" 318 (BC_8, NAND_READY_B, bidir, X, 319, 1, Z) ," &
" 319 (BC_2, *, control, 1) ," &
" 320 (BC_8, NAND_RE_B, bidir, X, 321, 1, Z) ," &
" 321 (BC_2, *, control, 1) ," &
" 322 (BC_8, NAND_DATA07, bidir, X, 323, 1, Z) ," &
" 323 (BC_2, *, control, 1) ," &
" 324 (BC_8, NAND_DATA06, bidir, X, 325, 1, Z) ," &
" 325 (BC_2, *, control, 1) ," &
" 326 (BC_8, NAND_DATA05, bidir, X, 327, 1, Z) ," &
" 327 (BC_2, *, control, 1) ," &
" 328 (BC_8, NAND_DATA04, bidir, X, 329, 1, Z) ," &
" 329 (BC_2, *, control, 1) ," &
" 330 (BC_8, NAND_DATA03, bidir, X, 331, 1, Z) ," &
" 331 (BC_2, *, control, 1) ," &
" 332 (BC_8, NAND_DATA02, bidir, X, 333, 1, Z) ," &
" 333 (BC_2, *, control, 1) ," &
" 334 (BC_8, NAND_DATA01, bidir, X, 335, 1, Z) ," &
" 335 (BC_2, *, control, 1) ," &
" 336 (BC_8, NAND_DATA00, bidir, X, 337, 1, Z) ," &
" 337 (BC_2, *, control, 1) ," &
" 338 (BC_8, NAND_CLE, bidir, X, 339, 1, Z) ," &
" 339 (BC_2, *, control, 1) ," &
" 340 (BC_8, NAND_CE1_B, bidir, X, 341, 1, Z) ," &
" 341 (BC_2, *, control, 1) ," &
" 342 (BC_8, NAND_CE0_B, bidir, X, 343, 1, Z) ," &
" 343 (BC_2, *, control, 1) ," &
" 344 (BC_8, NAND_ALE, bidir, X, 345, 1, Z) ," &
" 345 (BC_2, *, control, 1) ," &
" 346 (BC_8, CCM_PMIC_STBY_REQ, bidir, X, 347, 1, Z) ," &
" 347 (BC_2, *, control, 1) ," &
" 348 (BC_8, SNVS_PMIC_ON_REQ, bidir, X, 349, 1, Z) ," &
" 349 (BC_2, *, control, 1) ," &
" 350 (BC_8, BOOT_MODE1, bidir, X, 351, 1, Z) ," &
" 351 (BC_2, *, control, 1) ," &
" 352 (BC_8, BOOT_MODE0, bidir, X, 353, 1, Z) ," &
" 353 (BC_2, *, control, 1) ," &
" 354 (BC_8, DRAM_DATA31, bidir, X, 355, 1, Z) ," &
" 355 (BC_2, *, control, 1) ," &
" 356 (BC_8, DRAM_DATA30, bidir, X, 357, 1, Z) ," &
" 357 (BC_2, *, control, 1) ," &
" 358 (BC_8, DRAM_DATA29, bidir, X, 359, 1, Z) ," &
" 359 (BC_2, *, control, 1) ," &
" 360 (BC_8, DRAM_DATA28, bidir, X, 361, 1, Z) ," &
" 361 (BC_2, *, control, 1) ," &
" 362 (BC_8, DRAM_DQM3, bidir, X, 363, 1, Z) ," &
" 363 (BC_2, *, control, 1) ," &
" 364 (BC_8, DRAM_SDQS3_P, bidir, X, 365, 1, Z) ," &
" 365 (BC_2, *, control, 1) ," &
" 366 (BC_8, DRAM_DATA27, bidir, X, 367, 1, Z) ," &
" 367 (BC_2, *, control, 1) ," &
" 368 (BC_8, DRAM_DATA26, bidir, X, 369, 1, Z) ," &
" 369 (BC_2, *, control, 1) ," &
" 370 (BC_8, DRAM_DATA25, bidir, X, 371, 1, Z) ," &
" 371 (BC_2, *, control, 1) ," &
" 372 (BC_8, DRAM_DATA24, bidir, X, 373, 1, Z) ," &
" 373 (BC_2, *, control, 1) ," &
" 374 (BC_2, *, internal, X) ," &
" 375 (BC_2, *, internal, X) ," &
" 376 (BC_8, DRAM_DATA23, bidir, X, 377, 1, Z) ," &
" 377 (BC_2, *, control, 1) ," &
" 378 (BC_8, DRAM_DATA22, bidir, X, 379, 1, Z) ," &
" 379 (BC_2, *, control, 1) ," &
" 380 (BC_8, DRAM_DATA21, bidir, X, 381, 1, Z) ," &
" 381 (BC_2, *, control, 1) ," &
" 382 (BC_8, DRAM_DATA20, bidir, X, 383, 1, Z) ," &
" 383 (BC_2, *, control, 1) ," &
" 384 (BC_8, DRAM_SDQS2_P, bidir, X, 385, 1, Z) ," &
" 385 (BC_2, *, control, 1) ," &
" 386 (BC_8, DRAM_DQM2, bidir, X, 387, 1, Z) ," &
" 387 (BC_2, *, control, 1) ," &
" 388 (BC_8, DRAM_DATA19, bidir, X, 389, 1, Z) ," &
" 389 (BC_2, *, control, 1) ," &
" 390 (BC_8, DRAM_DATA18, bidir, X, 391, 1, Z) ," &
" 391 (BC_2, *, control, 1) ," &
" 392 (BC_8, DRAM_DATA17, bidir, X, 393, 1, Z) ," &
" 393 (BC_2, *, control, 1) ," &
" 394 (BC_8, DRAM_DATA16, bidir, X, 395, 1, Z) ," &
" 395 (BC_2, *, control, 1) ," &
" 396 (BC_8, DRAM_SDWE_B, bidir, X, 397, 1, Z) ," &
" 397 (BC_2, *, control, 1) ," &
" 398 (BC_8, DRAM_SDCKE1, bidir, X, 399, 1, Z) ," &
" 399 (BC_2, *, control, 1) ," &
" 400 (BC_8, DRAM_SDCKE0, bidir, X, 401, 1, Z) ," &
" 401 (BC_2, *, control, 1) ," &
" 402 (BC_8, DRAM_SDBA2, bidir, X, 403, 1, Z) ," &
" 403 (BC_2, *, control, 1) ," &
" 404 (BC_8, DRAM_SDBA1, bidir, X, 405, 1, Z) ," &
" 405 (BC_2, *, control, 1) ," &
" 406 (BC_8, DRAM_ADDR13, bidir, X, 407, 1, Z) ," &
" 407 (BC_2, *, control, 1) ," &
" 408 (BC_8, DRAM_RESET, bidir, X, 409, 1, Z) ," &
" 409 (BC_2, *, control, 1) ," &
" 410 (BC_2, *, internal, X) ," &
" 411 (BC_2, *, internal, X) ," &
" 412 (BC_8, DRAM_CS1_B, bidir, X, 413, 1, Z) ," &
" 413 (BC_2, *, control, 1) ," &
" 414 (BC_8, DRAM_CS0_B, bidir, X, 415, 1, Z) ," &
" 415 (BC_2, *, control, 1) ," &
" 416 (BC_8, DRAM_CAS_B, bidir, X, 417, 1, Z) ," &
" 417 (BC_2, *, control, 1) ," &
" 418 (BC_8, DRAM_RAS_B, bidir, X, 419, 1, Z) ," &
" 419 (BC_2, *, control, 1) ," &
" 420 (BC_8, DRAM_ADDR14, bidir, X, 421, 1, Z) ," &
" 421 (BC_2, *, control, 1) ," &
" 422 (BC_8, DRAM_SDBA0, bidir, X, 423, 1, Z) ," &
" 423 (BC_2, *, control, 1) ," &
" 424 (BC_8, DRAM_SDCLK0_P, bidir, X, 425, 1, Z) ," &
" 425 (BC_2, *, control, 1) ," &
" 426 (BC_8, DRAM_ADDR12, bidir, X, 427, 1, Z) ," &
" 427 (BC_2, *, control, 1) ," &
" 428 (BC_8, DRAM_ADDR11, bidir, X, 429, 1, Z) ," &
" 429 (BC_2, *, control, 1) ," &
" 430 (BC_8, DRAM_ADDR10, bidir, X, 431, 1, Z) ," &
" 431 (BC_2, *, control, 1) ," &
" 432 (BC_8, DRAM_ADDR05, bidir, X, 433, 1, Z) ," &
" 433 (BC_2, *, control, 1) ," &
" 434 (BC_8, DRAM_ADDR08, bidir, X, 435, 1, Z) ," &
" 435 (BC_2, *, control, 1) ," &
" 436 (BC_8, DRAM_ADDR07, bidir, X, 437, 1, Z) ," &
" 437 (BC_2, *, control, 1) ," &
" 438 (BC_8, DRAM_ADDR03, bidir, X, 439, 1, Z) ," &
" 439 (BC_2, *, control, 1) ," &
" 440 (BC_8, DRAM_ADDR09, bidir, X, 441, 1, Z) ," &
" 441 (BC_2, *, control, 1) ," &
" 442 (BC_8, DRAM_ADDR04, bidir, X, 443, 1, Z) ," &
" 443 (BC_2, *, control, 1) ," &
" 444 (BC_8, DRAM_ADDR06, bidir, X, 445, 1, Z) ," &
" 445 (BC_2, *, control, 1) ," &
" 446 (BC_8, DRAM_ADDR02, bidir, X, 447, 1, Z) ," &
" 447 (BC_2, *, control, 1) ," &
" 448 (BC_8, DRAM_ADDR01, bidir, X, 449, 1, Z) ," &
" 449 (BC_2, *, control, 1) ," &
" 450 (BC_8, DRAM_ADDR00, bidir, X, 451, 1, Z) ," &
" 451 (BC_2, *, control, 1) ," &
" 452 (BC_8, DRAM_DATA15, bidir, X, 453, 1, Z) ," &
" 453 (BC_2, *, control, 1) ," &
" 454 (BC_8, DRAM_DATA14, bidir, X, 455, 1, Z) ," &
" 455 (BC_2, *, control, 1) ," &
" 456 (BC_8, DRAM_DATA13, bidir, X, 457, 1, Z) ," &
" 457 (BC_2, *, control, 1) ," &
" 458 (BC_8, DRAM_DATA12, bidir, X, 459, 1, Z) ," &
" 459 (BC_2, *, control, 1) ," &
" 460 (BC_8, DRAM_DQM1, bidir, X, 461, 1, Z) ," &
" 461 (BC_2, *, control, 1) ," &
" 462 (BC_8, DRAM_SDQS1_P, bidir, X, 463, 1, Z) ," &
" 463 (BC_2, *, control, 1) ," &
" 464 (BC_8, DRAM_DATA11, bidir, X, 465, 1, Z) ," &
" 465 (BC_2, *, control, 1) ," &
" 466 (BC_8, DRAM_DATA10, bidir, X, 467, 1, Z) ," &
" 467 (BC_2, *, control, 1) ," &
" 468 (BC_8, DRAM_DATA09, bidir, X, 469, 1, Z) ," &
" 469 (BC_2, *, control, 1) ," &
" 470 (BC_8, DRAM_DATA08, bidir, X, 471, 1, Z) ," &
" 471 (BC_2, *, control, 1) ," &
" 472 (BC_8, DRAM_ODT0, bidir, X, 473, 1, Z) ," &
" 473 (BC_2, *, control, 1) ," &
" 474 (BC_8, DRAM_DATA07, bidir, X, 475, 1, Z) ," &
" 475 (BC_2, *, control, 1) ," &
" 476 (BC_8, DRAM_DATA06, bidir, X, 477, 1, Z) ," &
" 477 (BC_2, *, control, 1) ," &
" 478 (BC_8, DRAM_DATA05, bidir, X, 479, 1, Z) ," &
" 479 (BC_2, *, control, 1) ," &
" 480 (BC_8, DRAM_DATA04, bidir, X, 481, 1, Z) ," &
" 481 (BC_2, *, control, 1) ," &
" 482 (BC_8, DRAM_SDQS0_P, bidir, X, 483, 1, Z) ," &
" 483 (BC_2, *, control, 1) ," &
" 484 (BC_8, DRAM_DQM0, bidir, X, 485, 1, Z) ," &
" 485 (BC_2, *, control, 1) ," &
" 486 (BC_8, DRAM_DATA03, bidir, X, 487, 1, Z) ," &
" 487 (BC_2, *, control, 1) ," &
" 488 (BC_8, DRAM_DATA02, bidir, X, 489, 1, Z) ," &
" 489 (BC_2, *, control, 1) ," &
" 490 (BC_8, DRAM_DATA01, bidir, X, 491, 1, Z) ," &
" 491 (BC_2, *, control, 1) ," &
" 492 (BC_8, DRAM_DATA00, bidir, X, 493, 1, Z) ," &
" 493 (BC_2, *, control, 1) ";
end MX6SX;