-- ***** COPYRIGHT (C) 2016 NXP Semiconductors. All Rights Reserved. *******
--
-- Boundary Scan Description Language (BSDL) File
-- Generated by Viper version: 2011.05.12 at: Mon Jul 11 10:28:25 2011
--
-- Device: K10 50MHz in 32QFN package
-- Package Type: K10DX128_32QFN_5x5
-- Version: 1.0
-- Date:���������01/5/2016
--
-- THIS SOFTWARE IS PROVIDED BY FREESCALE "AS IS" AND ANY EXPRESSED OR
-- IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
-- OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
-- IN NO EVENT SHALL FREESCALE OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
-- INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-- HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
-- STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
-- IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
-- THE POSSIBILITY OF SUCH DAMAGE.
entity K10DX128VFM5 is
generic (PHYSICAL_PIN_MAP : string := "K10DX128VFM5");
-- PORT DESCRIPTION TERMS
-- in = input only
-- out = three-state output (0, Z, 1)
-- buffer = two-state output (0, 1)
-- inout = bidirectional
-- linkage = OTHER (vdd, vss, analog)
--
-- bit = single pin
-- bit_vector = group of pins with suffix 0 to n
port (
PTA0: in bit;
PTA1: in bit;
PTA18: inout bit;
PTA19: inout bit;
PTA2: out bit;
PTA3: in bit;
PTA4: inout bit;
PTB0: inout bit;
PTB1: inout bit;
PTC1: inout bit;
PTC2: inout bit;
PTC3: inout bit;
PTC4: inout bit;
PTC5: inout bit;
PTC6: inout bit;
PTC7: inout bit;
PTD4: inout bit;
PTD5: inout bit;
PTD6: inout bit;
PTD7: inout bit;
PTE16: inout bit;
PTE17: inout bit;
PTE18: inout bit;
PTE19: inout bit;
RESETB: inout bit;
EXTAL32: linkage bit;
VBAT: linkage bit;
VDD: linkage bit;
VDDA: linkage bit;
VSS: linkage bit;
VSSA: linkage bit;
XTAL32: linkage bit);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of K10DX128VFM5: entity is "STD_1149_1_2001";
attribute PIN_MAP of K10DX128VFM5: entity is PHYSICAL_PIN_MAP;
constant K10DX128_32QFN_5x5 :PIN_MAP_STRING :=
"PTA0: 12," &
"PTA1: 13," &
"PTA18: 17," &
"PTA19: 18," &
"PTA2: 14," &
"PTA3: 15," &
"PTA4: 16," &
"PTB0: 20," &
"PTB1: 21," &
"PTC1: 22," &
"PTC2: 23," &
"PTC3: 24," &
"PTC4: 25," &
"PTC5: 26," &
"PTC6: 27," &
"PTC7: 28," &
"PTD4: 29," &
"PTD5: 30," &
"PTD6: 31," &
"PTD7: 32," &
"PTE16: 3," &
"PTE17: 4," &
"PTE18: 5," &
"PTE19: 6," &
"RESETB: 19," &
"EXTAL32: 10," &
"VBAT: 11," &
"VDD: 1," &
"VDDA: 7," &
"VSS: 2," &
"VSSA: 8," &
"XTAL32: 9" ;
attribute TAP_SCAN_OUT of PTA2 : signal is true;
attribute TAP_SCAN_CLOCK of PTA0 : signal is (2.00e+07,BOTH);
attribute TAP_SCAN_MODE of PTA3 : signal is true;
attribute TAP_SCAN_IN of PTA1 : signal is true;
attribute INSTRUCTION_LENGTH of K10DX128VFM5: entity is 4;
attribute INSTRUCTION_OPCODE of K10DX128VFM5: entity is
"BYPASS (1111)," &
"CLAMP (1100)," &
"EXTEST (0100)," &
"HIGHZ (1001)," &
"IDCODE (0000)," &
"PRELOAD (0010)," &
"SAMPLE (0011)," &
"EZPORT (1101)," &
"JTAGDP_ABORT (1000)," &
"JTAGDP_APACC (1011)," &
"JTAGDP_DPACC (1010)," &
"JTAGDP_IDCODE (1110)";
attribute INSTRUCTION_CAPTURE of K10DX128VFM5: entity is "xx01";
attribute INSTRUCTION_PRIVATE of K10DX128VFM5: entity is
"ENABLE_CENSOR_CTRL," &
"ENABLE_TEST_CTRL," &
"EZPORT," &
"JTAGDP_ABORT," &
"JTAGDP_APACC," &
"JTAGDP_DPACC," &
"JTAGDP_IDCODE";
attribute IDCODE_REGISTER of K10DX128VFM5: entity is
"0000" & -- Version
"1011000000000010" & -- Part Number
"00000001110" & -- Manufacturer Identity
"1"; -- IEEE 1149.1 Requirement
attribute REGISTER_ACCESS of K10DX128VFM5: entity is
"BYPASS (BYPASS)," &
"DEVICE_ID (IDCODE)";
attribute BOUNDARY_LENGTH of K10DX128VFM5: entity is 80;
attribute BOUNDARY_REGISTER of K10DX128VFM5: entity is
-- BSR DESCRIPTION TERMS
-- cell type = BC_0 - BC_99
-- port = port name
-- function
-- input = input only
-- bidir = bidirectional
-- output2 = two state ouput
-- output3 = three state ouput
-- control = control cell
-- controlr = control cell
-- internal = placeholder cell
-- safe = value that turns off drivers in control cells
-- ccell = controlling cell number for I/O direction
-- dsval = disabling (input) value
-- rslt = result if disabled (input = Z)
--
-- num cell port/* function safe [ccell dis rslt]
" 0 (BC_1, *, internal, X) ," &
" 1 (BC_1, *, internal, X) ," &
" 2 (BC_2, *, control, 1) ," &
" 3 (BC_8, PTE16, bidir, X, 2, 1, Z) ," &
" 4 (BC_2, *, control, 1) ," &
" 5 (BC_8, PTE17, bidir, X, 4, 1, Z) ," &
" 6 (BC_2, *, control, 1) ," &
" 7 (BC_8, PTE18, bidir, X, 6, 1, Z) ," &
" 8 (BC_2, *, control, 1) ," &
" 9 (BC_8, PTE19, bidir, X, 8, 1, Z) ," &
" 10 (BC_2, *, control, 1) ," &
" 11 (BC_8, PTA4, bidir, X, 10, 1, Z) ," &
" 12 (BC_1, *, internal, X) ," &
" 13 (BC_1, *, internal, X) ," &
" 14 (BC_1, *, internal, X) ," &
" 15 (BC_1, *, internal, X) ," &
" 16 (BC_2, *, control, 1) ," &
" 17 (BC_8, PTA18, bidir, X, 16, 1, Z) ," &
" 18 (BC_2, *, control, 1) ," &
" 19 (BC_8, PTA19, bidir, X, 18, 1, Z) ," &
" 20 (BC_2, *, control, 1) ," &
" 21 (BC_8, RESETB, bidir, 1, 20, 1, Z) ," &
" 22 (BC_2, *, control, 1) ," &
" 23 (BC_8, PTB0, bidir, X, 22, 1, Z) ," &
" 24 (BC_2, *, control, 1) ," &
" 25 (BC_8, PTB1, bidir, X, 24, 1, Z) ," &
" 26 (BC_1, *, internal, X) ," &
" 27 (BC_1, *, internal, X) ," &
" 28 (BC_1, *, internal, X) ," &
" 29 (BC_1, *, internal, X) ," &
" 30 (BC_1, *, internal, X) ," &
" 31 (BC_1, *, internal, X) ," &
" 32 (BC_1, *, internal, X) ," &
" 33 (BC_1, *, internal, X) ," &
" 34 (BC_1, *, internal, X) ," &
" 35 (BC_1, *, internal, X) ," &
" 36 (BC_1, *, internal, X) ," &
" 37 (BC_1, *, internal, X) ," &
" 38 (BC_1, *, internal, X) ," &
" 39 (BC_1, *, internal, X) ," &
" 40 (BC_2, *, control, 1) ," &
" 41 (BC_8, PTC1, bidir, X, 40, 1, Z) ," &
" 42 (BC_2, *, control, 1) ," &
" 43 (BC_8, PTC2, bidir, X, 42, 1, Z) ," &
" 44 (BC_2, *, control, 1) ," &
" 45 (BC_8, PTC3, bidir, X, 44, 1, Z) ," &
" 46 (BC_2, *, control, 1) ," &
" 47 (BC_8, PTC4, bidir, X, 46, 1, Z) ," &
" 48 (BC_2, *, control, 1) ," &
" 49 (BC_8, PTC5, bidir, X, 48, 1, Z) ," &
" 50 (BC_2, *, control, 1) ," &
" 51 (BC_8, PTC6, bidir, X, 50, 1, Z) ," &
" 52 (BC_2, *, control, 1) ," &
" 53 (BC_8, PTC7, bidir, X, 52, 1, Z) ," &
" 54 (BC_1, *, internal, X) ," &
" 55 (BC_1, *, internal, X) ," &
" 56 (BC_1, *, internal, X) ," &
" 57 (BC_1, *, internal, X) ," &
" 58 (BC_1, *, internal, X) ," &
" 59 (BC_1, *, internal, X) ," &
" 60 (BC_1, *, internal, X) ," &
" 61 (BC_1, *, internal, X) ," &
" 62 (BC_1, *, internal, X) ," &
" 63 (BC_1, *, internal, X) ," &
" 64 (BC_1, *, internal, X) ," &
" 65 (BC_1, *, internal, X) ," &
" 66 (BC_1, *, internal, X) ," &
" 67 (BC_1, *, internal, X) ," &
" 68 (BC_1, *, internal, X) ," &
" 69 (BC_1, *, internal, X) ," &
" 70 (BC_2, *, control, 1) ," &
" 71 (BC_8, PTD4, bidir, X, 70, 1, Z) ," &
" 72 (BC_2, *, control, 1) ," &
" 73 (BC_8, PTD5, bidir, X, 72, 1, Z) ," &
" 74 (BC_2, *, control, 1) ," &
" 75 (BC_8, PTD6, bidir, X, 74, 1, Z) ," &
" 76 (BC_2, *, control, 1) ," &
" 77 (BC_8, PTD7, bidir, X, 76, 1, Z) ," &
" 78 (BC_1, *, internal, X) ," &
" 79 (BC_1, *, internal, X) ";
end K10DX128VFM5;
