--MOTOROLA SSDT JTAG SOFTWARE
--BSDL File Generated: Fri Nov 18 15:29:51 2005
-- -----------------------------------------------------------------------------
-- RELEASE HISTORY
-- VERSION DATE AUTHOR DESCRIPTION
-- 1.1 08/04/06 Melissa Hunter Revised signal names to match documentation
-- -----------------------------------------------------------------------------
entity MCF5328 is
generic(PHYSICAL_PIN_MAP:string:="PBGA");
port(LCD_DATA: inout bit_vector(17 downto 0);
FEC_RXD: inout bit_vector(3 downto 0);
FEC_RXDV: inout bit;
FEC_RXCLK: inout bit;
FEC_CRS: inout bit;
FEC_COL: inout bit;
LCD_OE_ACD: inout bit;
LCD_CLS: inout bit;
LCD_CONTRAST: inout bit;
LCD_FLM_VSYNC: inout bit;
LCD_LP_HSYNC: inout bit;
LCD_LSCLK: inout bit;
LCD_PS: inout bit;
LCD_REV: inout bit;
LCD_SPL_SPR: inout bit;
U1CTS_b: inout bit;
U1RTS_b: inout bit;
U1TXD: inout bit;
U1RXD: inout bit;
CS_b: inout bit_vector(5 downto 0);
A: inout bit_vector(23 downto 0);
TEST: in bit;
TA_b: inout bit;
PWM7: inout bit;
PWM5: inout bit;
PWM3: inout bit;
PWM1: inout bit;
IRQ_b: inout bit_vector(7 downto 1);
RESET_b: inout bit;
DRAMSEL: inout bit;
RSTOUT_b: inout bit;
U0CTS_b: inout bit;
JTAG_EN: in bit;
TMS: in bit;
TRST_b: in bit;
U0RTS_b: inout bit;
U0TXD: inout bit;
U0RXD: inout bit;
QSPI_PCS: inout bit_vector(2 downto 0);
QSPI_SCK: inout bit;
QSPI_DOUT: inout bit;
QSPI_DIN: inout bit;
PST: inout bit_vector(3 downto 0);
DDATA: inout bit_vector(3 downto 0);
RCON_b: inout bit;
OE_b: inout bit;
SD_RAS_b: inout bit;
SD_CAS_b: inout bit;
RWb: inout bit;
SD_A10: inout bit;
D: inout bit_vector(31 downto 0);
BS_B: inout bit_vector(3 downto 0);
SD_DQS: inout bit_vector(3 downto 2);
TCLK: in bit;
TDO: out bit;
TDI: in bit;
FB_CLK: inout bit;
SD_CLK_b: inout bit;
SD_CLK: inout bit;
SD_SDR_DQS: inout bit;
SD_CS_b: inout bit_vector(1 downto 0);
SD_CKE: inout bit;
SD_WE_b: inout bit;
TS_b: inout bit;
SSI_TXD: inout bit;
SSI_RXD: inout bit;
SSI_FS: inout bit;
SSI_MCLK: inout bit;
SSI_BCLK: inout bit;
I2C_SCL: inout bit;
I2C_SDA: inout bit;
T3IN: inout bit;
T2IN: inout bit;
T1IN: inout bit;
T0IN: inout bit;
FEC_TXD: inout bit_vector(3 downto 0);
FEC_MDC: inout bit;
FEC_MDIO: inout bit;
FEC_TXER: inout bit;
FEC_TXEN: inout bit;
FEC_TXCLK: inout bit;
FEC_RXER: inout bit;
EXTAL: linkage bit;
XTAL: linkage bit;
USB_DEV_DLPS: linkage bit;
USB_DEV_DMNS: linkage bit;
USB_HOST_DLPS: linkage bit;
USB_HOST_DMNS: linkage bit;
EXTAL32k: linkage bit;
XTAL32k: linkage bit;
IVDD: linkage bit_vector(4 downto 0);
EVDD: linkage bit_vector(16 downto 0);
VSS: linkage bit_vector(16 downto 0);
SDVDD: linkage bit_vector(15 downto 0);
PLL_VSS: linkage bit;
PLL_VDD: linkage bit;
USBD_VDD: linkage bit;
USBH_VSS: linkage bit
);
use STD_1149_1_2001.all;
attribute COMPONENT_CONFORMANCE of MCF5328 : entity is "STD_1149_1_2001";
attribute PIN_MAP of MCF5328 : entity is PHYSICAL_PIN_MAP;
constant PBGA : PIN_MAP_STRING :=
"LCD_DATA: (C9,D9,A7,B7,C7,D7,D6,E6,A5,B5,C5,D5,A4,A3,B4,C4," &
"B3,C3)," &
"FEC_RXD: (E7,A6,B6,C6)," &
"FEC_RXDV: D8," &
"FEC_RXCLK: C8," &
"FEC_CRS: B8," &
"FEC_COL: A8," &
"LCD_OE_ACD: B9," &
"LCD_CLS: A9," &
"LCD_CONTRAST: D10," &
"LCD_FLM_VSYNC: C10," &
"LCD_LP_HSYNC: B10," &
"LCD_LSCLK: A10," &
"LCD_PS: A11," &
"LCD_REV: B11," &
"LCD_SPL_SPR: C11," &
"U1CTS_b: D11," &
"U1RTS_b: E10," &
"U1TXD: E11," &
"U1RXD: E12," &
"CS_b: (B13,A13,A12,B12,C12,D12)," &
"A: (C13,D13,E13,A14,B14,C14,A15,B15,D14,B16,C15,C16,D15,D16,E14,E15," &
"E16,F13,F14,F15,F16,G16,G15,G14)," &
"TEST: A16," &
"TA_b: G13," &
"PWM7: H13," &
"PWM5: H14," &
"PWM3: H15," &
"PWM1: H16," &
"IRQ_b: (J13,J14,J15,J16,K14,K15,K16)," &
"RESET_b: N15," &
"DRAMSEL: H12," &
"RSTOUT_b: P14," &
"U0CTS_b: R15," &
"JTAG_EN: M13," &
"TMS: R16," &
"EXTAL: P16," &
"XTAL: N16," &
"USB_DEV_DLPS: L16," &
"USB_DEV_DMNS: L15," &
"USB_HOST_DLPS: M16," &
"USB_HOST_DMNS: M15," &
"EXTAL32k: P13," &
"XTAL32k: R13," &
"TRST_b: P15," &
"U0RTS_b: T15," &
"U0TXD: T14," &
"U0RXD: R14," &
"QSPI_PCS: (T12,T13,P11)," &
"QSPI_SCK: R12," &
"QSPI_DOUT: P12," &
"QSPI_DIN: N12," &
"PST: (R10,T10,R11,T11)," &
"DDATA: (N9,P9,N10,P10)," &
"RCON_b: M8," &
"OE_b: R9," &
"SD_RAS_b: R3," &
"SD_CAS_b: P3," &
"RWb: N8," &
"SD_A10: P2," &
"D: (M1,M2,M3,M4,N1,N2,N3,N4,T3,P4,R4,T4,N5,P5,R5,T5," &
"J3,J2,J1,K4,K3,K2,K1,L2,R6,N7,P7,R7,T7,P8,R8,T8)," &
"BS_B: (L4,P6,L3,N6)," &
"SD_DQS: (L1,T6)," &
"TCLK: T9," &
"TDO: N11," &
"TDI: N14," &
"FB_CLK: T2," &
"SD_CLK_b: R2," &
"SD_CLK: R1," &
"SD_SDR_DQS: P1," &
"SD_CS_b: (J4,H1)," &
"SD_CKE: H2," &
"SD_WE_b: H3," &
"TS_b: H4," &
"SSI_TXD: G1," &
"SSI_RXD: G2," &
"SSI_FS: G3," &
"SSI_MCLK: G4," &
"SSI_BCLK: F4," &
"I2C_SCL: F3," &
"I2C_SDA: F2," &
"T3IN: F1," &
"T2IN: E1," &
"T1IN: E2," &
"T0IN: E3," &
"FEC_TXD: (D3,D2,D1,E4)," &
"FEC_MDC: C1," &
"FEC_MDIO: C2," &
"FEC_TXER: B1," &
"FEC_TXEN: B2," &
"FEC_TXCLK: A2," &
"FEC_RXER: D4," &
"IVDD: (E5, M5, G12, M11, M12)," &
"EVDD: (F5, G5, H5, F6, G6, H6, F7, F8, E8, J11, K11, K12, L11, L9, L10, M9, M10)," &
"VSS: (G7, G8, G9, G10, H7, H8, H9, H10, J7, J8, J9, J10, K7, K8, K9, K10, L12 )," &
"SDVDD: (J5, K5, L5, J6, K6, L6, L7, M6, M7, L8, E9, F9, F10, F11, G11, H11)," &
"PLL_VSS: K13," &
"PLL_VDD: J12," &
"USBD_VDD: L14," &
"USBH_VSS: M14" ;
attribute TAP_SCAN_IN of tdi:signal is true;
attribute TAP_SCAN_OUT of tdo:signal is true;
attribute TAP_SCAN_MODE of tms:signal is true;
attribute TAP_SCAN_RESET of trst_b:signal is true;
attribute TAP_SCAN_CLOCK of tclk:signal is (40.0e6,BOTH);
attribute COMPLIANCE_PATTERNS of MCF5328 : entity is
"(test,jtag_en)(01)";
attribute INSTRUCTION_LENGTH of MCF5328 : entity is 5;
attribute INSTRUCTION_OPCODE of MCF5328 : entity is
"BYPASS (11111)," &
"IDCODE (00001)," &
"EXTEST (00100)," &
"PRELOAD (00010)," &
"SAMPLE (00011)," &
"HIGHZ (01001)," &
"RUN_PLLBIST (01010)," &
"CLAMP (01100)," &
"TEST_LEAKAGE (00101)," &
"ENABLE_TEST_CTRL (00110)" ;
attribute INSTRUCTION_CAPTURE of MCF5328 : entity is "00001";
attribute INSTRUCTION_PRIVATE of MCF5328 : entity is
"TEST_LEAKAGE, ENABLE_TEST_CTRL" ;
attribute IDCODE_REGISTER of MCF5328 : entity is
"0010" & -- version number
"100000" & -- design center
"0001011001" & -- part number
"00000001110" & -- manufacturer ID (Motorola)
"1"; -- STD header
attribute REGISTER_ACCESS of MCF5328 : entity is
"BYPASS(TEST_LEAKAGE)," &
"PLLBIST_REG[64](RUN_PLLBIST)," &
"TEST_CTRL[5](ENABLE_TEST_CTRL)";
attribute BOUNDARY_LENGTH of MCF5328 : entity is 354;
attribute BOUNDARY_REGISTER of MCF5328 : entity is
--- num cell port func safe [ccell dis rslt]
"0 (BC_8, LCD_DATA(4), bidir, X, 1, 1, Z)," &
"1 (BC_2, *, control, 1)," &
"2 (BC_8, LCD_DATA(5), bidir, X, 3, 1, Z)," &
"3 (BC_2, *, control, 1)," &
"4 (BC_8, LCD_DATA(6), bidir, X, 5, 1, Z)," &
"5 (BC_2, *, control, 1)," &
"6 (BC_8, LCD_DATA(7), bidir, X, 7, 1, Z)," &
"7 (BC_2, *, control, 1)," &
"8 (BC_8, LCD_DATA(8), bidir, X, 9, 1, Z)," &
"9 (BC_2, *, control, 1)," &
"10 (BC_8, LCD_DATA(9), bidir, X, 11, 1, Z)," &
"11 (BC_2, *, control, 1)," &
"12 (BC_8, LCD_DATA(10), bidir, X, 13, 1, Z)," &
"13 (BC_2, *, control, 1)," &
"14 (BC_8, LCD_DATA(11), bidir, X, 15, 1, Z)," &
"15 (BC_2, *, control, 1)," &
"16 (BC_8, FEC_RXD(0), bidir, X, 17, 1, Z)," &
"17 (BC_2, *, control, 1)," &
"18 (BC_8, FEC_RXD(1), bidir, X, 19, 1, Z)," &
"19 (BC_2, *, control, 1)," &
"20 (BC_8, FEC_RXD(2), bidir, X, 21, 1, Z)," &
"21 (BC_2, *, control, 1)," &
"22 (BC_8, FEC_RXD(3), bidir, X, 23, 1, Z)," &
"23 (BC_2, *, control, 1)," &
"24 (BC_8, LCD_DATA(12), bidir, X, 25, 1, Z)," &
"25 (BC_2, *, control, 1)," &
"26 (BC_8, LCD_DATA(13), bidir, X, 27, 1, Z)," &
"27 (BC_2, *, control, 1)," &
"28 (BC_8, LCD_DATA(14), bidir, X, 29, 1, Z)," &
"29 (BC_2, *, control, 1)," &
"30 (BC_8, LCD_DATA(15), bidir, X, 31, 1, Z)," &
"31 (BC_2, *, control, 1)," &
"32 (BC_8, FEC_RXDV, bidir, X, 33, 1, Z)," &
"33 (BC_2, *, control, 1)," &
"34 (BC_8, FEC_RXCLK, bidir, X, 35, 1, Z)," &
"35 (BC_2, *, control, 1)," &
"36 (BC_8, FEC_CRS, bidir, X, 37, 1, Z)," &
"37 (BC_2, *, control, 1)," &
"38 (BC_8, FEC_COL, bidir, X, 39, 1, Z)," &
"39 (BC_2, *, control, 1)," &
"40 (BC_8, LCD_DATA(16), bidir, X, 41, 1, Z)," &
"41 (BC_2, *, control, 1)," &
"42 (BC_8, LCD_DATA(17), bidir, X, 43, 1, Z)," &
"43 (BC_2, *, control, 1)," &
"44 (BC_8, LCD_OE_ACD, bidir, X, 45, 1, Z)," &
"45 (BC_2, *, control, 1)," &
"46 (BC_8, LCD_CLS, bidir, X, 47, 1, Z)," &
"47 (BC_2, *, control, 1)," &
"48 (BC_8, LCD_CONTRAST, bidir, X, 49, 1, Z)," &
"49 (BC_2, *, control, 1)," &
"50 (BC_8, LCD_FLM_VSYNC, bidir, X, 51, 1, Z)," &
"51 (BC_2, *, control, 1)," &
"52 (BC_8, LCD_LP_HSYNC, bidir, X, 53, 1, Z)," &
"53 (BC_2, *, control, 1)," &
"54 (BC_8, LCD_LSCLK, bidir, X, 55, 1, Z)," &
"55 (BC_2, *, control, 1)," &
"56 (BC_8, LCD_PS, bidir, X, 57, 1, Z)," &
"57 (BC_2, *, control, 1)," &
"58 (BC_8, LCD_REV, bidir, X, 59, 1, Z)," &
"59 (BC_2, *, control, 1)," &
"60 (BC_8, LCD_SPL_SPR, bidir, X, 61, 1, Z)," &
"61 (BC_2, *, control, 1)," &
"62 (BC_8, U1CTS_b, bidir, X, 63, 1, Z)," &
"63 (BC_2, *, control, 1)," &
"64 (BC_8, U1RTS_b, bidir, X, 65, 1, Z)," &
"65 (BC_2, *, control, 1)," &
"66 (BC_8, U1TXD, bidir, X, 67, 1, Z)," &
"67 (BC_2, *, control, 1)," &
"68 (BC_8, U1RXD, bidir, X, 69, 1, Z)," &
"69 (BC_2, *, control, 1)," &
"70 (BC_8, CS_b(0), bidir, X, 71, 1, Z)," &
"71 (BC_2, *, control, 1)," &
"72 (BC_8, CS_b(1), bidir, X, 73, 1, Z)," &
"73 (BC_2, *, control, 1)," &
"74 (BC_8, CS_b(2), bidir, X, 75, 1, Z)," &
"75 (BC_2, *, control, 1)," &
"76 (BC_8, CS_b(3), bidir, X, 77, 1, Z)," &
"77 (BC_2, *, control, 1)," &
"78 (BC_8, CS_b(4), bidir, X, 79, 1, Z)," &
"79 (BC_2, *, control, 1)," &
"80 (BC_8, CS_b(5), bidir, X, 81, 1, Z)," &
"81 (BC_2, *, control, 1)," &
"82 (BC_8, A(23), bidir, X, 83, 1, Z)," &
"83 (BC_2, *, control, 1)," &
"84 (BC_8, A(22), bidir, X, 85, 1, Z)," &
"85 (BC_2, *, control, 1)," &
"86 (BC_8, A(21), bidir, X, 87, 1, Z)," &
"87 (BC_2, *, control, 1)," &
"88 (BC_8, A(20), bidir, X, 89, 1, Z)," &
"89 (BC_2, *, control, 1)," &
"90 (BC_8, A(19), bidir, X, 91, 1, Z)," &
"91 (BC_2, *, control, 1)," &
"92 (BC_8, A(18), bidir, X, 93, 1, Z)," &
"93 (BC_2, *, control, 1)," &
"94 (BC_8, A(17), bidir, X, 95, 1, Z)," &
"95 (BC_2, *, control, 1)," &
"96 (BC_8, A(16), bidir, X, 97, 1, Z)," &
"97 (BC_2, *, control, 1)," &
"98 (BC_8, A(15), bidir, X, 99, 1, Z)," &
"99 (BC_2, *, control, 1)," &
"100 (BC_8, A(14), bidir, X, 101, 1, Z)," &
"101 (BC_2, *, control, 1)," &
"102 (BC_8, A(13), bidir, X, 103, 1, Z)," &
"103 (BC_2, *, control, 1)," &
"104 (BC_8, A(12), bidir, X, 105, 1, Z)," &
"105 (BC_2, *, control, 1)," &
"106 (BC_8, A(11), bidir, X, 107, 1, Z)," &
"107 (BC_2, *, control, 1)," &
"108 (BC_8, A(10), bidir, X, 109, 1, Z)," &
"109 (BC_2, *, control, 1)," &
"110 (BC_8, A(9), bidir, X, 111, 1, Z)," &
"111 (BC_2, *, control, 1)," &
"112 (BC_8, A(8), bidir, X, 113, 1, Z)," &
"113 (BC_2, *, control, 1)," &
"114 (BC_8, A(7), bidir, X, 115, 1, Z)," &
"115 (BC_2, *, control, 1)," &
"116 (BC_8, A(6), bidir, X, 117, 1, Z)," &
"117 (BC_2, *, control, 1)," &
"118 (BC_8, A(5), bidir, X, 119, 1, Z)," &
"119 (BC_2, *, control, 1)," &
"120 (BC_8, A(4), bidir, X, 121, 1, Z)," &
"121 (BC_2, *, control, 1)," &
"122 (BC_8, A(3), bidir, X, 123, 1, Z)," &
"123 (BC_2, *, control, 1)," &
"124 (BC_8, A(2), bidir, X, 125, 1, Z)," &
"125 (BC_2, *, control, 1)," &
"126 (BC_8, A(1), bidir, X, 127, 1, Z)," &
"127 (BC_2, *, control, 1)," &
"128 (BC_8, A(0), bidir, X, 129, 1, Z)," &
"129 (BC_2, *, control, 1)," &
"130 (BC_8, TA_b, bidir, X, 131, 1, Z)," &
"131 (BC_2, *, control, 1)," &
"132 (BC_8, PWM7, bidir, X, 133, 1, Z)," &
"133 (BC_2, *, control, 1)," &
"134 (BC_8, PWM5, bidir, X, 135, 1, Z)," &
"135 (BC_2, *, control, 1)," &
"136 (BC_8, PWM3, bidir, X, 137, 1, Z)," &
"137 (BC_2, *, control, 1)," &
"138 (BC_8, PWM1, bidir, X, 139, 1, Z)," &
"139 (BC_2, *, control, 1)," &
"140 (BC_8, IRQ_b(7), bidir, X, 141, 1, Z)," &
"141 (BC_2, *, control, 1)," &
"142 (BC_8, IRQ_b(6), bidir, X, 143, 1, Z)," &
"143 (BC_2, *, control, 1)," &
"144 (BC_8, IRQ_b(5), bidir, X, 145, 1, Z)," &
"145 (BC_2, *, control, 1)," &
"146 (BC_8, IRQ_b(4), bidir, X, 147, 1, Z)," &
"147 (BC_2, *, control, 1)," &
"148 (BC_8, IRQ_b(3), bidir, X, 149, 1, Z)," &
"149 (BC_2, *, control, 1)," &
"150 (BC_8, IRQ_b(2), bidir, X, 151, 1, Z)," &
"151 (BC_2, *, control, 1)," &
"152 (BC_8, IRQ_b(1), bidir, X, 153, 1, Z)," &
"153 (BC_2, *, control, 1)," &
"154 (BC_8, RESET_b, bidir, X, 155, 1, Z)," &
"155 (BC_2, *, control, 1)," &
"156 (BC_8, DRAMSEL, bidir, X, 157, 1, Z)," &
"157 (BC_2, *, control, 1)," &
"158 (BC_8, RSTOUT_b, bidir, X, 159, 1, Z)," &
"159 (BC_2, *, control, 1)," &
"160 (BC_8, U0CTS_b, bidir, X, 161, 1, Z)," &
"161 (BC_2, *, control, 1)," &
"162 (BC_8, U0RTS_b, bidir, X, 163, 1, Z)," &
"163 (BC_2, *, control, 1)," &
"164 (BC_8, U0TXD, bidir, X, 165, 1, Z)," &
"165 (BC_2, *, control, 1)," &
"166 (BC_8, U0RXD, bidir, X, 167, 1, Z)," &
"167 (BC_2, *, control, 1)," &
"168 (BC_8, QSPI_PCS(1), bidir, X, 169, 1, Z)," &
"169 (BC_2, *, control, 1)," &
"170 (BC_8, QSPI_PCS(2), bidir, X, 171, 1, Z)," &
"171 (BC_2, *, control, 1)," &
"172 (BC_8, QSPI_SCK, bidir, X, 173, 1, Z)," &
"173 (BC_2, *, control, 1)," &
"174 (BC_8, QSPI_DOUT, bidir, X, 175, 1, Z)," &
"175 (BC_2, *, control, 1)," &
"176 (BC_8, QSPI_DIN, bidir, X, 177, 1, Z)," &
"177 (BC_2, *, control, 1)," &
"178 (BC_8, QSPI_PCS(0), bidir, X, 179, 1, Z)," &
"179 (BC_2, *, control, 1)," &
"180 (BC_8, PST(0), bidir, X, 181, 1, Z)," &
"181 (BC_2, *, control, 1)," &
"182 (BC_8, PST(1), bidir, X, 183, 1, Z)," &
"183 (BC_2, *, control, 1)," &
"184 (BC_8, PST(2), bidir, X, 185, 1, Z)," &
"185 (BC_2, *, control, 1)," &
"186 (BC_8, PST(3), bidir, X, 187, 1, Z)," &
"187 (BC_2, *, control, 1)," &
"188 (BC_1, *, internal, X)," &
"189 (BC_1, *, internal, X)," &
"190 (BC_8, DDATA(0), bidir, X, 191, 1, Z)," &
"191 (BC_2, *, control, 1)," &
"192 (BC_8, DDATA(1), bidir, X, 193, 1, Z)," &
"193 (BC_2, *, control, 1)," &
"194 (BC_8, DDATA(2), bidir, X, 195, 1, Z)," &
"195 (BC_2, *, control, 1)," &
"196 (BC_8, DDATA(3), bidir, X, 197, 1, Z)," &
"197 (BC_2, *, control, 1)," &
"198 (BC_8, RCON_b, bidir, X, 199, 1, Z)," &
"199 (BC_2, *, control, 1)," &
"200 (BC_8, OE_b, bidir, X, 201, 1, Z)," &
"201 (BC_2, *, control, 1)," &
"202 (BC_8, SD_RAS_b, bidir, X, 203, 1, Z)," &
"203 (BC_2, *, control, 1)," &
"204 (BC_8, SD_CAS_b, bidir, X, 205, 1, Z)," &
"205 (BC_2, *, control, 1)," &
"206 (BC_8, RWb, bidir, X, 207, 1, Z)," &
"207 (BC_2, *, control, 1)," &
"208 (BC_8, SD_A10, bidir, X, 209, 1, Z)," &
"209 (BC_2, *, control, 1)," &
"210 (BC_8, D(0), bidir, X, 211, 1, Z)," &
"211 (BC_2, *, control, 1)," &
"212 (BC_8, D(1), bidir, X, 213, 1, Z)," &
"213 (BC_2, *, control, 1)," &
"214 (BC_8, D(2), bidir, X, 215, 1, Z)," &
"215 (BC_2, *, control, 1)," &
"216 (BC_8, D(3), bidir, X, 217, 1, Z)," &
"217 (BC_2, *, control, 1)," &
"218 (BC_8, D(4), bidir, X, 219, 1, Z)," &
"219 (BC_2, *, control, 1)," &
"220 (BC_8, D(5), bidir, X, 221, 1, Z)," &
"221 (BC_2, *, control, 1)," &
"222 (BC_8, D(6), bidir, X, 223, 1, Z)," &
"223 (BC_2, *, control, 1)," &
"224 (BC_8, D(7), bidir, X, 225, 1, Z)," &
"225 (BC_2, *, control, 1)," &
"226 (BC_8, BS_B(0), bidir, X, 227, 1, Z)," &
"227 (BC_2, *, control, 1)," &
"228 (BC_8, SD_DQS(2), bidir, X, 229, 1, Z)," &
"229 (BC_2, *, control, 1)," &
"230 (BC_8, BS_B(2), bidir, X, 231, 1, Z)," &
"231 (BC_2, *, control, 1)," &
"232 (BC_8, D(16), bidir, X, 233, 1, Z)," &
"233 (BC_2, *, control, 1)," &
"234 (BC_8, D(17), bidir, X, 235, 1, Z)," &
"235 (BC_2, *, control, 1)," &
"236 (BC_8, D(18), bidir, X, 237, 1, Z)," &
"237 (BC_2, *, control, 1)," &
"238 (BC_8, D(19), bidir, X, 239, 1, Z)," &
"239 (BC_2, *, control, 1)," &
"240 (BC_8, D(20), bidir, X, 241, 1, Z)," &
"241 (BC_2, *, control, 1)," &
"242 (BC_8, D(21), bidir, X, 243, 1, Z)," &
"243 (BC_2, *, control, 1)," &
"244 (BC_8, D(22), bidir, X, 245, 1, Z)," &
"245 (BC_2, *, control, 1)," &
"246 (BC_8, D(23), bidir, X, 247, 1, Z)," &
"247 (BC_2, *, control, 1)," &
"248 (BC_8, FB_CLK, bidir, X, 249, 1, Z)," &
"249 (BC_2, *, control, 1)," &
"250 (BC_8, SD_CLK_b, bidir, X, 251, 1, Z)," &
"251 (BC_2, *, control, 1)," &
"252 (BC_8, SD_CLK, bidir, X, 253, 1, Z)," &
"253 (BC_2, *, control, 1)," &
"254 (BC_8, SD_SDR_DQS, bidir, X, 255, 1, Z)," &
"255 (BC_2, *, control, 1)," &
"256 (BC_8, D(24), bidir, X, 257, 1, Z)," &
"257 (BC_2, *, control, 1)," &
"258 (BC_8, D(25), bidir, X, 259, 1, Z)," &
"259 (BC_2, *, control, 1)," &
"260 (BC_8, D(26), bidir, X, 261, 1, Z)," &
"261 (BC_2, *, control, 1)," &
"262 (BC_8, D(27), bidir, X, 263, 1, Z)," &
"263 (BC_2, *, control, 1)," &
"264 (BC_8, D(28), bidir, X, 265, 1, Z)," &
"265 (BC_2, *, control, 1)," &
"266 (BC_8, D(29), bidir, X, 267, 1, Z)," &
"267 (BC_2, *, control, 1)," &
"268 (BC_8, D(30), bidir, X, 269, 1, Z)," &
"269 (BC_2, *, control, 1)," &
"270 (BC_8, D(31), bidir, X, 271, 1, Z)," &
"271 (BC_2, *, control, 1)," &
"272 (BC_8, BS_B(3), bidir, X, 273, 1, Z)," &
"273 (BC_2, *, control, 1)," &
"274 (BC_8, SD_DQS(3), bidir, X, 275, 1, Z)," &
"275 (BC_2, *, control, 1)," &
"276 (BC_8, BS_B(1), bidir, X, 277, 1, Z)," &
"277 (BC_2, *, control, 1)," &
"278 (BC_8, D(8), bidir, X, 279, 1, Z)," &
"279 (BC_2, *, control, 1)," &
"280 (BC_8, D(9), bidir, X, 281, 1, Z)," &
"281 (BC_2, *, control, 1)," &
"282 (BC_8, D(10), bidir, X, 283, 1, Z)," &
"283 (BC_2, *, control, 1)," &
"284 (BC_8, D(11), bidir, X, 285, 1, Z)," &
"285 (BC_2, *, control, 1)," &
"286 (BC_8, D(12), bidir, X, 287, 1, Z)," &
"287 (BC_2, *, control, 1)," &
"288 (BC_8, D(13), bidir, X, 289, 1, Z)," &
"289 (BC_2, *, control, 1)," &
"290 (BC_8, D(14), bidir, X, 291, 1, Z)," &
"291 (BC_2, *, control, 1)," &
"292 (BC_8, D(15), bidir, X, 293, 1, Z)," &
"293 (BC_2, *, control, 1)," &
"294 (BC_8, SD_CS_b(1), bidir, X, 295, 1, Z)," &
"295 (BC_2, *, control, 1)," &
"296 (BC_8, SD_CS_b(0), bidir, X, 297, 1, Z)," &
"297 (BC_2, *, control, 1)," &
"298 (BC_8, SD_CKE, bidir, X, 299, 1, Z)," &
"299 (BC_2, *, control, 1)," &
"300 (BC_8, SD_WE_b, bidir, X, 301, 1, Z)," &
"301 (BC_2, *, control, 1)," &
"302 (BC_8, TS_b, bidir, X, 303, 1, Z)," &
"303 (BC_2, *, control, 1)," &
"304 (BC_8, SSI_TXD, bidir, X, 305, 1, Z)," &
"305 (BC_2, *, control, 1)," &
"306 (BC_8, SSI_RXD, bidir, X, 307, 1, Z)," &
"307 (BC_2, *, control, 1)," &
"308 (BC_8, SSI_FS, bidir, X, 309, 1, Z)," &
"309 (BC_2, *, control, 1)," &
"310 (BC_8, SSI_MCLK, bidir, X, 311, 1, Z)," &
"311 (BC_2, *, control, 1)," &
"312 (BC_8, SSI_BCLK, bidir, X, 313, 1, Z)," &
"313 (BC_2, *, control, 1)," &
"314 (BC_8, I2C_SCL, bidir, X, 315, 1, Z)," &
"315 (BC_2, *, control, 1)," &
"316 (BC_8, I2C_SDA, bidir, X, 317, 1, Z)," &
"317 (BC_2, *, control, 1)," &
"318 (BC_8, T3IN, bidir, X, 319, 1, Z)," &
"319 (BC_2, *, control, 1)," &
"320 (BC_8, T2IN, bidir, X, 321, 1, Z)," &
"321 (BC_2, *, control, 1)," &
"322 (BC_8, T1IN, bidir, X, 323, 1, Z)," &
"323 (BC_2, *, control, 1)," &
"324 (BC_8, T0IN, bidir, X, 325, 1, Z)," &
"325 (BC_2, *, control, 1)," &
"326 (BC_8, FEC_TXD(0), bidir, X, 327, 1, Z)," &
"327 (BC_2, *, control, 1)," &
"328 (BC_8, FEC_TXD(1), bidir, X, 329, 1, Z)," &
"329 (BC_2, *, control, 1)," &
"330 (BC_8, FEC_TXD(2), bidir, X, 331, 1, Z)," &
"331 (BC_2, *, control, 1)," &
"332 (BC_8, FEC_TXD(3), bidir, X, 333, 1, Z)," &
"333 (BC_2, *, control, 1)," &
"334 (BC_8, FEC_MDC, bidir, X, 335, 1, Z)," &
"335 (BC_2, *, control, 1)," &
"336 (BC_8, FEC_MDIO, bidir, X, 337, 1, Z)," &
"337 (BC_2, *, control, 1)," &
"338 (BC_8, FEC_TXER, bidir, X, 339, 1, Z)," &
"339 (BC_2, *, control, 1)," &
"340 (BC_8, FEC_TXEN, bidir, X, 341, 1, Z)," &
"341 (BC_2, *, control, 1)," &
"342 (BC_8, FEC_TXCLK, bidir, X, 343, 1, Z)," &
"343 (BC_2, *, control, 1)," &
"344 (BC_8, FEC_RXER, bidir, X, 345, 1, Z)," &
"345 (BC_2, *, control, 1)," &
"346 (BC_8, LCD_DATA(0), bidir, X, 347, 1, Z)," &
"347 (BC_2, *, control, 1)," &
"348 (BC_8, LCD_DATA(1), bidir, X, 349, 1, Z)," &
"349 (BC_2, *, control, 1)," &
"350 (BC_8, LCD_DATA(2), bidir, X, 351, 1, Z)," &
"351 (BC_2, *, control, 1)," &
"352 (BC_8, LCD_DATA(3), bidir, X, 353, 1, Z)," &
"353 (BC_2, *, control, 1)" ;
end MCF5328;